| Commit message (Expand) | Author | Age | Files | Lines |
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| | | | * | clk: meson: add gen_clk | Jerome Brunet | 2018-07-09 | 4 | -3/+135 |
| | | | * | clk: meson: gxbb: remove HHI_GEN_CLK_CTNL duplicate definition | Jerome Brunet | 2018-07-09 | 1 | -1/+0 |
| | | | * | clk: meson-axg: add clocks required by pcie driver | Yixun Lan | 2018-07-09 | 2 | -1/+150 |
| | | | * | clk: meson: remove unused clk-audio-divider driver | Jerome Brunet | 2018-07-09 | 3 | -119/+1 |
| | | | * | clk: meson: stop rate propagation for audio clocks | Jerome Brunet | 2018-07-09 | 1 | -9/+7 |
| | | | * | clk: meson: axg: add the audio clock controller driver | Jerome Brunet | 2018-07-09 | 4 | -0/+982 |
| | | | * | clk: meson: add axg audio sclk divider driver | Jerome Brunet | 2018-07-09 | 3 | -1/+252 |
| | | | * | Merge remote-tracking branch 'clk/clk-core-duty-cycle' into next/drivers | Jerome Brunet | 2018-07-09 | 4 | -5/+289 |
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| | | | * | | clk: meson: add triple phase clock driver | Jerome Brunet | 2018-07-09 | 4 | -0/+94 |
| | | | * | | clk: meson: add clk-phase clock driver | Jerome Brunet | 2018-07-09 | 3 | -0/+72 |
| | | | * | | Merge branch 'next/dt' into next/drivers | Jerome Brunet | 2018-07-09 | 4 | -0/+155 |
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| | | | | * | | clk: meson: expose GEN_CLK clkid | Jerome Brunet | 2018-07-09 | 2 | -0/+2 |
| | | | | * | | clk: meson-axg: add pcie and mipi clock bindings | Yixun Lan | 2018-07-03 | 1 | -0/+3 |
| | | | | * | | dt-bindings: clock: add meson axg audio clock controller bindings | Jerome Brunet | 2018-06-22 | 2 | -0/+150 |
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| | | | * | | clk: meson: clean-up meson clock configuration | Jerome Brunet | 2018-07-09 | 1 | -9/+5 |
| | | | * | | clk: meson: remove obsolete register access | Jerome Brunet | 2018-07-09 | 2 | -69/+4 |
| | * | | | | clk: mvebu: armada-37xx-periph: switch to SPDX license identifier | Gregory CLEMENT | 2018-07-09 | 1 | -4/+1 |
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| *-------. \ \ \ | Merge branches 'clk-imx-critical', 'clk-tegra-bpmp', 'clk-tegra-124', 'clk-te... | Stephen Boyd | 2018-08-15 | 5 | -36/+30 |
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| | | | | | * | | | | clk: tegra: emc: Avoid out-of-bounds bug | Dmitry Osipenko | 2018-07-09 | 1 | -1/+1 |
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| | | | | * / / / | clk: tegra: Mark Memory Controller clock as critical | Dmitry Osipenko | 2018-07-09 | 1 | -2/+3 |
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| | | | * | | | | clk: tegra: Make vde a child of pll_c3 | Thierry Reding | 2018-07-09 | 1 | -1/+1 |
| | | | * | | | | clk: tegra: Make vic03 a child of pll_c3 | Thierry Reding | 2018-07-09 | 1 | -0/+1 |
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| | | * / / / | clk: tegra: bpmp: Don't crash when a clock fails to register | Mikko Perttunen | 2018-07-09 | 1 | -3/+9 |
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| | * | | | | clk: imx51-imx53: Include sizes.h to silence compile errors | Stephen Boyd | 2018-07-06 | 1 | -0/+1 |
| | * | | | | clk: imx51-imx53: Annotate critical clocks as CLK_IS_CRITICAL | Fabio Estevam | 2018-07-06 | 1 | -29/+14 |
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| *-------. \ \ \ | Merge branches 'clk-ingenic-fixes', 'clk-max9485', 'clk-pxa-32k-pll', 'clk-as... | Stephen Boyd | 2018-08-15 | 14 | -14/+503 |
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| | | | | | * | | | | clk: imx6sll: add GPIO LPCGs | Anson Huang | 2018-07-06 | 2 | -1/+14 |
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| | | | | * / / / | clk: aspeed: Fix SDCLK name | Lei YU | 2018-07-06 | 2 | -2/+2 |
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| | | | * / / / | clk: pxa: export 32kHz PLL | Robert Jarzmik | 2018-07-06 | 4 | -9/+14 |
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| | | * | | | | clk: Add driver for MAX9485 | Daniel Mack | 2018-07-06 | 3 | -0/+394 |
| | | * | | | | dts: clk: add devicetree bindings for MAX9485 | Daniel Mack | 2018-07-06 | 2 | -0/+77 |
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| | * | | | | clk: ingenic: Add missing flag for UDC clock | Paul Cercueil | 2018-07-06 | 1 | -1/+1 |
| | * | | | | clk: ingenic: Fix incorrect data for the i2s clock | Paul Cercueil | 2018-07-06 | 1 | -1/+1 |
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| *-------. \ \ \ | Merge branches 'clk-imx6-video-parent', 'clk-qcom-sdm845-criticals', 'clk-ren... | Stephen Boyd | 2018-08-15 | 14 | -7/+1298 |
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| | | | | | * | | | | clk: at91: add I2S clock mux driver | Codrin Ciubotariu | 2018-07-06 | 3 | -0/+121 |
| | | | | | * | | | | dt-bindings: clk: at91: add an I2S mux clock | Codrin Ciubotariu | 2018-07-06 | 1 | -0/+35 |
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| | | | | * | | | | clk: socfpga: stratix10: fix the sdmmc_free_clk mux | Dinh Nguyen | 2018-07-06 | 1 | -1/+1 |
| | | | | * | | | | clk: socfpga: stratix10: fix the parents of mpu_free_clk | Dinh Nguyen | 2018-07-06 | 1 | -1/+6 |
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| | | | * | | | | Merge tag 'clk-renesas-for-v4.19-tag1' of git://git.kernel.org/pub/scm/linux/... | Stephen Boyd | 2018-07-06 | 6 | -0/+1093 |
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| | | | | * | | | clk: renesas: Renesas R9A06G032 clock driver | Michel Pollet | 2018-06-25 | 3 | -0/+900 |
| | | | | * | | | dt-bindings: clock: renesas,r9a06g032-sysctrl: documentation | Michel Pollet | 2018-06-25 | 1 | -0/+43 |
| | | | | * | | | dt-bindings: clock: Add the r9a06g032-sysctrl.h file | Michel Pollet | 2018-06-22 | 1 | -0/+148 |
| | | | | * | | | clk: renesas: r8a7795: Add CCREE clock | Gilad Ben-Yossef | 2018-06-19 | 1 | -0/+1 |
| | | | | * | | | clk: renesas: r8a7795: Add CR clock | Geert Uytterhoeven | 2018-06-19 | 1 | -0/+1 |
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| | | * / / / | clk: qcom: Enable clocks which needs to be always on for SDM845 | Amit Nischal | 2018-07-03 | 2 | -4/+41 |
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| | * / / / | clk: imx6: fix video_27m parent for IMX6QDL_CLK_CKO1_SEL | Philipp Puschmann | 2018-06-29 | 1 | -1/+1 |
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| *-----. \ \ \ | Merge branches 'clk-qcom-set-rate-gate', 'clk-core-set-rate-gate', 'clk-core-... | Stephen Boyd | 2018-08-15 | 8 | -48/+412 |
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| | | | | * | | | clk: imx6ul: remove clks_init_on array | Anson Huang | 2018-06-29 | 1 | -17/+6 |
| | | | | * | | | clk: imx6ul: add GPIO clock gates | Anson Huang | 2018-06-29 | 2 | -1/+12 |
| | | | * | | | | clk-si514, clk-si544: Implement prepare/unprepare/is_prepared operations | Mike Looijmans | 2018-06-29 | 2 | -2/+74 |
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