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* Merge tag 'for-linus-5.11-rc4-tag' of ↵Linus Torvalds2021-01-1511-54/+129
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip Pull xen fixes from Juergen Gross: - A series to fix a regression when running as a fully virtualized guest on an old Xen hypervisor not supporting PV interrupt callbacks for HVM guests. - A patch to add support to query Xen resource sizes (setting was possible already) from user mode. * tag 'for-linus-5.11-rc4-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip: x86/xen: Fix xen_hvm_smp_init() when vector callback not available x86/xen: Don't register Xen IPIs when they aren't going to be used x86/xen: Add xen_no_vector_callback option to test PCI INTX delivery xen: Set platform PCI device INTX affinity to CPU0 xen: Fix event channel callback via INTX/GSI xen/privcmd: allow fetching resource sizes
| * x86/xen: Fix xen_hvm_smp_init() when vector callback not availableDavid Woodhouse2021-01-131-10/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Only the IPI-related functions in the smp_ops should be conditional on the vector callback being available. The rest should still happen: • xen_hvm_smp_prepare_boot_cpu() This function does two things, both of which should still happen if there is no vector callback support. The call to xen_vcpu_setup() for vCPU0 should still happen as it just sets up the vcpu_info for CPU0. That does happen for the secondary vCPUs too, from xen_cpu_up_prepare_hvm(). The second thing it does is call xen_init_spinlocks(), which perhaps counter-intuitively should *also* still be happening in the case without vector callbacks, so that it can clear its local xen_pvspin flag and disable the virt_spin_lock_key accordingly. Checking xen_have_vector_callback in xen_init_spinlocks() itself would affect PV guests, so set the global nopvspin flag in xen_hvm_smp_init() instead, when vector callbacks aren't available. • xen_hvm_smp_prepare_cpus() This does some IPI-related setup by calling xen_smp_intr_init() and xen_init_lock_cpu(), which can be made conditional. And it sets the xen_vcpu_id to XEN_VCPU_ID_INVALID for all possible CPUS, which does need to happen. • xen_smp_cpus_done() This offlines any vCPUs which doesn't fit in the global shared_info page, if separate vcpu_info placement isn't available. That part also needs to happen regardless of vector callback support. • xen_hvm_cpu_die() This doesn't actually do anything other than commin_cpu_die() right right now in the !vector_callback case; all three teardown functions it calls should be no-ops. But to guard against future regressions it's useful to call it anyway, and for it to explicitly check for xen_have_vector_callback before calling those additional functions. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Boris Ostrovsky <boris.ostrovsky@oracle.com> Link: https://lore.kernel.org/r/20210106153958.584169-6-dwmw2@infradead.org Signed-off-by: Juergen Gross <jgross@suse.com>
| * x86/xen: Don't register Xen IPIs when they aren't going to be usedDavid Woodhouse2021-01-131-2/+2
| | | | | | | | | | | | | | | | | | | | | | In the case where xen_have_vector_callback is false, we still register the IPI vectors in xen_smp_intr_init() for the secondary CPUs even though they aren't going to be used. Stop doing that. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Boris Ostrovsky <boris.ostrovsky@oracle.com> Link: https://lore.kernel.org/r/20210106153958.584169-5-dwmw2@infradead.org Signed-off-by: Juergen Gross <jgross@suse.com>
| * x86/xen: Add xen_no_vector_callback option to test PCI INTX deliveryDavid Woodhouse2021-01-132-1/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | It's useful to be able to test non-vector event channel delivery, to make sure Linux will work properly on older Xen which doesn't have it. It's also useful for those working on Xen and Xen-compatible hypervisors, because there are guest kernels still in active use which use PCI INTX even when vector delivery is available. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Boris Ostrovsky <boris.ostrovsky@oracle.com> Link: https://lore.kernel.org/r/20210106153958.584169-4-dwmw2@infradead.org Signed-off-by: Juergen Gross <jgross@suse.com>
| * xen: Set platform PCI device INTX affinity to CPU0David Woodhouse2021-01-131-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | With INTX or GSI delivery, Xen uses the event channel structures of CPU0. If the interrupt gets handled by Linux on a different CPU, then no events are seen as pending. Rather than introducing locking to allow other CPUs to process CPU0's events, just ensure that the PCI interrupts happens only on CPU0. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Boris Ostrovsky <boris.ostrovsky@oracle.com> Link: https://lore.kernel.org/r/20210106153958.584169-3-dwmw2@infradead.org Signed-off-by: Juergen Gross <jgross@suse.com>
| * xen: Fix event channel callback via INTX/GSIDavid Woodhouse2021-01-137-35/+70
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For a while, event channel notification via the PCI platform device has been broken, because we attempt to communicate with xenstore before we even have notifications working, with the xs_reset_watches() call in xs_init(). We tend to get away with this on Xen versions below 4.0 because we avoid calling xs_reset_watches() anyway, because xenstore might not cope with reading a non-existent key. And newer Xen *does* have the vector callback support, so we rarely fall back to INTX/GSI delivery. To fix it, clean up a bit of the mess of xs_init() and xenbus_probe() startup. Call xs_init() directly from xenbus_init() only in the !XS_HVM case, deferring it to be called from xenbus_probe() in the XS_HVM case instead. Then fix up the invocation of xenbus_probe() to happen either from its device_initcall if the callback is available early enough, or when the callback is finally set up. This means that the hack of calling xenbus_probe() from a workqueue after the first interrupt, or directly from the PCI platform device setup, is no longer needed. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Boris Ostrovsky <boris.ostrovsky@oracle.com> Link: https://lore.kernel.org/r/20210113132606.422794-2-dwmw2@infradead.org Signed-off-by: Juergen Gross <jgross@suse.com>
| * xen/privcmd: allow fetching resource sizesRoger Pau Monne2021-01-131-6/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow issuing an IOCTL_PRIVCMD_MMAP_RESOURCE ioctl with num = 0 and addr = 0 in order to fetch the size of a specific resource. Add a shortcut to the default map resource path, since fetching the size requires no address to be passed in, and thus no VMA to setup. This is missing from the initial implementation, and causes issues when mapping resources that don't have fixed or known sizes. Signed-off-by: Roger Pau Monné <roger.pau@citrix.com> Reviewed-by: Juergen Gross <jgross@suse.com> Tested-by: Andrew Cooper <andrew.cooper3@citrix.com> Cc: stable@vger.kernel.org # >= 4.18 Link: https://lore.kernel.org/r/20210112115358.23346-1-roger.pau@citrix.com Signed-off-by: Juergen Gross <jgross@suse.com>
* | Merge tag 'iommu-fixes' of ↵Linus Torvalds2021-01-153-3/+22
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull iommu fixes from Will Deacon: "Three IOMMU fixes for -rc4. The main one is a change to the Intel IOMMU driver to fix the handling of unaligned addresses when invalidating the TLB. The fix itself is a bit ugly (the caller does a bunch of shifting which is then effectively undone later in the callchain), but Lu has patches to clean all of this up in 5.12. Summary: - Fix address alignment handling for VT-D TLB invalidation - Enable workarounds for buggy Qualcomm firmware on two more SoCs - Drop duplicate #include" * tag 'iommu-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: iommu/vt-d: Fix duplicate included linux/dma-map-ops.h iommu: arm-smmu-qcom: Add sdm630/msm8998 compatibles for qcom quirks iommu/vt-d: Fix unaligned addresses for intel_flush_svm_range_dev()
| * | iommu/vt-d: Fix duplicate included linux/dma-map-ops.hTian Tao2021-01-121-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | linux/dma-map-ops.h is included more than once, Remove the one that isn't necessary. Signed-off-by: Tian Tao <tiantao6@hisilicon.com> Acked-by: Lu Baolu <baolu.lu@linux.intel.com> Link: https://lore.kernel.org/r/1609118774-10083-1-git-send-email-tiantao6@hisilicon.com Signed-off-by: Will Deacon <will@kernel.org>
| * | iommu: arm-smmu-qcom: Add sdm630/msm8998 compatibles for qcom quirksKonrad Dybcio2021-01-121-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SDM630 and MSM8998 are among the SoCs that use Qualcomm's implementation of SMMUv2 which has already proven to be problematic over the years. Add their compatibles to the lookup list to prevent the platforms from being shut down by the hypervisor at MMU probe. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Link: https://lore.kernel.org/r/20210109165622.149777-1-konrad.dybcio@somainline.org Signed-off-by: Will Deacon <will@kernel.org>
| * | iommu/vt-d: Fix unaligned addresses for intel_flush_svm_range_dev()Lu Baolu2021-01-121-2/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The VT-d hardware will ignore those Addr bits which have been masked by the AM field in the PASID-based-IOTLB invalidation descriptor. As the result, if the starting address in the descriptor is not aligned with the address mask, some IOTLB caches might not invalidate. Hence people will see below errors. [ 1093.704661] dmar_fault: 29 callbacks suppressed [ 1093.704664] DMAR: DRHD: handling fault status reg 3 [ 1093.712738] DMAR: [DMA Read] Request device [7a:02.0] PASID 2 fault addr 7f81c968d000 [fault reason 113] SM: Present bit in first-level paging entry is clear Fix this by using aligned address for PASID-based-IOTLB invalidation. Fixes: 1c4f88b7f1f9 ("iommu/vt-d: Shared virtual address in scalable mode") Reported-and-tested-by: Guo Kaijie <Kaijie.Guo@intel.com> Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> Link: https://lore.kernel.org/r/20201231005323.2178523-2-baolu.lu@linux.intel.com Signed-off-by: Will Deacon <will@kernel.org>
* | | Merge tag 'topic/nouveau-ampere-modeset-2021-01-15' of ↵Linus Torvalds2021-01-1546-18/+892
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://anongit.freedesktop.org/drm/drm Pull drm nouveau ampere display support from Dave Airlie: "Ben has requested if we can include Ampere modesetting support under fixes, it's for new GPUs and shouldn't affect existing hardware. It's a bit bigger than just adding a PCI ID, but It has no effect on older GPUs" * tag 'topic/nouveau-ampere-modeset-2021-01-15' of git://anongit.freedesktop.org/drm/drm: drm/nouveau/disp/ga10[24]: initial support drm/nouveau/dmaobj/ga10[24]: initial support drm/nouveau/i2c/ga10[024]: initial support drm/nouveau/gpio/ga10[024]: initial support drm/nouveau/bar/ga10[024]: initial support drm/nouveau/mmu/ga10[024]: initial support drm/nouveau/timer/ga10[024]: initial support drm/nouveau/fb/ga10[024]: initial support drm/nouveau/imem/ga10[024]: initial support drm/nouveau/privring/ga10[024]: initial support drm/nouveau/mc/ga10[024]: initial support drm/nouveau/devinit/ga10[024]: initial support drm/nouveau/bios/ga10[024]: initial support drm/nouveau/pci/ga10[024]: initial support drm/nouveau/core: recognise GA10[024]
| * \ \ Merge branch '04.01-ampere-lite' of git://github.com/skeggsb/linux into ↵Dave Airlie2021-01-1546-18/+892
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | topic/nouveau-ampere-modeset This adds support for basic modeseting on the nvidia ampere chipsets. This code should all be contained to just those and have no effect on current hardware. Signed-off-by: Dave Airlie <airlied@redhat.com> From: Ben Skeggs <skeggsb@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/CACAvsv5LmMP+HbDUQBf_dy1-0eS9fA32k8HWo4y5X4-7rsw-yw@mail.gmail.com
| | * | | drm/nouveau/disp/ga10[24]: initial supportBen Skeggs2021-01-1522-13/+410
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | UEFI/RM no longer use IED scripts from the VBIOS, though they appear to have been updated for use by the x86 VBIOS code, so we should be able to continue using them for the moment. Unfortunately, we require some hacks to do so, as the BeforeLinkTraining IED script became a pointer to an array of scripts instead, without a revbump of the relevant tables. There's also some changes to SOR clock divider fiddling, which are hopefully correct enough that things work as they should. AFAIK, GA100 shouldn't have display, so it hasn't been added. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | drm/nouveau/dmaobj/ga10[24]: initial supportBen Skeggs2021-01-151-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Appears to be compatible with GV100 code, and not required on GA100, as it shouldn't have display. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | drm/nouveau/i2c/ga10[024]: initial supportBen Skeggs2021-01-151-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Appears to be compatible with GM200 code. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | drm/nouveau/gpio/ga10[024]: initial supportBen Skeggs2021-01-154-0/+123
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GA100 appears to be compatible with GK104 code, the others have some register moves. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | drm/nouveau/bar/ga10[024]: initial supportBen Skeggs2021-01-151-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Appears to be compatible with TU102 code. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | drm/nouveau/mmu/ga10[024]: initial supportBen Skeggs2021-01-151-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Appears to be compatible with TU102 code. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | drm/nouveau/timer/ga10[024]: initial supportBen Skeggs2021-01-151-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Appears to be compatible with GK20A code. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | drm/nouveau/fb/ga10[024]: initial supportBen Skeggs2021-01-159-1/+132
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | No VPR scrub. GA102 and GA104 have a new VRAM size detection method. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | drm/nouveau/imem/ga10[024]: initial supportBen Skeggs2021-01-151-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Appears to be compatible with NV50 code. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | drm/nouveau/privring/ga10[024]: initial supportBen Skeggs2021-01-151-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Appears to be compatible with GM200 code. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | drm/nouveau/mc/ga10[024]: initial supportBen Skeggs2021-01-154-0/+79
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fortunately, all the interrupts we need to bring up basic display support are contained in a single leaf register, allowing this basic (but hackish) implementation. There's a bunch more invasive patches to come implementing all this in a better/more complete way, but trying to get a minimal series out first. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | drm/nouveau/devinit/ga10[024]: initial supportBen Skeggs2021-01-156-1/+83
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | VPLL regs changed a bit. There's more stuff to do around these, but it's less invasive to stick those changes into disp for now. None of that belongs here anymore anyhow - fix that someday. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | drm/nouveau/bios/ga10[024]: initial supportBen Skeggs2021-01-152-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Forcing PRAMIN-shadowing off for GA100, as it requires display, and we don't know if/where the fuse register for detecting its presence is. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | drm/nouveau/pci/ga10[024]: initial supportBen Skeggs2021-01-151-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Appears to be compatible with GP100 code. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | drm/nouveau/core: recognise GA10[024]Ben Skeggs2021-01-155-3/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GA100 hidden behind a module option, as it's not been as well verified since initial bring-up and may need additional changes. There's no display anyway, so this can wait for a bit. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | | | | Merge tag 'drm-fixes-2021-01-15' of git://anongit.freedesktop.org/drm/drmLinus Torvalds2021-01-1548-410/+598
|\| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull drm fixes from Dave Airlie: "Regular fixes for rc4, a bunch of fixes across i915, amdgpu and nouveau here, along with a couple of TTM fixes, and dma-buf and one core pageflip/modifier interaction fix. One notable i915 fix is a HSW GT1 regression fix that has been outstanding for quite a while. (Thanks to Matt Turner for kicking Intel into getting it fixed). dma-buf: - Fix a memory leak in CMAV heap core: - Fix format check for legacy pageflips ttm: - Pass correct address to dma_mapping_error() - Use mutex in pool shrinker i915: - Allow the sysadmin to override security mitigations - Restore clear-residual mitigations for ivb/byt - Limit VFE threads based on GT - GVT: fix vfio edid and full display detection - Fix DSI DSC power refcounting - Fix LPT CPU mode backlight takeover - Disable RPM wakeref assertions during driver shutdown - Fix DSI sequence sleeps amdgpu: - Update repo location in MAINTAINERS - Add some new renoir PCI IDs - Revert CRC UAPI changes - Revert OLED display fix which cases clocking problems for some systems - Misc vangogh fixes - GFX fix for sienna cichlid - DCN1.0 fix for pipe split - Fix incorrect PSP command amdkfd: - Fix possible out of bounds read in vcrat creation nouveau: - irq handling fix - expansion ROM fix - hw init dpcd disable - aux semaphore owner field fix - vram heap sizing fix - notifier at 0 is valid fix" * tag 'drm-fixes-2021-01-15' of git://anongit.freedesktop.org/drm/drm: (37 commits) drm/nouveau/kms/nv50-: fix case where notifier buffer is at offset 0 drm/nouveau/mmu: fix vram heap sizing drm/nouveau/i2c/gm200: increase width of aux semaphore owner fields drm/nouveau/i2c/gk110-: disable hw-initiated dpcd reads drm/nouveau/i2c/gk110: split out from i2c/gk104 drm/nouveau/privring: ack interrupts the same way as RM drm/nouveau/bios: fix issue shadowing expansion ROMs drm/amd/display: Fix to be able to stop crc calculation Revert "drm/amd/display: Expose new CRC window property" Revert "drm/amdgpu/disply: fix documentation warnings in display manager" Revert "drm/amd/display: Fix unused variable warning" drm/amdgpu: set power brake sequence drm/amdgpu: add new device id for Renior drm/amdgpu: add green_sardine device id (v2) drm/amdgpu: fix vram type and bandwidth error for DDR5 and DDR4 drm/amdgpu/gfx10: add updated GOLDEN_TSC_COUNT_UPPER/LOWER register offsets for VGH drm/amdkfd: Fix out-of-bounds read in kdf_create_vcrat_image_cpu() Revert "drm/amd/display: Fixed Intermittent blue screen on OLED panel" drm/amd/display: disable dcn10 pipe split by default drm/amd/display: Add a missing DCN3.01 API mapping ...
| * | | | Merge branch '04.00-ampere-lite-fixes' of git://github.com/skeggsb/linux ↵Dave Airlie2021-01-1517-30/+112
| |\| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into drm-fixes As requested, here's a tree with the non-Ampere-specific fixes split out, as most of them are potentially relevant to already-supported GPUs. - irq handling fix - expansion ROM fix - hw init dpcd disable - aux semaphore owner field fix - vram heap sizing fix - notifier at 0 is valid fix Signed-off-by: Dave Airlie <airlied@redhat.com> From: Ben Skeggs <skeggsb@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/CACAvsv4P90mcF_ByAh+ghz+ZVD2N2bPbD7xHYYArE1kYrvsGcQ@mail.gmail.com
| | * | | drm/nouveau/kms/nv50-: fix case where notifier buffer is at offset 0Ben Skeggs2021-01-153-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | VRAM offset 0 is a valid address, triggered on GA102. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | drm/nouveau/mmu: fix vram heap sizingBen Skeggs2021-01-151-3/+3
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | drm/nouveau/i2c/gm200: increase width of aux semaphore owner fieldsBen Skeggs2021-01-151-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Noticed while debugging GA102. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | drm/nouveau/i2c/gk110-: disable hw-initiated dpcd readsBen Skeggs2021-01-157-6/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | RM does this around transactions, and it seemed to help while debugging AUXCH issues on GA102. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | drm/nouveau/i2c/gk110: split out from i2c/gk104Ben Skeggs2021-01-154-6/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | No functional changes here yet. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | drm/nouveau/privring: ack interrupts the same way as RMBen Skeggs2021-01-152-6/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Whatever it is that we were doing before doesn't work on Ampere. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | drm/nouveau/bios: fix issue shadowing expansion ROMsBen Skeggs2021-01-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This issue has generally been covered up by the presence of additional expansion ROMs after the ones we're interested in, with header fetches of subsequent images loading enough of the ROM to hide the issue. Noticed on GA102, which lacks a type 0x70 image compared to TU102,. [ 906.364197] nouveau 0000:09:00.0: bios: 00000000: type 00, 65024 bytes [ 906.381205] nouveau 0000:09:00.0: bios: 0000fe00: type 03, 91648 bytes [ 906.405213] nouveau 0000:09:00.0: bios: 00026400: type e0, 22016 bytes [ 906.410984] nouveau 0000:09:00.0: bios: 0002ba00: type e0, 366080 bytes vs [ 22.961901] nouveau 0000:09:00.0: bios: 00000000: type 00, 60416 bytes [ 22.984174] nouveau 0000:09:00.0: bios: 0000ec00: type 03, 71168 bytes [ 23.010446] nouveau 0000:09:00.0: bios: 00020200: type e0, 48128 bytes [ 23.028220] nouveau 0000:09:00.0: bios: 0002be00: type e0, 140800 bytes [ 23.080196] nouveau 0000:09:00.0: bios: 0004e400: type 70, 7168 bytes Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * | | | Merge tag 'amd-drm-fixes-5.11-2021-01-14' of ↵Dave Airlie2021-01-1517-265/+125
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.freedesktop.org/agd5f/linux into drm-fixes amd-drm-fixes-5.11-2021-01-14: amdgpu: - Update repo location in MAINTAINERS - Add some new renoir PCI IDs - Revert CRC UAPI changes - Revert OLED display fix which cases clocking problems for some systems - Misc vangogh fixes - GFX fix for sienna cichlid - DCN1.0 fix for pipe split - Fix incorrect PSP command amdkfd: - Fix possible out of bounds read in vcrat creation Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexdeucher@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210114201354.3998-1-alexander.deucher@amd.com
| | * | | | drm/amd/display: Fix to be able to stop crc calculationWayne Lin2021-01-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [Why] Find out when we try to disable CRC calculation, crc generation is still enabled. Main reason is that dc_stream_configure_crc() will never get called when the source is AMDGPU_DM_PIPE_CRC_SOURCE_NONE. [How] Add checking condition that when source is AMDGPU_DM_PIPE_CRC_SOURCE_NONE, we should also call dc_stream_configure_crc() to disable crc calculation. Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Wayne Lin <Wayne.Lin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | | Revert "drm/amd/display: Expose new CRC window property"Rodrigo Siqueira2021-01-144-210/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit c920888c604d72799d057bbcd9e28a6c003ccfbe. Cc: Wayne Lin <Wayne.Lin@amd.com> Cc: Alexander Deucher <Alexander.Deucher@amd.com> Cc: Harry Wentland <Harry.Wentland@amd.com> Cc: Roman Li <Roman.Li@amd.com> Cc: Bindu R <Bindu.R@amd.com> Cc: Daniel Vetter <daniel@ffwll.ch> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Wayne Lin <Wayne.Lin@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | | Revert "drm/amdgpu/disply: fix documentation warnings in display manager"Rodrigo Siqueira2021-01-141-20/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 6ae09fa49147e557eb6aebbb5b2059b63706d454. Cc: Wayne Lin <Wayne.Lin@amd.com> Cc: Alexander Deucher <Alexander.Deucher@amd.com> Cc: Harry Wentland <Harry.Wentland@amd.com> Cc: Roman Li <Roman.Li@amd.com> Cc: Bindu R <Bindu.R@amd.com> Cc: Daniel Vetter <daniel@ffwll.ch> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | | Revert "drm/amd/display: Fix unused variable warning"Rodrigo Siqueira2021-01-142-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit f01afd1ee48816457fb22e201f1d0cfb14589904. Cc: Wayne Lin <Wayne.Lin@amd.com> Cc: Alexander Deucher <Alexander.Deucher@amd.com> Cc: Harry Wentland <Harry.Wentland@amd.com> Cc: Roman Li <Roman.Li@amd.com> Cc: Bindu R <Bindu.R@amd.com> Cc: Daniel Vetter <daniel@ffwll.ch> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | | drm/amdgpu: set power brake sequenceLikun Gao2021-01-141-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add function to set power brake sequence. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | | drm/amdgpu: add new device id for Reniormengwang2021-01-142-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | add DID 0x164C into pciidlist under CHIP_RENOIR family. Signed-off-by: mengwang <mengbing.wang@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org # 5.10.x
| | * | | | drm/amdgpu: add green_sardine device id (v2)Prike Liang2021-01-141-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add green_sardine PCI id support and map it to renoir asic type. v2: add apu flag Signed-off-by: Prike Liang <Prike.Liang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org # 5.10.x
| | * | | | drm/amdgpu: fix vram type and bandwidth error for DDR5 and DDR4Huang Rui2021-01-141-17/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is to update atomfirmware parser for the memory type and bandwidth of DDR5 and DDR4. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | | drm/amdgpu/gfx10: add updated GOLDEN_TSC_COUNT_UPPER/LOWER register offsets ↵chen gong2021-01-141-2/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | for VGH The address of the GOLDEN_TSC_COUNT_UPPER/GOLDEN_TSC_COUNT_LOWER for Vnagogh are different from the others. The offset of the GOLDEN_TSC_COUNT_UPPER for Vangogh is 0x0025 by calculation. The offset of the GOLDEN_TSC_COUNT_LOWER for Vangogh is 0x0026 by calculation. Signed-off-by: chen gong <curry.gong@amd.com> Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | | drm/amdkfd: Fix out-of-bounds read in kdf_create_vcrat_image_cpu()Jeremy Cline2021-01-141-4/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | KASAN reported a slab-out-of-bounds read of size 1 in kdf_create_vcrat_image_cpu(). This occurs when, for example, when on an x86_64 with a single NUMA node because kfd_fill_iolink_info_for_cpu() is a no-op, but afterwards the sub_type_hdr->length, which is out-of-bounds, is read and multiplied by entries. Fortunately, entries is 0 in this case so the overall crat_table->length is still correct. Check if there were any entries before de-referencing sub_type_hdr which may be pointing to out-of-bounds memory. Fixes: b7b6c38529c9 ("drm/amdkfd: Calculate CPU VCRAT size dynamically (v2)") Suggested-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Jeremy Cline <jcline@redhat.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | | | Revert "drm/amd/display: Fixed Intermittent blue screen on OLED panel"Rodrigo Siqueira2021-01-141-5/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit a861736dae64 ("drm/amd/display: Fixed Intermittent blue screen on OLED panel") causes power regression for many users. It seems that this change causes the MCLK to get forced high; this creates a regression for many users since their devices were not able to drop to a low state after this change. For this reason, this reverts commit a861736dae644a0d7abbca0c638ae6aad28feeb8. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1407 Cc: Aurabindo Pillai <aurabindo.pillai@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Harry Wentland <harry.wentland@amd.com> Cc: Naveed Ashfaq <Naveed.Ashfaq@amd.com> Cc: Hersen Wu <hersenxs.wu@amd.com> Cc: Roman Li <roman.li@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
| | * | | | drm/amd/display: disable dcn10 pipe split by defaultLi, Roman2021-01-141-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [Why] The initial purpose of dcn10 pipe split is to support some high bandwidth mode which requires dispclk greater than max dispclk. By initial bring up power measurement data, it showed power consumption is less with pipe split for dcn block. This could be reason for enable pipe split by default. By battery life measurement of some Chromebooks, result shows battery life is longer with pipe split disabled. [How] Disable pipe split by default. Pipe split could be still enabled when required dispclk is greater than max dispclk. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Hersen Wu <hersenxs.wu@amd.com> Signed-off-by: Roman Li <Roman.Li@amd.com> Reviewed-by: Roman Li <Roman.Li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.39.1) at 2025-01-25 15:26:30 +0100