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* Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2020-06-10203-1245/+15228
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| * clk: mediatek: Remove ifr{0,1}_cfg_regs structuresStephen Boyd2020-06-091-30/+0
| * clk: baikal-t1: remove redundant assignment to variable 'divider'Colin Ian King2020-06-091-1/+1
| * clk: baikal-t1: fix spelling mistake "Uncompatible" -> "Incompatible"Colin Ian King2020-06-091-1/+1
| * dt-bindings: clock: Add a missing include to MMP Audio Clock bindingLubomir Rintel2020-06-091-0/+1
| *-----. Merge branches 'clk-vc5', 'clk-hsdk', 'clk-mediatek' and 'clk-baikal' into cl...Stephen Boyd2020-06-0138-32/+4413
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| | | | | * clk: Add Baikal-T1 CCU Dividers driverSerge Semin2020-05-305-0/+1210
| | | | | * clk: Add Baikal-T1 CCU PLLs driverSerge Semin2020-05-307-0/+860
| | | | | * dt-bindings: clk: Add Baikal-T1 CCU Dividers bindingSerge Semin2020-05-303-0/+245
| | | | | * dt-bindings: clk: Add Baikal-T1 CCU PLLs bindingSerge Semin2020-05-302-0/+147
| | | | * | clk: mediatek: assign the initial value to clk_init_data of mtk_muxWeiyi Lu2020-05-291-1/+1
| | | | * | clk: mediatek: Add MT6765 clock supportOwen Chen2020-05-299-0/+1523
| | | | * | clk: mediatek: add mt6765 clock IDsMars Cheng2020-05-291-0/+313
| | | | * | dt-bindings: clock: mediatek: document clk bindings vcodecsys for Mediatek MT...Macpaul Lin2020-05-291-0/+27
| | | | * | dt-bindings: clock: mediatek: document clk bindings mipi0a for Mediatek MT676...Macpaul Lin2020-05-291-0/+28
| | | | * | dt-bindings: clock: mediatek: document clk bindings for Mediatek MT6765 SoCMacpaul Lin2020-05-298-0/+8
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| | | * | CLK: HSDK: CGU: add support for 148.5MHz clockEugeniy Paltsev2020-05-291-0/+1
| | | * | CLK: HSDK: CGU: support PLL bypassingEugeniy Paltsev2020-05-291-27/+34
| | | * | CLK: HSDK: CGU: check if PLL is bypassed firstEugeniy Paltsev2020-05-291-4/+4
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| | * | dt: Add bindings for IDT VersaClock 5P49V5925Adam Ford2020-05-301-0/+1
| | * | clk: vc5: Add support for IDT VersaClock 5P49V6965Adam Ford2020-05-301-0/+11
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| *-------. \ Merge branches 'clk-mmp', 'clk-intel', 'clk-ingenic', 'clk-qcom' and 'clk-sil...Stephen Boyd2020-06-0154-133/+8026
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| | | | | | * | clk: clk-si5341: Add support for the Si5345 seriesMike Looijmans2020-05-292-6/+74
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| | | | | * | clk: qcom: Add missing msm8998 ufs_unipro_core_clk_srcJeffrey Hugo2020-05-292-0/+28
| | | | | * | dt-bindings: clock: Add YAML schemas for QCOM A53 PLLSivaprakash Murugesan2020-05-272-22/+40
| | | | | * | clk: qcom: gcc-msm8939: Add MSM8939 Generic Clock ControllerBryan O'Donoghue2020-05-273-0/+3997
| | | | | * | clk: qcom: gcc: Add support for Secure control source clockTaniya Das2020-05-271-0/+21
| | | | | * | dt-bindings: clock: Add gcc_sec_ctrl_clk_src clock IDTaniya Das2020-05-271-0/+1
| | | | | * | clk: qcom: gcc: Add support for a new frequency for SC7180Taniya Das2020-05-271-36/+37
| | | | | * | clk: qcom: Add DT bindings for MSM8939 GCCBryan O'Donoghue2020-05-143-0/+319
| | | | | * | clk: qcom: gcc: Add missing UFS clocks for SM8150Vinod Koul2020-05-141-0/+84
| | | | | * | clk: qcom: gcc: Add GPU and NPU clocks for SM8150Vinod Koul2020-05-141-0/+64
| | | | | * | clk: qcom: mmcc-msm8996: Properly describe GPU_GX gdscBjorn Andersson2020-05-142-0/+6
| | | | | * | clk: qcom: gdsc: Handle GDSC regulator suppliesBjorn Andersson2020-05-142-0/+27
| | | | | * | clk: qcom: msm8916: Fix the address location of pll->config_regBryan O'Donoghue2020-04-221-4/+4
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| | | | * | clk: ingenic: Mark ingenic_tcu_of_match as __maybe_unusedStephen Boyd2020-05-291-1/+1
| | | | * | clk: X1000: Add FIXDIV for SSI clock of X1000.周琰杰 (Zhou Yanjie)2020-05-291-6/+111
| | | | * | dt-bindings: clock: Add and reorder ABI for X1000.周琰杰 (Zhou Yanjie)2020-05-291-28/+36
| | | | * | clk: Ingenic: Add CGU driver for X1830.周琰杰 (Zhou Yanjie)2020-05-293-0/+459
| | | | * | dt-bindings: clock: Add X1830 clock bindings.周琰杰 (Zhou Yanjie)2020-05-291-0/+55
| | | | * | clk: Ingenic: Adjust cgu code to make it compatible with X1830.周琰杰 (Zhou Yanjie)2020-05-297-4/+41
| | | | * | clk: Ingenic: Remove unnecessary spinlock when reading registers.周琰杰 (Zhou Yanjie)2020-05-291-11/+1
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| | | * | clk: intel: remove redundant initialization of variable rate64Colin Ian King2020-05-291-1/+1
| | | * | clk: intel: Add CGU clock driver for a new SoCRahul Tanwar2020-05-277-0/+1612
| | | * | dt-bindings: clk: intel: Add bindings document & header file for CGURahul Tanwar2020-05-272-0/+209
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| | * | clk: mmp2: Add audio clock controller driverLubomir Rintel2020-05-283-0/+450
| | * | dt-bindings: clock: Add Marvell MMP Audio Clock Controller bindingLubomir Rintel2020-05-282-0/+84
| | * | clk: mmp2: Add support for power islandsLubomir Rintel2020-05-285-1/+170
| | * | dt-bindings: marvell,mmp2: Add ids for the power domainsLubomir Rintel2020-05-281-0/+11
| | * | dt-bindings: clock: Make marvell,mmp2-clock a power controllerLubomir Rintel2020-05-281-0/+5