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* Merge tag 'qcom-drivers-for-5.14' of ↵Olof Johansson2021-06-1510-8/+126
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers Qualcomm driver updates for v5.14 In addition to fixing a kerneldoc issue in the qcom-ebi2 driver this populates socinfo with a range of platforms and PMICs and extends a few of the Qualcomm drivers bits of support for MSM8226, MDM9607, SM6125 and SC8180X. * tag 'qcom-drivers-for-5.14' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: firmware: qcom_scm: Add MDM9607 compatible soc: qcom: rpmpd: Add MDM9607 RPM Power Domains soc: qcom: smd-rpm: Add MSM8226 compatible dt-bindings: soc: qcom: smd-rpm: Add MSM8226 compatible soc: qcom: socinfo: import PMIC IDs from pmic-spmi bus: qcom-ebi2: Fix incorrect documentation for '{slow,fast}_cfg' soc: qcom: socinfo: Add more IDs soc: qcom: rpmhpd: Add SC8180X dt-bindings: power: rpmpd: Add SC8180X to rpmpd binding dt-bindings: soc: qcom: smd-rpm: Document SM6125 compatible soc: qcom: smd-rpm: Add SM6125 compatible soc: qcom: socinfo: Add remaining IPQ6018 family ID-s soc: qcom: socinfo: Add missing SoC ID for SM6125 Link: https://lore.kernel.org/r/20210614223727.393159-1-bjorn.andersson@linaro.org Signed-off-by: Olof Johansson <olof@lixom.net>
| * firmware: qcom_scm: Add MDM9607 compatibleKonrad Dybcio2021-06-102-0/+4
| | | | | | | | | | | | | | | | | | | | Add a compatible for MDM9607. It uses the "legacy" calling convention. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210131013058.54299-1-konrad.dybcio@somainline.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| * soc: qcom: rpmpd: Add MDM9607 RPM Power DomainsKonrad Dybcio2021-06-103-0/+31
| | | | | | | | | | | | | | | | | | | | | | This SoC while being from 8916 era, makes use of the newer-style, floor-level management, instead of the older floor-corner. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210131013233.54666-1-konrad.dybcio@somainline.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| * soc: qcom: smd-rpm: Add MSM8226 compatibleBartosz Dudziak2021-06-011-0/+1
| | | | | | | | | | | | | | | | Add a compatible for the RPM on the Qualcomm MSM8226 platform. Signed-off-by: Bartosz Dudziak <bartosz.dudziak@snejp.pl> Link: https://lore.kernel.org/r/20210502122027.9351-3-bartosz.dudziak@snejp.pl Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| * dt-bindings: soc: qcom: smd-rpm: Add MSM8226 compatibleBartosz Dudziak2021-06-011-0/+1
| | | | | | | | | | | | | | | | | | Add the dt-binding for the rpm on the Qualcomm MSM8226 SoC platform. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Bartosz Dudziak <bartosz.dudziak@snejp.pl> Link: https://lore.kernel.org/r/20210502122027.9351-2-bartosz.dudziak@snejp.pl Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| * soc: qcom: socinfo: import PMIC IDs from pmic-spmiLuca Weiss2021-05-271-6/+18
| | | | | | | | | | | | | | | | | | | | | | The driver in drivers/mfd/qcom-spmi-pmic.c has a more complete and more up-to-date list of PMICs with the respective IDs. Use those names for socinfo. Some IDs seem to have been assigned to multiple PMICs so keep that in the name as well. Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Link: https://lore.kernel.org/r/20210526200843.127916-1-luca@z3ntu.xyz Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| * bus: qcom-ebi2: Fix incorrect documentation for '{slow,fast}_cfg'Lee Jones2021-05-271-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes the following W=1 kernel build warning(s): drivers/bus/qcom-ebi2.c:112: warning: Function parameter or member 'slow_cfg' not described in 'cs_data' drivers/bus/qcom-ebi2.c:112: warning: Function parameter or member 'fast_cfg' not described in 'cs_data' Reviewed-by: Linus Walleij <linus.walleij@linaro.org Cc: Andy Gross <agross@kernel.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: linux-arm-msm@vger.kernel.org Signed-off-by: Lee Jones <lee.jones@linaro.org> Link: https://lore.kernel.org/r/20210526081038.544942-8-lee.jones@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| * soc: qcom: socinfo: Add more IDsLuca Weiss2021-05-261-0/+27
| | | | | | | | | | | | | | | | Add the IDs for the following families of chips: 8064, 8226, 8610, 8625Q Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Link: https://lore.kernel.org/r/20210504203612.95056-1-luca@z3ntu.xyz Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| * soc: qcom: rpmhpd: Add SC8180XBjorn Andersson2021-05-261-0/+21
| | | | | | | | | | | | | | | | Add the power domains exposed by RPMH in the Qualcomm SC8180X platform. Reviewed-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20210120225037.1611353-2-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| * dt-bindings: power: rpmpd: Add SC8180X to rpmpd bindingBjorn Andersson2021-05-262-0/+14
| | | | | | | | | | | | | | | | | | | | | | Add compatible and constants for the power domains exposed by the RPMH in the Qualcomm SC8180X platform. Reviewed-by: Shawn Guo <shawn.guo@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210120225037.1611353-1-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| * dt-bindings: soc: qcom: smd-rpm: Document SM6125 compatibleMartin Botka2021-05-261-0/+1
| | | | | | | | | | | | | | | | Add the SM6125 compatible to the documentation Signed-off-by: Martin Botka <martin.botka@somainline.org> Link: https://lore.kernel.org/r/20210523211556.731976-3-martin.botka@somainline.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| * soc: qcom: smd-rpm: Add SM6125 compatibleMartin Botka2021-05-261-0/+1
| | | | | | | | | | | | | | | | Add a compatible for SM6125 Signed-off-by: Martin Botka <martin.botka@somainline.org> Link: https://lore.kernel.org/r/20210523211556.731976-1-martin.botka@somainline.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| * soc: qcom: socinfo: Add remaining IPQ6018 family ID-sRobert Marko2021-05-261-0/+4
| | | | | | | | | | | | | | | | | | | | | | ID for IPQ6018 was previously added, but ID-s for rest of the family are missing. So, lets add those based on downstream driver. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Reviewed-by: Kathiravan T <kathirav@codeaurora.org> Link: https://lore.kernel.org/r/20210517120034.3975027-1-robert.marko@sartura.hr Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| * soc: qcom: socinfo: Add missing SoC ID for SM6125Martin Botka2021-05-261-0/+1
| | | | | | | | | | | | | | | | Add SM6125 SoC ID to the soc_id struct Signed-off-by: Martin Botka <martin.botka@somainline.org> Link: https://lore.kernel.org/r/20210523212038.736445-2-martin.botka@somainline.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
* | Merge tag 'imx-drivers-5.14' of ↵Olof Johansson2021-06-154-115/+559
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers i.MX drivers update for 5.14: - A patch series from Lucas Stach and Peng Fan adding i.MX8MM power domains support into i.MX GPCv2 driver. - A couple of patches from Adam Ford adding i.MX8MN power domains on top of i.MX8MM power domain support. * tag 'imx-drivers-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: soc: imx: gpcv2: add support for i.MX8MN power domains dt-bindings: add defines for i.MX8MN power domains soc: imx: gpcv2: move reset assert after requesting domain power up soc: imx: gpcv2: Add support for missing i.MX8MM VPU/DISPMIX power domains soc: imx: gpcv2: add support for i.MX8MM power domains dt-bindings: power: add defines for i.MX8MM power domains soc: imx: gpcv2: add support for optional resets soc: imx: gpcv2: allow domains without power-sequence control soc: imx: gpcv2: add runtime PM support for power-domains soc: imx: gpcv2: wait for ADB400 handshake soc: imx: gpcv2: split power up and power down sequence control soc: imx: gpcv2: switch to clk_bulk_* API soc: imx: gpcv2: move domain mapping to domain driver probe soc: imx: gpcv2: move to more ideomatic error handling in probe Link: https://lore.kernel.org/r/20210613082544.16067-1-shawnguo@kernel.org Signed-off-by: Olof Johansson <olof@lixom.net>
| * | soc: imx: gpcv2: add support for i.MX8MN power domainsAdam Ford2021-06-121-0/+92
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for the power domains founds on i.MX8MN. The Nano has fewer domains than the Mini, and the access to some of these domains is different than that of the Mini, the Mini power domains cannot be reused. Signed-off-by: Adam Ford <aford173@gmail.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * | dt-bindings: add defines for i.MX8MN power domainsAdam Ford2021-06-122-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The i.MX8M Nano has a similar power domain controller to that of the mini, but it isn't fully compatible, so it needs a separate binding and power domain tables. Add the bindings and tables. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * | soc: imx: gpcv2: move reset assert after requesting domain power upPeng Fan2021-05-271-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The i.MX8MM VPU power up sequence is a bit special, it must follow: 1. request power up 2. reset assert 3. reset deassert This change in this patch will not affect other domains, because the power domain default is in asserted state, unless bootloader deassert the reset. It also applies to GPU power domain. Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * | soc: imx: gpcv2: Add support for missing i.MX8MM VPU/DISPMIX power domainsLucas Stach2021-05-271-0/+70
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the BLK-CTL driver now in place, let's add the missing domains. Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * | soc: imx: gpcv2: add support for i.MX8MM power domainsLucas Stach2021-05-271-0/+168
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for the power domains found on i.MX8MM. The 2D and 3D GPU domains are abstracted as a single domain in the driver, as they can't be powered up/down individually due to a shared reset. Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * | dt-bindings: power: add defines for i.MX8MM power domainsLucas Stach2021-05-272-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adding defines for i.MX8MM GPC power domains. Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * | soc: imx: gpcv2: add support for optional resetsLucas Stach2021-05-231-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Normally the reset for the devices inside the power domain is triggered automatically from the PGC in the power-up sequencing, however on i.MX8MM this doesn't work for the GPU power domains. Add support for triggering the reset explicitly during the power up sequencing. Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * | soc: imx: gpcv2: allow domains without power-sequence controlLucas Stach2021-05-231-40/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some of the PGC domains only control the handshake with the ADB400 and don't have any power sequence controls. Make such domains work by allowing the pxx and map bits to be empty and skip all actions using those controls. Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * | soc: imx: gpcv2: add runtime PM support for power-domainsLucas Stach2021-05-231-1/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This allows to nest domains into other power domains and have the parent domain powered up/down as required by the child domains. Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * | soc: imx: gpcv2: wait for ADB400 handshakeLucas Stach2021-05-231-8/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | New reference manuals show that there is actually a status bit for the ADB400 handshake. Add a poll loop to wait for the ADB400 to acknowledge our request. [Peng Fan: i.MX8MM has blk ctl module, the handshake can only finish after setting blk ctl. The blk ctl driver will set the bus clk bit and the handshake will finish there. we just add a delay and suppose the handshake will finish after that.] Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * | soc: imx: gpcv2: split power up and power down sequence controlLucas Stach2021-05-231-55/+86
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current mixed function to control both power up and power down sequences is very hard to follow and already contains some sequence errors like triggering the ADB400 handshake at the wrong time due to this. Split the function into two, which results in slightly more code, but is way easier to get right. Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * | soc: imx: gpcv2: switch to clk_bulk_* APILucas Stach2021-05-231-48/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use clk_bulk API to simplify the code a bit. Also add some error checking to the clk_prepare_enable calls. Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * | soc: imx: gpcv2: move domain mapping to domain driver probeLucas Stach2021-05-231-9/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As long as the power domain driver is active we want power control over the domain (which is what the mapping bit requests), so there is no point in whacking it for every power control action, simply set the bit in driver probe and clear it when the driver is removed. Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * | soc: imx: gpcv2: move to more ideomatic error handling in probeLucas Stach2021-05-231-4/+9
| |/ | | | | | | | | | | | | | | | | | | | | | | | | Switch to "goto out..." error handling in domain driver probe to avoid repeating all the error paths. Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Tested-by: Adam Ford <aford173@gmail.com> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* | Merge tag 'drivers_soc_for_5.13' of ↵Olof Johansson2021-06-152-6/+2
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into arm/drivers SOC: Keystone driver update for v5.13 Couple of cleanup fixes in PM AVS and WKUP M3 drivers * tag 'drivers_soc_for_5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone: soc: ti: wkup_m3_ipc: Remove redundant error printing in wkup_m3_ipc_probe() PM: AVS: remove redundant dev_err call in omap_sr_probe() Link: https://lore.kernel.org/r/1623564105-10273-1-git-send-email-santosh.shilimkar@oracle.com Signed-off-by: Olof Johansson <olof@lixom.net>
| * | soc: ti: wkup_m3_ipc: Remove redundant error printing in wkup_m3_ipc_probe()Zhen Lei2021-06-041-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When devm_ioremap_resource() fails, a clear enough error message will be printed by its subfunction __devm_ioremap_resource(). The error information contains the device name, failure cause, and possibly resource information. Therefore, remove the error printing here to simplify code and reduce the binary size. Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
| * | PM: AVS: remove redundant dev_err call in omap_sr_probe()Qiheng Lin2021-06-041-3/+1
| |/ | | | | | | | | | | | | | | | | | | | | There is a error message within devm_ioremap_resource already, so remove the dev_err call to avoid redundant error message. Reported-by: Hulk Robot <hulkci@huawei.com> Reviewed-by: Nishanth Menon <nm@ti.com> Signed-off-by: Qiheng Lin <linqiheng@huawei.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
* | Merge tag 'memory-controller-drv-pl353-5.14' of ↵Olof Johansson2021-06-125-381/+149
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers Memory controller drivers for v5.14 - PL353 Bigger work around ARM Primecell PL35x SMC memory controller driver by Miquel Raynal built on previous series from Naga Sureshkumar Relli. This includes bindings cleanup and correction, converting these to dtschema and several cleanyps in pl353-smc driver. * tag 'memory-controller-drv-pl353-5.14' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: dt-binding: memory: pl353-smc: Convert to yaml MAINTAINERS: Add PL353 SMC entry memory: pl353-smc: Declare variables following a reverse christmas tree order memory: pl353-smc: Avoid useless acronyms in descriptions memory: pl353-smc: Let lower level controller drivers handle inits memory: pl353-smc: Rename goto labels memory: pl353-smc: Fix style dt-binding: memory: pl353-smc: Fix the NAND controller node in the example dt-binding: memory: pl353-smc: Drop unsupported nodes from the example dt-binding: memory: pl353-smc: Fix the example syntax and style dt-binding: memory: pl353-smc: Describe the child reg property dt-binding: memory: pl353-smc: Drop the partitioning section dt-binding: memory: pl353-smc: Document the range property dt-binding: memory: pl353-smc: Rephrase the binding Link: https://lore.kernel.org/r/20210611140659.61980-2-krzysztof.kozlowski@canonical.com Signed-off-by: Olof Johansson <olof@lixom.net>
| * | dt-binding: memory: pl353-smc: Convert to yamlMiquel Raynal2021-06-102-44/+131
| | | | | | | | | | | | | | | | | | | | | | | | | | | Convert this binding file to yaml schema. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210610082040.2075611-10-miquel.raynal@bootlin.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| * | MAINTAINERS: Add PL353 SMC entryMiquel Raynal2021-06-101-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add Naga from Xilinx and myself responsible of this driver. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com> Link: https://lore.kernel.org/r/20210610082040.2075611-16-miquel.raynal@bootlin.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| * | memory: pl353-smc: Declare variables following a reverse christmas tree orderMiquel Raynal2021-06-101-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | This is a purely cosmetic change. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20210610082040.2075611-15-miquel.raynal@bootlin.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| * | memory: pl353-smc: Avoid useless acronyms in descriptionsMiquel Raynal2021-06-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | APER does not mean anything, while it seems legitimate to call this clock the AXI peripheral clock. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20210610082040.2075611-14-miquel.raynal@bootlin.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| * | memory: pl353-smc: Let lower level controller drivers handle initsMiquel Raynal2021-06-102-324/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no point in having all these definitions at the SMC bus level, these are extremely tight to the NAND controller driver implementation, are not particularly generic, imply more boilerplate than needed, do not really follow the device model by receiving no argument and some of them are actually buggy. Let's get rid of these right now as there is no current user and keep this driver at a simple level: only the SMC bare initializations. The NAND controller driver which I am going to introduce will take care of redefining properly all these helpers and using them directly. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20210610082040.2075611-13-miquel.raynal@bootlin.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| * | memory: pl353-smc: Rename goto labelsMiquel Raynal2021-06-101-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A goto label is better named do_something: than out_something_to_do: Use the former wording and really describe what the jump involves. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20210610082040.2075611-12-miquel.raynal@bootlin.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| * | memory: pl353-smc: Fix styleMiquel Raynal2021-06-101-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Use proper spacing. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20210610082040.2075611-11-miquel.raynal@bootlin.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| * | dt-binding: memory: pl353-smc: Fix the NAND controller node in the exampleMiquel Raynal2021-06-101-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To be fully valid, the NAND controller node in the example should be named nand-controller instead of flash, should be at the address @0,0 instead of @e1000000 and should have a couple of: - #address-cells - #size-cells properties. The label is being renamed nfc0 as well which is more usual than nand_0. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210610082040.2075611-8-miquel.raynal@bootlin.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| * | dt-binding: memory: pl353-smc: Drop unsupported nodes from the exampleMiquel Raynal2021-06-101-10/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These nodes are given as examples and are not described nor used anywhere else. There is also no hardware of my knowledge compatible with these yet. If we want to be backward compatible, then we should avoid partially describing nodes and their content while there are no users. Plus, the examples are wrong (the addresses should be updated) so let's drop them before converting this file to yaml (only the NAND node, which will be fixed in the example and described somewhere else is kept). Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210610082040.2075611-7-miquel.raynal@bootlin.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| * | dt-binding: memory: pl353-smc: Fix the example syntax and styleMiquel Raynal2021-06-101-23/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | Enhance the spacing, the comment style, add { }, remove (...). Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210610082040.2075611-6-miquel.raynal@bootlin.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| * | dt-binding: memory: pl353-smc: Describe the child reg propertyMiquel Raynal2021-06-101-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Each chil node should have a reg property, no matter the type of controller (NAND, NOR, SRAM). This should be part of the bindings. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210610082040.2075611-5-miquel.raynal@bootlin.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| * | dt-binding: memory: pl353-smc: Drop the partitioning sectionMiquel Raynal2021-06-101-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This sentence does not belong to this file as this file describes the bus on which various controllers are wired to. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210610082040.2075611-4-miquel.raynal@bootlin.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| * | dt-binding: memory: pl353-smc: Document the range propertyMiquel Raynal2021-06-101-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ranges property is missing in the description while actually used in the example. This property is actually needed, so mention it. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210610082040.2075611-3-miquel.raynal@bootlin.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| * | dt-binding: memory: pl353-smc: Rephrase the bindingMiquel Raynal2021-06-101-6/+5
| |/ | | | | | | | | | | | | | | | | Reword this document before converting it to yaml. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210610082040.2075611-2-miquel.raynal@bootlin.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
* | Merge tag 'memory-controller-drv-5.14' of ↵Olof Johansson2021-06-127-686/+16
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers Memory controller drivers for v5.14 Several small fixes and cleanups for stm32, atmel, pl353, renesas-rpc, TI emif and fsl_ifc. * tag 'memory-controller-drv-5.14' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: memory: emif: remove unused frequency and voltage notifiers memory: fsl_ifc: fix leak of private memory on probe failure memory: fsl_ifc: fix leak of IO mapping on probe failure MAINTAINERS: memory: cover also header file memory: renesas-rpc-if: correct whitespace memory: pl353: Fix error return code in pl353_smc_probe() memory: atmel-ebi: add missing of_node_put for loop iteration memory: stm32-fmc2-ebi: add missing of_node_put for loop iteration Link: https://lore.kernel.org/r/20210611140659.61980-1-krzysztof.kozlowski@canonical.com Signed-off-by: Olof Johansson <olof@lixom.net>
| * | memory: emif: remove unused frequency and voltage notifiersKrzysztof Kozlowski2021-06-101-678/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The driver defined several functions related to handling of frequency and voltage changes: - freq_post_notify_handling - freq_pre_notify_handling - volt_notify_handling All these are static, not used inside or outside of driver, and marked as unused with comment: "TODO: voltage notify handling should be hooked up to regulator framework as soon as the necessary support is available in mainline kernel. This function is un-used right now.". These have been added with commit a93de288aad3 ("memory: emif: handle frequency and voltage change events") in 2012 and are unused since then. Additionally mentioned regulator and clock hooking did not happen since then. If it did not happen for nine years, let's assume it will not happen suddenly now. Remove all unused functions which also allows removal of "t_ck" static variable "t_ck" and "addressing" member of private structure. No functionality is lost. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20210527154101.80556-1-krzysztof.kozlowski@canonical.com
| * | memory: fsl_ifc: fix leak of private memory on probe failureKrzysztof Kozlowski2021-06-101-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | On probe error the driver should free the memory allocated for private structure. Fix this by using resource-managed allocation. Fixes: a20cbdeffce2 ("powerpc/fsl: Add support for Integrated Flash Controller") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20210527154322.81253-2-krzysztof.kozlowski@canonical.com