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| * | | RISC-V: Move the hwprobe syscall to its own fileAndrew Jones2024-01-033-285/+290
| * | | RISC-V: hwprobe: Clarify cpus size parameterAndrew Jones2024-01-036-30/+23
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* | | RISC-V: Remove the removed single-letter extensionsPalmer Dabbelt2024-01-032-10/+0
* | | Merge patch series "riscv: Use READ_ONCE()/WRITE_ONCE() for pte accesses"Palmer Dabbelt2023-12-2013-120/+157
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| * | | riscv: Use accessors to page table entries instead of direct dereferenceAlexandre Ghiti2023-12-2010-113/+128
| * | | riscv: mm: Only compile pgtable.c if MMUAlexandre Ghiti2023-12-201-2/+1
| * | | mm: Introduce pudp/p4dp/pgdp_get() functionsAlexandre Ghiti2023-12-202-0/+23
| * | | riscv: Use WRITE_ONCE() when setting page table entriesAlexandre Ghiti2023-12-202-5/+5
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* | | dt-bindings: riscv: cpus: Add AMD MicroBlaze V compatibleMichal Simek2023-12-201-0/+1
* | | Merge patch series "riscv: report more ISA extensions through hwprobe"Palmer Dabbelt2023-12-137-25/+551
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| * dt-bindings: riscv: add Zfa ISA extension descriptionClément Léger2023-12-131-0/+6
| * riscv: hwprobe: export Zfa ISA extensionClément Léger2023-12-133-0/+6
| * riscv: add ISA extension parsing for ZfaClément Léger2023-12-132-0/+2
| * dt-bindings: riscv: add Zvfh[min] ISA extension descriptionClément Léger2023-12-131-0/+12
| * riscv: hwprobe: export Zvfh[min] ISA extensionsClément Léger2023-12-133-0/+12
| * riscv: add ISA extension parsing for Zvfh[min]Clément Léger2023-12-132-0/+4
| * dt-bindings: riscv: add Zihintntl ISA extension descriptionClément Léger2023-12-131-0/+6
| * riscv: hwprobe: export Zhintntl ISA extensionClément Léger2023-12-133-0/+5
| * riscv: add ISA extension parsing for ZihintntlClément Léger2023-12-132-0/+2
| * dt-bindings: riscv: add Zfh[min] ISA extensions descriptionClément Léger2023-12-131-0/+13
| * riscv: hwprobe: export Zfh[min] ISA extensionsClément Léger2023-12-133-0/+13
| * riscv: add ISA extension parsing for Zfh/Zfh[min]Clément Léger2023-12-132-0/+4
| * dt-bindings: riscv: add vector crypto ISA extensions descriptionClément Léger2023-12-131-0/+96
| * riscv: hwprobe: export vector crypto ISA extensionsClément Léger2023-12-133-0/+53
| * riscv: add ISA extension parsing for vector cryptoClément Léger2023-12-132-1/+75
| * dt-bindings: riscv: add scalar crypto ISA extensions descriptionClément Léger2023-12-131-0/+80
| * riscv: hwprobe: add support for scalar crypto ISA extensionsClément Léger2023-12-133-0/+46
| * riscv: add ISA extension parsing for scalar cryptoEvan Green2023-12-133-24/+109
| * riscv: hwprobe: export missing Zbc ISA extensionClément Léger2023-12-133-0/+5
| * riscv: add ISA extension parsing for ZbcClément Léger2023-12-132-0/+2
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* Linux 6.7-rc1v6.7-rc1Linus Torvalds2023-11-131-2/+2
* wifi: iwlwifi: fix system commands group orderingMiri Korenblit2023-11-121-1/+1
* Merge tag 'parisc-for-6.7-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel...Linus Torvalds2023-11-123-8/+6
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| * parisc: Prevent booting 64-bit kernels on PA1.x machinesHelge Deller2023-11-101-3/+2
| * parport: gsc: mark init function staticArnd Bergmann2023-11-101-1/+1
| * parisc/pgtable: Do not drop upper 5 address bits of physical addressHelge Deller2023-11-071-4/+3
* | Merge tag 'loongarch-6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/ch...Linus Torvalds2023-11-1213-63/+215
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| * | selftests/bpf: Enable cpu v4 tests for LoongArchHengqi Chen2023-11-086-6/+12
| * | LoongArch: BPF: Support signed mod instructionsHengqi Chen2023-11-081-9/+25
| * | LoongArch: BPF: Support signed div instructionsHengqi Chen2023-11-081-9/+25
| * | LoongArch: BPF: Support 32-bit offset jmp instructionsHengqi Chen2023-11-081-1/+5
| * | LoongArch: BPF: Support unconditional bswap instructionsHengqi Chen2023-11-081-0/+1
| * | LoongArch: BPF: Support sign-extension mov instructionsHengqi Chen2023-11-081-2/+17
| * | LoongArch: BPF: Support sign-extension load instructionsHengqi Chen2023-11-081-10/+39
| * | LoongArch: Add more instruction opcodes and emit_* helpersHengqi Chen2023-11-081-0/+13
| * | LoongArch/smp: Call rcutree_report_cpu_starting() earlierHuacai Chen2023-11-081-1/+2
| * | LoongArch: Relax memory ordering for atomic operationsWANG Rui2023-11-081-20/+68
| * | LoongArch: Mark __percpu functions as always inlineNathan Chancellor2023-11-081-5/+5
| * | LoongArch: Disable module from accessing external data directlyWANG Rui2023-11-081-0/+2
| * | LoongArch: Support PREEMPT_DYNAMIC with static keysHuacai Chen2023-11-081-0/+1
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