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| * | tty: Add SBI debug console support to HVC SBI driverAtish Patra2024-01-102-8/+31
| * | tty/serial: Add RISC-V SBI debug console based earlyconAnup Patel2024-01-102-4/+25
| * | RISC-V: Add SBI debug console helper routinesAnup Patel2024-01-102-0/+71
| * | RISC-V: Add stubs for sbi_console_putchar/getchar()Anup Patel2024-01-101-0/+5
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* | riscv: sbi: Introduce system suspend supportAndrew Jones2024-01-113-1/+54
* | Merge patch series "riscv: modules: Fix module loading error handling"Palmer Dabbelt2024-01-111-5/+9
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| * | riscv: Fix relocation_hashtable sizeCharlie Jenkins2024-01-101-1/+1
| * | riscv: Correctly free relocation hashtable on errorCharlie Jenkins2024-01-101-3/+7
| * | riscv: Fix module loading free orderCharlie Jenkins2024-01-101-1/+1
* | | Merge patch series "riscv: enable EFFICIENT_UNALIGNED_ACCESS and DCACHE_WORD_...Palmer Dabbelt2024-01-115-0/+89
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| * | | riscv: select DCACHE_WORD_ACCESS for efficient unaligned access HWJisheng Zhang2024-01-104-0/+74
| * | | riscv: introduce RISCV_EFFICIENT_UNALIGNED_ACCESSJisheng Zhang2024-01-102-0/+15
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* | | Merge patch series "riscv: hwprobe: add Zicond, Zacas and Ztso support"Palmer Dabbelt2024-01-106-0/+29
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| * | | riscv: hwprobe: export Zicond extensionClément Léger2024-01-103-0/+7
| * | | riscv: hwprobe: export Zacas ISA extensionClément Léger2024-01-103-0/+6
| * | | riscv: add ISA extension parsing for ZacasClément Léger2024-01-102-0/+2
| * | | dt-bindings: riscv: add Zacas ISA extension descriptionClément Léger2024-01-101-0/+6
| * | | riscv: hwprobe: export Ztso ISA extensionClément Léger2024-01-103-0/+6
| * | | riscv: add ISA extension parsing for ZtsoClément Léger2024-01-102-0/+2
* | | | use linux/export.h rather than asm-generic/export.hAl Viro2024-01-105-5/+5
* | | | Merge patch series "Fix XIP boot and make XIP testable in QEMU"Palmer Dabbelt2024-01-104-7/+14
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| * | | | riscv: Allow disabling of BUILTIN_DTB for XIPFrederik Haxel2024-01-102-4/+6
| * | | | riscv: Fixed wrong register in XIP_FIXUP_FLASH_OFFSET macroFrederik Haxel2024-01-101-1/+1
| * | | | riscv: Make XIP bootable againFrederik Haxel2024-01-102-2/+7
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* | | | riscv: Remove SHADOW_OVERFLOW_STACK_SIZE macroSong Shuai2024-01-101-1/+0
* | | | Merge remote-tracking branch 'palmer/fixes' into for-nextPalmer Dabbelt2024-01-1011-52/+130
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| * | | | riscv: Fix set_direct_map_default_noflush() to reset _PAGE_EXECAlexandre Ghiti2024-01-091-1/+1
| * | | | riscv: Fix module_alloc() that did not reset the linear mapping permissionsAlexandre Ghiti2024-01-091-1/+2
| * | | | riscv: Fix wrong usage of lm_alias() when splitting a huge linear mappingAlexandre Ghiti2024-01-091-2/+7
| * | | | riscv: Check if the code to patch lies in the exit sectionAlexandre Ghiti2024-01-094-1/+15
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| * | | riscv: errata: andes: Probe for IOCP only once in boot stageLad Prabhakar2023-12-061-7/+13
| * | | riscv: Fix SMP when shadow call stacks are enabledSamuel Holland2023-12-061-1/+1
| * | | dt-bindings: perf: riscv,pmu: drop unneeded quotesRob Herring2023-12-061-1/+1
| * | | riscv: fix misaligned access handling of C.SWSP and C.SDSPClément Léger2023-12-061-4/+2
| * | | RISC-V: hwprobe: Always use u64 for extension bitsAndrew Jones2023-12-061-1/+1
| * | | Support rv32 ULEB128 testCharlie Jenkins2023-12-061-4/+4
| * | | Merge patch series "riscv: Fix issues with module loading"Palmer Dabbelt2023-12-041-30/+84
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| | * | riscv: Correct type casting in module loadingCharlie Jenkins2023-12-041-2/+2
| | * | riscv: Safely remove entries from relocation listCharlie Jenkins2023-12-041-28/+82
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* | | riscv; fix __user annotation in save_v_state()Ben Dooks2024-01-101-1/+1
* | | riscv: fix __user annotation in traps_misaligned.cBen Dooks2024-01-101-3/+3
* | | riscv: Select ARCH_WANTS_NO_INSTRJisheng Zhang2024-01-101-0/+1
* | | Merge patch series "riscv: CPU operations cleanup"Palmer Dabbelt2024-01-109-95/+24
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| * | | riscv: Use the same CPU operations for all CPUsSamuel Holland2024-01-055-23/+18
| * | | riscv: Remove unused members from struct cpu_operationsSamuel Holland2024-01-058-58/+1
| * | | riscv: Deduplicate code in setup_smp()Samuel Holland2024-01-051-20/+11
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* | | riscv: Remove obsolete rv32_defconfig fileSamuel Holland2024-01-101-139/+0
* | | Merge patch series "RISC-V: hwprobe: Introduce which-cpus"Palmer Dabbelt2024-01-1012-348/+693
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| * | | RISC-V: selftests: Add which-cpus hwprobe testAndrew Jones2024-01-032-1/+158
| * | | RISC-V: hwprobe: Introduce which-cpus flagAndrew Jones2024-01-035-14/+204
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