summaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* Input: opencores-kbd - switch to using managed resourcesPramod Gurav2014-10-071-55/+17
| | | | | | | | This change switch to managed resources to simplifies error handling and module unloading and does away with platform_driver remove function. Signed-off-by: Pramod Gurav <pramod.gurav@smartplayin.com> Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
* Input: evdev - fix EVIOCG{type} ioctlDmitry Torokhov2014-10-071-5/+8
| | | | | | | | | | | | The 'max' size passed into the function is measured in number of bits (KEY_MAX, LED_MAX, etc) so we need to convert it accordingly before trying to copy the data out, otherwise we will try copying too much and end up with up with a page fault. Reported-by: Pavel Machek <pavel@ucw.cz> Reviewed-by: Pavel Machek <pavel@ucw.cz> Reviewed-by: David Herrmann <dh.herrmann@gmail.com> Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
* Input: soc_button_array - convert to platform busJin Yao2014-09-252-31/+31
| | | | | | | | | | | | | | ACPI device enumeration mechanism changed a lot since 3.16-rc1. ACPI device objects with _HID will be enumerated to platform bus by default. For the existing PNP drivers that probe the PNPACPI devices, the device ids are listed explicitly in drivers/acpi/acpi_pnp.c. But ACPI folks will continue their effort on shrinking this id list by converting the PNP drivers to platform drivers, for the devices that don't belong to PNP bus in nature. Signed-off-by: Jin Yao <yao.jin@intel.com> Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
* Input: palmas-pwrbutton - fix typo in the license stringNishanth Menon2014-09-151-1/+1
| | | | | | | | | | | | | Follow the license string convention indicated in include/linux/module.h (don't capitalize v). This fixes following randconfig warning: FATAL: modpost: GPL-incompatible module palmas-pwrbutton.ko uses GPL-only symbol 'platform_driver_unregister' Fixes: adff5962fdd2 ("Input: introduce palmas-pwrbutton") Reported-by: Jim Davis <jim.epost@gmail.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
* Input: palmas-pwrbutton - use IRQF_ONESHOTNishanth Menon2014-09-151-1/+3
| | | | | | | | | | | | | | | | | | make C=2 CHECK="scripts/coccicheck" MODE=report COCCI=scripts/coccinelle/misc/irqf_oneshot.cocci ./drivers/input/misc/palmas-pwrbutton.o Reports: drivers/input/misc/palmas-pwrbutton.c:213:9-29: ERROR: Threaded IRQ with no primary handler requested without IRQF_ONESHOT Palmas power button just needs threaded IRQ handler since I2C operations are involved and there is nothing in non-threaded primary handler we could do. So mark the request with ONESHOT as it should have been done in these cases. Fixes: adff5962fdd2 ("Input: introduce palmas-pwrbutton") Reported-by: kbuild test robot <fengguang.wu@intel.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
* Input: psmouse - add support for detecting FocalTech PS/2 touchpadsHans de Goede2014-09-154-1/+91
| | | | | | | | | | | | | | | | | | | | The Asus X450 and X550 laptops use a PS/2 touchpad from a new manufacturer called FocalTech: https://bugzilla.kernel.org/show_bug.cgi?id=77391 https://bugzilla.redhat.com/show_bug.cgi?id=1110011 The protocol for these devices is not known at this time, but even without knowing the protocol they need some special handling. They get upset by some of our other PS/2 device probing, and once upset generate random mouse events making things unusable even with an external mouse. This patch adds detection of these devices based on their pnp ids, and when they are detected, treats them as a bare ps/2 mouse. Doing things this way they at least work in their ps/2 mouse emulation mode. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
* Input: psmouse - add psmouse_matches_pnp_id helper functionHans de Goede2014-09-133-14/+18
| | | | | | | | The matches_pnp_id function from the synaptics driver is useful for other drivers too. Make it a generic psmouse helper function. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
* Input: joystick - use ktime for measuring timingTakashi Iwai2014-09-122-20/+92
| | | | | | | | | | | | | | | | The current codes in gameport and analog joystick drivers for the time accounting have a long-standing problem when the system is running with CPU freq; since the timing is measured via TSC or sample counter, the calculation isn't reliable. In this patch, as a simple fix, use the standard ktime to measure the timing. In case where no high resolution timer is available, use_ktime bool option is provided to both modules. Setting use_ktime=false switches to the old methods. Tested-by: Clemens Ladisch <clemens@ladisch.de> Signed-off-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
* Input: add haptic driver on max77693Jaewon Kim2014-09-124-0/+378
| | | | | | | | | | | | This driver to supports the haptic controller on MAX77693 Multifunction device with PMIC, CHARGER, LED, MUIC, HAPTIC. This driver supports external pwm and LRA (Linear Resonant Actuator) motor. User can control the haptic device via force feedback framework. Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com> Acked-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
* Input: introduce palmas-pwrbuttonNishanth Menon2014-09-124-0/+377
| | | | | | | | | | | | | | | | | | | | Many palmas family of PMICs have support for interrupt based power button. This allows the device to notify the processor of external push button events over the shared palmas interrupt. However, this event is generated only during a "press" operation. Software is supposed to poll(sigh!) for detecting a release event. The PMIC also supports ability to power off independent of the software decisions when the button is pressed for a long duration if the PMIC is appropriately configured on the platform. Even though the function is similar to twl4030_pwrbutton, it is substantially different in operation to belong to a new driver of it's own. Based on original work done by Girish S Ghongdemath <girishsg@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
* Input: add support for the DRV2667 haptic driverDan Murphy2014-09-094-0/+529
| | | | | | | | | | | | | | Adding support for the DRV2667 haptic driver. This device has the ability to store vibration patterns in RAM and execute them once the GO bit is set. The initial driver sets a basic waveform in the first waveform sequence and will play the waveform when the GO bit is set and will continously play the waveform until the GO bit is unset. Data sheet is here: http://www.ti.com/product/drv2667 Signed-off-by: Dan Murphy <dmurphy@ti.com> Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
* Input: xpad - sync device IDs with xboxdrvBenjamin Valentin2014-09-081-0/+33
| | | | | | | | | | The userspace xboxdrv driver knows some more device ids than the kernel. This patch adds the missing xbox gamepads from [1] to xpad.c [1] https://github.com/Grumbel/xboxdrv/blob/master/src/xpad_device.cpp Signed-off-by: Benjamin Valentin <benpicco@zedat.fu-berlin.de> Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
* Input: xpad - add VID/PID for Razer SabertoothFrank Razenberg2014-09-081-0/+1
| | | | | | | | | The xpad driver recognizes Razer Sabertooth controllers as generic xbox controller, while it is really a 360 controller. This patch adds pid/vid mappings for the controller so that it is correctly recognized. Signed-off-by: Frank Razenberg <frank@zzattack.org> Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
* Input: cros_ec_keyb - optimize ghosting algorithmTodd Broch2014-09-041-43/+49
| | | | | | | | | | | | | | | | | Previous algorithm was a bit conservative and complicating with respect to identifying key ghosting. This CL uses the bitops hamming weight function (hweight8) to count the number of matching rows for colM & colN. If that number is > 1 ghosting is present. Additionally it removes NULL keys and our one virtual keypress KEY_BATTERY from consideration as these inputs are never physical keypresses. Signed-off-by: Todd Broch <tbroch@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Luigi Semenzato <semenzato@chromium.org> Tested-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
* Merge tag 'v3.17-rc3' into nextDmitry Torokhov2014-09-049970-448796/+428682
|\ | | | | | | Sync with mainline to bring in Chrome EC changes.
| * Linux 3.17-rc3v3.17-rc3Linus Torvalds2014-09-011-1/+1
| |
| * Merge tag 'xtensa-20140830' of git://github.com/czankel/xtensa-linuxLinus Torvalds2014-09-0124-217/+497
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull Xtensa updates from Chris Zankel: "Xtensa improvements for 3.17: - support highmem on cores with aliasing data cache. Enable highmem on kc705 by default - simplify addition of new core variants (no need to modify Kconfig / Makefiles) - improve robustness of unaligned access handler and its interaction with window overflow/underflow exception handlers - deprecate atomic and spill registers syscalls - clean up Kconfig: remove orphan MATH_EMULATION, sort 'select' statements - wire up renameat2 syscall. Various fixes: - fix address checks in dma_{alloc,free}_coherent (runtime BUG) - fix access to THREAD_RA/THREAD_SP/THREAD_DS (debug build breakage) - fix TLBTEMP_BASE_2 region handling in fast_second_level_miss (runtime unrecoverable exception) - fix a6 and a7 handling in fast_syscall_xtensa (runtime userspace register clobbering) - fix kernel/user jump out of fast_unaligned (potential runtime unrecoverabl exception) - replace termios IOCTL code definitions with constants (userspace build breakage)" * tag 'xtensa-20140830' of git://github.com/czankel/xtensa-linux: (25 commits) xtensa: deprecate fast_xtensa and fast_spill_registers syscalls xtensa: don't allow overflow/underflow on unaligned stack xtensa: fix a6 and a7 handling in fast_syscall_xtensa xtensa: allow single-stepping through unaligned load/store xtensa: move invalid unaligned instruction handler closer to its users xtensa: make fast_unaligned store restartable xtensa: add double exception fixup handler for fast_unaligned xtensa: fix kernel/user jump out of fast_unaligned xtensa: configure kc705 for highmem xtensa: support highmem in aliasing cache flushing code xtensa: support aliasing cache in kmap xtensa: support aliasing cache in k[un]map_atomic xtensa: implement clear_user_highpage and copy_user_highpage xtensa: fix TLBTEMP_BASE_2 region handling in fast_second_level_miss xtensa: allow fixmap and kmap span more than one page table xtensa: make fixmap region addressing grow with index xtensa: fix access to THREAD_RA/THREAD_SP/THREAD_DS xtensa: add renameat2 syscall xtensa: fix address checks in dma_{alloc,free}_coherent xtensa: replace IOCTL code definitions with constants ...
| | * Merge tag 'xtensa-for-next-20140815' into for_nextChris Zankel2014-08-1924-217/+497
| | |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Xtensa improvements for 3.17: - support highmem on cores with aliasing data cache. Enable highmem on kc705 by default; - simplify addition of new core variants (no need to modify Kconfig / Makefiles); - improve robustness of unaligned access handler and its interaction with window overflow/underflow exception handlers; - deprecate atomic and spill registers syscalls; - clean up Kconfig: remove orphan MATH_EMULATION, sort 'select' statements; - wire up renameat2 syscall. Various fixes: - fix address checks in dma_{alloc,free}_coherent (runtime BUG); - fix access to THREAD_RA/THREAD_SP/THREAD_DS (debug build breakage); - fix TLBTEMP_BASE_2 region handling in fast_second_level_miss (runtime unrecoverable exception); - fix a6 and a7 handling in fast_syscall_xtensa (runtime userspace register clobbering); - fix kernel/user jump out of fast_unaligned (potential runtime unrecoverable exception); - replace termios IOCTL code definitions with constants (userspace build breakage). Signed-off-by: Chris Zankel <chris@zankel.net>
| | | * xtensa: deprecate fast_xtensa and fast_spill_registers syscallsMax Filippov2014-08-142-0/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These syscalls are not used by userspace tools for some time now, and they have issues when called with invalid arguments. It's not worth changing signal delivery mechanism as we don't expect any new users for these syscalls. Let's keep them for backwards compatibility under #ifdef, disabled by default. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | | * xtensa: don't allow overflow/underflow on unaligned stackMax Filippov2014-08-143-7/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Double exceptions that happen during register window overflow/underflow are handled in the topmost stack frame, as if it was the only exception that occured. However unaligned access exception handler is special because it needs to analyze instruction that caused the exception, but the userspace instruction that triggered window exception is completely irrelevant. Unaligned data access is rather normal in the generic userspace code, but stack pointer manipulation must always be done by architecture-aware code and thus unaligned stack means a serious problem anyway. Use the default unaligned access handler that raises SIGBUS in case of unaligned access in window overflow/underflow handler. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | | * xtensa: fix a6 and a7 handling in fast_syscall_xtensaMax Filippov2014-08-141-7/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove restoring a6 on some return paths and instead modify and restore it in a single place, using symbolic name. Correctly restore a7 from PT_AREG7 in case of illegal a6 value. Cc: stable@vger.kernel.org Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | | * xtensa: allow single-stepping through unaligned load/storeMax Filippov2014-08-141-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update icount when icountlevel is non-zero but not greater than EXCM level when load/store instruction is successfully emulated. This allows single-stepping over such instruction in userspace debugger. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | | * xtensa: move invalid unaligned instruction handler closer to its usersMax Filippov2014-08-141-33/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With this change a threaded jump from .Linvalid_instruction_load to .Linvalid_instruction can be removed and more code may be added to common load/store exit path. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | | * xtensa: make fast_unaligned store restartableMax Filippov2014-08-141-32/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fast_unaligned may encounter DTLB miss or SEGFAULT during the store emulation. Don't update epc1 and lcount until after the store emulation is complete, so that the faulting store instruction could be replayed. Remove duplicate code handling zero overhead loops and calculate new epc1 and lcount in one place. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | | * xtensa: add double exception fixup handler for fast_unalignedMax Filippov2014-08-141-0/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fast_unaligned_fixup restores user registers and runs normal exception handler in the current stack frame. Unaligned load/store is retried after that. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | | * xtensa: fix kernel/user jump out of fast_unalignedMax Filippov2014-08-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Use correct register (a0, just read from the PS) to check user mode bit. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | | * xtensa: configure kc705 for highmemMax Filippov2014-08-141-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable all memory available on KC705 (1G - 128M) by default. Update memory node in DTS and also limit usable memory in bootargs in case memmap is passed from the bootloader. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | | * xtensa: support highmem in aliasing cache flushing codeMax Filippov2014-08-141-10/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use __flush_invalidate_dcache_page_alias with alias set to color of the page physical address instead of __flush_invalidate_dcache_page: this works for high memory pages and mapping/unmapping to the TLBTEMP area is virtually free. Allow building configurations with aliasing cache and highmem enabled. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | | * xtensa: support aliasing cache in kmapMax Filippov2014-08-142-2/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Define ARCH_PKMAP_COLORING and provide corresponding macro definitions on cores with aliasing data cache. Instead of single last_pkmap_nr maintain an array last_pkmap_nr_arr of pkmap counters for each page color. Make sure that kmap maps physical page at virtual address with color matching its physical address. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | | * xtensa: support aliasing cache in k[un]map_atomicMax Filippov2014-08-143-8/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Map high memory pages at virtual addresses with color that match color of their physical address. Existing cache alias management mechanisms may be used with such pages. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | | * xtensa: implement clear_user_highpage and copy_user_highpageMax Filippov2014-08-144-66/+127
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Existing clear_user_page and copy_user_page cannot be used with highmem because they calculate physical page address from its virtual address and do it incorrectly in case of high memory page mapped with kmap_atomic. Also kmap is not needed, as most likely userspace mapping color would be different from the kmapped color. Provide clear_user_highpage and copy_user_highpage functions that determine if temporary mapping is needed for the pages. Move most of the logic of the former clear_user_page and copy_user_page to xtensa/mm/cache.c only leaving temporary mapping setup, invalidation and clearing/copying in the xtensa/mm/misc.S. Rename these functions to clear_page_alias and copy_page_alias. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | | * xtensa: fix TLBTEMP_BASE_2 region handling in fast_second_level_missMax Filippov2014-08-142-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current definition of TLBTEMP_BASE_2 is always 32K above the TLBTEMP_BASE_1, whereas fast_second_level_miss handler for the TLBTEMP region analyzes virtual address bit (PAGE_SHIFT + DCACHE_ALIAS_ORDER) to determine TLBTEMP region where the fault happened. The size of the TLBTEMP region is also checked incorrectly: not 64K, but twice data cache way size (whicht may as well be less than the instruction cache way size). Fix TLBTEMP_BASE_2 to be TLBTEMP_BASE_1 + data cache way size. Provide TLBTEMP_SIZE that is a greater of doubled data cache way size or the instruction cache way size, and use it to determine if the second level TLB miss occured in the TLBTEMP region. Practical occurence of page faults in the TLBTEMP area is extremely rare, this code can be tested by deletion of all w[di]tlb instructions in the tlbtemp_mapping region. Cc: stable@vger.kernel.org Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | | * xtensa: allow fixmap and kmap span more than one page tableMax Filippov2014-08-141-16/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To support aliasing cache both kmap region sizes are multiplied by the number of data cache colors. After that expansion page tables that cover kmap regions may become larger than one page. Correctly allocate and initialize page tables in this case. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | | * xtensa: make fixmap region addressing grow with indexMax Filippov2014-08-142-6/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It's much easier to reason about alignment and coloring of regions located in the fixmap when fixmap index is just a PFN within the fixmap region. Change fixmap addressing so that index 0 corresponds to FIXADDR_START instead of the FIXADDR_TOP. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | | * xtensa: fix access to THREAD_RA/THREAD_SP/THREAD_DSMax Filippov2014-08-142-4/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With SMP and a lot of debug options enabled task_struct::thread gets out of reach of s32i/l32i instructions with base pointing at task_struct, breaking build with the following messages: arch/xtensa/kernel/entry.S: Assembler messages: arch/xtensa/kernel/entry.S:1002: Error: operand 3 of 'l32i.n' has invalid value '1048' arch/xtensa/kernel/entry.S:1831: Error: operand 3 of 's32i.n' has invalid value '1040' arch/xtensa/kernel/entry.S:1832: Error: operand 3 of 's32i.n' has invalid value '1044' Change base to point to task_struct::thread in such cases. Don't use a10 in _switch_to to save/restore prev pointer as a2 is not clobbered. Cc: stable@vger.kernel.org Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | | * xtensa: add renameat2 syscallMiklos Szeredi2014-08-141-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Miklos Szeredi <mszeredi@suse.cz> Cc: Chris Zankel <chris@zankel.net> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | | * xtensa: fix address checks in dma_{alloc,free}_coherentAlan Douglas2014-08-141-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Virtual address is translated to the XCHAL_KSEG_CACHED region in the dma_free_coherent, but is checked to be in the 0...XCHAL_KSEG_SIZE range. Change check for end of the range from 'addr >= X' to 'addr > X - 1' to handle the case of X == 0. Replace 'if (C) BUG();' construct with 'BUG_ON(C);'. Cc: stable@vger.kernel.org Signed-off-by: Alan Douglas <adouglas@cadence.com> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | | * xtensa: replace IOCTL code definitions with constantsMax Filippov2014-08-141-9/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes userspace code that builds on other architectures but fails on xtensa due to references to structures that other architectures don't refer to. E.g. this fixes the following issue with python-2.7.8: python-2.7.8/Modules/termios.c:861:25: error: invalid application of 'sizeof' to incomplete type 'struct serial_multiport_struct' {"TIOCSERGETMULTI", TIOCSERGETMULTI}, python-2.7.8/Modules/termios.c:870:25: error: invalid application of 'sizeof' to incomplete type 'struct serial_multiport_struct' {"TIOCSERSETMULTI", TIOCSERSETMULTI}, python-2.7.8/Modules/termios.c:900:24: error: invalid application of 'sizeof' to incomplete type 'struct tty_struct' {"TIOCTTYGSTRUCT", TIOCTTYGSTRUCT}, Cc: stable@vger.kernel.org Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | | * xtensa: remove orphan MATH_EMULATION symbolMax Filippov2014-08-144-8/+0
| | | | | | | | | | | | | | | | Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | | * xtensa: select HAVE_IDE only on platforms that may have itMax Filippov2014-08-142-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | HAVE_IDE is not a property of architecture but of a platform, and neither ISS or XTFPGA support it. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | | * xtensa: sort 'select' statements in KconfigMax Filippov2014-08-141-11/+11
| | | | | | | | | | | | | | | | Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | | * xtensa: make MMU-related configuration options depend on MMUMax Filippov2014-08-141-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | MMUv3 and HIGHMEM support are available only on configurations with MMU, don't show them otherwise. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | | * xtensa: simplify addition of new core variantsMax Filippov2014-08-142-6/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of adding new Kconfig options and Makefile rules for each new core variant provide XTENSA_VARIANT_CUSTOM variant and record variant name in the XTENSA_VARIANT_NAME variable. Adding new core variant now means providing directory structure under arch/xtensa/variant and specifying correct name in kernel configuration. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| * | | unicore32: Fix build errorGuenter Roeck2014-09-011-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | unicore32 builds fail with arch/unicore32/kernel/signal.c: In function ‘setup_frame’: arch/unicore32/kernel/signal.c:257: error: ‘usig’ undeclared (first use in this function) arch/unicore32/kernel/signal.c:279: error: ‘usig’ undeclared (first use in this function) arch/unicore32/kernel/signal.c: In function ‘handle_signal’: arch/unicore32/kernel/signal.c:306: warning: unused variable ‘tsk’ arch/unicore32/kernel/signal.c: In function ‘do_signal’: arch/unicore32/kernel/signal.c:376: error: implicit declaration of function ‘get_signsl’ make[1]: *** [arch/unicore32/kernel/signal.o] Error 1 make: *** [arch/unicore32/kernel/signal.o] Error 2 Bisect points to commit 649671c90eaf ("unicore32: Use get_signal() signal_setup_done()"). This code never even compiled. Reverting the patch does not work, since previously used functions no longer exist, so try to fix it up. Compile tested only. Fixes: 649671c90eaf ("unicore32: Use get_signal() signal_setup_done()") Cc: Richard Weinberger <richard@nod.at> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
| * | | Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-armLinus Torvalds2014-09-0110-39/+37
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM fixes from Russell King: "Various assorted fixes: - a couple of patches from Mark Rutland to resolve an errata with Cortex-A15 CPUs. - fix cpuidle for the CPU part ID changes in the last merge window - add support for a relocation which ARM binutils is generating in some circumstances" * 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: ARM: 8130/1: cpuidle/cpuidle-big_little: fix reading cpu id part number ARM: 8129/1: errata: work around Cortex-A15 erratum 830321 using dummy strex ARM: 8128/1: abort: don't clear the exclusive monitors ARM: 8127/1: module: add support for R_ARM_TARGET1 relocations
| | * | | ARM: 8130/1: cpuidle/cpuidle-big_little: fix reading cpu id part numberJuri Lelli2014-08-273-11/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit af040ffc9ba1 ("ARM: make it easier to check the CPU part number correctly") changed ARM_CPU_PART_X masks, and the way they are returned and checked against. Usage of read_cpuid_part_number() is now deprecated, and calling places updated accordingly. This actually broke cpuidle-big_little initialization, as bl_idle_driver_init() performs a check using an hardcoded mask on cpu_id. Create an interface to perform the check (that is now even easier to read). Define also a proper mask (ARM_CPU_PART_MASK) that makes this kind of checks cleaner and helps preventing bugs in the future. Update usage accordingly. Signed-off-by: Juri Lelli <juri.lelli@arm.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | | ARM: 8129/1: errata: work around Cortex-A15 erratum 830321 using dummy strexMark Rutland2014-08-273-16/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On revisions of Cortex-A15 prior to r3p3, a CLREX instruction at PL1 may falsely trigger a watchpoint exception, leading to potential data aborts during exception return and/or livelock. This patch resolves the issue in the following ways: - Replacing our uses of CLREX with a dummy STREX sequence instead (as we did for v6 CPUs). - Removing the clrex code from v7_exit_coherency_flush and derivatives, since this only exists as a minor performance improvement when non-cached exclusives are in use (Linux doesn't use these). Benchmarking on a variety of ARM cores revealed no measurable performance difference with this change applied, so the change is performed unconditionally and no new Kconfig entry is added. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Cc: stable@vger.kernel.org Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | | ARM: 8128/1: abort: don't clear the exclusive monitorsMark Rutland2014-08-272-12/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ARMv6 and ARMv7 early abort handlers clear the exclusive monitors upon entry to the kernel, but this is redundant: - We clear the monitors on every exception return since commit 200b812d0084 ("Clear the exclusive monitor when returning from an exception"), so this is not necessary to ensure the monitors are cleared before returning from a fault handler. - Any dummy STREX will target a temporary scratch area in memory, and may succeed or fail without corrupting useful data. Its status value will not be used. - Any other STREX in the kernel must be preceded by an LDREX, which will initialise the monitors consistently and will not depend on the earlier state of the monitors. Therefore we have no reason to care about the initial state of the exclusive monitors when a data abort is taken, and clearing the monitors prior to exception return (as we already do) is sufficient. This patch removes the redundant clearing of the exclusive monitors from the early abort handlers. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Will Deacon <will.deacon@arm.com> Cc: stable@vger.kernel.org Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | | ARM: 8127/1: module: add support for R_ARM_TARGET1 relocationsAndrey Ryabinin2014-08-272-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Kernel module build with GCOV profiling fails to load with the following error: $ insmod test_module.ko test_module: unknown relocation: 38 insmod: can't insert 'test_module.ko': invalid module format This happens because constructor pointers in the .init_array section have not supported R_ARM_TARGET1 relocation type. Documentation (ELF for the ARM Architecture) says: "The relocation must be processed either in the same way as R_ARM_REL32 or as R_ARM_ABS32: a virtual platform must specify which method is used." Since kernel expects to see absolute addresses in .init_array R_ARM_TARGET1 relocation type should be treated the same way as R_ARM_ABS32. Signed-off-by: Andrey Ryabinin <a.ryabinin@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | Merge tag 'fixes-for-linus' of ↵Linus Torvalds2014-09-0129-464/+133
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC fixes from Olof Johansson: "Here's the weekly batch of fixes from arm-soc. The delta is a largeish negative delta, due to revert of SMP support for Broadcom's STB SoC -- it was accidentally merged before some issues had been addressed, so they will make a new attempt for 3.18. I didn't see a need for a full revert of the whole platform due to this, we're keeping the rest enabled. The rest is mostly: - a handful of DT fixes for i.MX (Hummingboard/Cubox-i in particular) - some MTD/NAND fixes for OMAP - minor DT fixes for shmobile - warning fix for UP builds on vexpress/spc There's also a couple of patches that wires up hwmod on TI's DRA7 SoC so it can boot. Drivers and the rest had landed for 3.17, and it's small and isolated so it made sense to pick up now even if it's not a bugfix" * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (23 commits) vexpress/spc: fix a build warning on array bounds ARM: DRA7: hwmod: Add dra74x and dra72x specific ocp interface lists ARM: DRA7: Add support for soc_is_dra74x() and soc_is_dra72x() variants MAINTAINERS: catch special Rockchip code locations ARM: dts: microsom-ar8035: MDIO pad must be set open drain ARM: dts: omap54xx-clocks: Fix the l3 and l4 clock rates ARM: brcmstb: revert SMP support ARM: OMAP2+: hwmod: Rearm wake-up interrupts for DT when MUSB is idled ARM: dts: Enable UART wake-up events for beagleboard ARM: dts: Remove twl6030 clk32g "regulator" ARM: OMAP2+: omap_device: remove warning that clk alias already exists ARM: OMAP: fix %d confusingly prefixed with 0x in format string ARM: dts: DRA7: fix interrupt-cells for GPIO mtd: nand: omap: Fix 1-bit Hamming code scheme, omap_calculate_ecc() ARM: dts: omap3430-sdp: Revert to using software ECC for NAND ARM: OMAP2+: GPMC: Support Software ECC scheme via DT mtd: nand: omap: Revert to using software ECC by default ARM: dts: hummingboard/cubox-i: change SPDIF output to be more descriptive ARM: dts: hummingboard/cubox-i: add USB OC pinctrl configuration ARM: shmobile: r8a7791: add missing 0x0100 for SDCKCR ...