| Commit message (Collapse) | Author | Age | Files | Lines |
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Populate fsi_master_class->dev_attrs with the existing attribute
definitions, so we don't need to explicitly register.
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Acked-by: Alistair Popple <alistair@popple.id.au>
Link: https://lore.kernel.org/r/20191108051945.7109-3-joel@jms.id.au
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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This change adds a device class for FSI masters, allowing access under
/sys/class/fsi-master/, and easier udev rules.
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Acked-by: Alistair Popple <alistair@popple.id.au>
Link: https://lore.kernel.org/r/20191108051945.7109-2-joel@jms.id.au
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/westeri/thunderbolt into char-misc-next
Mika writes:
thunderbolt: Changes for v5.5 merge window
This adds Thunderbolt 3 support for the software connection manager. It
is currently only used in Apple systems. Previously the driver started
the firmware connection manager on those but it is not necessary anymore
with these patches (we still leave user an option to start the firmware
in case there are problems with the software connection manager).
This includes:
- Expose 'generation' attribute under each device in sysfs
- Converting register names to follow the USB4 spec.
- Lane bonding support
- Expose link speed and width in sysfs
- Display Port handshake needed for Titan Ridge devices
- Display Port pairing and resource management
- Display Port bandwidth management
* tag 'thunderbolt-for-v5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/westeri/thunderbolt: (21 commits)
thunderbolt: Do not start firmware unless asked by the user
thunderbolt: Add bandwidth management for Display Port tunnels
thunderbolt: Add Display Port adapter pairing and resource management
thunderbolt: Add Display Port CM handshake for Titan Ridge devices
thunderbolt: Add downstream PCIe port mappings for Alpine and Titan Ridge
thunderbolt: Expand controller name in tb_switch_is_xy()
thunderbolt: Add default linking between lane adapters if not provided by DROM
thunderbolt: Add support for lane bonding
thunderbolt: Refactor add_switch() into two functions
thunderbolt: Add helper macro to iterate over switch ports
thunderbolt: Make tb_sw_write() take const parameter
thunderbolt: Convert DP adapter register names to follow the USB4 spec
thunderbolt: Convert PCIe adapter register names to follow the USB4 spec
thunderbolt: Convert basic adapter register names to follow the USB4 spec
thunderbolt: Log error if adding switch fails
thunderbolt: Log switch route string on config read/write timeout
thunderbolt: Introduce tb_switch_is_icm()
thunderbolt: Add 'generation' attribute for devices
thunderbolt: Drop unnecessary read when writing LC command in Ice Lake
thunderbolt: Fix lockdep circular locking depedency warning
...
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Since now we can do pretty much the same thing in the software
connection manager than the firmware would do, there is no point
starting it by default. Instead we can just continue using the software
connection manager.
Make it possible for user to switch between the two by adding a module
pararameter (start_icm) which is by default false. Having this ability
to enable the firmware may be useful at least when debugging possible
issues with the software connection manager implementation.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
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Titan Ridge supports Display Port 1.4 which adds HBR3 (High Bit Rate)
rates that may be up to 8.1 Gb/s over 4 lanes. This translates to
effective data bandwidth of 25.92 Gb/s (as 8/10 encoding is removed by
the DP adapters when going over Thunderbolt fabric). If another high
rate monitor is connected we may need to reduce the bandwidth it
consumes so that it fits into the total 40 Gb/s available on the
Thunderbolt fabric.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
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To perform proper Display Port tunneling for Thunderbolt 3 devices we
need to allocate DP resources for DP IN port before they can be used.
The reason for this is that the user can also connect a monitor directly
to the Type-C ports in which case the Thunderbolt controller acts as
re-driver for Display Port (no tunneling takes place) taking the DP
sinks away from the connection manager. This allocation is done using
special sink allocation registers available through the link controller.
We can pair DP IN to DP OUT only if
* DP IN has sink allocated via link controller
* DP OUT port receives hotplug event
For DP IN adapters (only for the host router) we first query whether
there is DP resource available (it may be the previous instance of the
driver for example already allocated it) and if it is we add it to the
list. We then update the list when after each plug/unplug event to a DP
IN/OUT adapter. Each time the list is updated we try to find additional
DP IN <-> DP OUT pairs for tunnel establishment. This strategy also
makes it possible to establish another tunnel in case there are 3
monitors connected and one gets unplugged releasing the DP IN adapter
for the new tunnel.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
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Titan Ridge needs an additional connection manager handshake in order to
do proper Display Port tunneling so implement it here.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
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In order to keep PCIe hierarchies consistent across hotplugs, add
hard-coded PCIe downstream port to Thunderbolt port for Alpine Ridge and
Titan Ridge as well.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
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For a casual reader tb_switch_is_cr() does not tell much so instead
spell out the full controller name in the function name. For example
tb_switch_is_cr() becomes tb_switch_is_cactus_ridge() which is easier
to understand.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
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We currently read how sibling lane adapter ports relate each other from
DROM (Device ROM). If the two lane adapter ports go through the same
physical connector these lanes can then be bonded together. However,
some cases DROM does not provide this information or it is missing
completely (host routers typically do not have DROM). In this case we
have hard-coded the relationship.
Expand this to work with both legacy devices where lane adapter ports 1
and 2, and 3 and 4 are always linked together, and with USB4 devices
where lane adapter 1 is always following lane adapter 0 or is disabled
completely (see USB4 section 5.2.1 for more information).
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
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Lane bonding allows aggregating two 10/20 Gb/s (depending on the
generation) lanes into a single 20/40 Gb/s bonded link. This allows
sharing the full bandwidth more efficiently. In order to establish lane
bonding we need to check that lane bonding is possible through link
controller and that both ends of the link actually supports 2x widths.
This also means that all the paths should be established through the
primary port so update tb_path_alloc() to handle this as well.
Lane bonding is supported starting from Falcon Ridge (2nd generation)
controllers.
We also expose the current speed and number of lanes under each device
except the host router following similar attribute naming than USB bus.
Expose speed and number of lanes for both directions to allow possibility
of asymmetric link in the future.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
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Currently add_switch() takes a huge amount of parameters that makes it
hard to maintain. Instead of passing all those parameters we can split
the function into two parts (alloc and add) and fill the additional
switch fields directly in the functions calling those.
While there remove redundant error logging in case kmemdup() fails.
No functional changes.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
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There are quite many places in the driver where we iterate over each
port in the switch. To make it bit more convenient, add a macro that can
be used to iterate over each port and convert existing call sites to use it.
This is based on code by Lukas Wunner.
No functional changes.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
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The function does not modify the argument in any way so make it const.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
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Now that USB4 spec has names for these DP adapter registers we can use
them instead. This makes it easier to match certain register to the spec.
No functional changes.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
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Now that USB4 spec has names for these PCIe adapter registers we can use
them instead. This makes it easier to match certain register to the spec.
No functional changes.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
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Now that USB4 spec has names for these basic registers we can use them
instead. This makes it easier to match certain register to the spec.
No functional changes.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
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If we fail to add a switch for some reason log an error instead of
keeping silent. This is useful for debugging.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
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This helps to point out which switch config read/write triggered the
timeout.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
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We currently differentiate between SW CM (Software Connection Manager,
sometimes also called External Connection Manager) and ICM (Firmware
based Connection Manager, Internal Connection Manager) by looking
directly at the sw->config.enabled field which may be rather hard to
understand for the casual reader. For this reason introduce a wrapper
function with documentation that should make the intention more clear.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
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The read is not needed as we overwrite the returned value in the next
line anyway so drop it.
Fixes: 3cdb9446a117 ("thunderbolt: Add support for Intel Ice Lake")
Reported-by: Nicholas Johnson <nicholas.johnson-opensource@outlook.com.au>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
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When lockdep is enabled, plugging Thunderbolt dock on Dominik's laptop
triggers following splat:
======================================================
WARNING: possible circular locking dependency detected
5.3.0-rc6+ #1 Tainted: G T
------------------------------------------------------
pool-/usr/lib/b/1258 is trying to acquire lock:
000000005ab0ad43 (pci_rescan_remove_lock){+.+.}, at: authorized_store+0xe8/0x210
but task is already holding lock:
00000000bfb796b5 (&tb->lock){+.+.}, at: authorized_store+0x7c/0x210
which lock already depends on the new lock.
the existing dependency chain (in reverse order) is:
-> #1 (&tb->lock){+.+.}:
__mutex_lock+0xac/0x9a0
tb_domain_add+0x2d/0x130
nhi_probe+0x1dd/0x330
pci_device_probe+0xd2/0x150
really_probe+0xee/0x280
driver_probe_device+0x50/0xc0
bus_for_each_drv+0x84/0xd0
__device_attach+0xe4/0x150
pci_bus_add_device+0x4e/0x70
pci_bus_add_devices+0x2e/0x66
pci_bus_add_devices+0x59/0x66
pci_bus_add_devices+0x59/0x66
enable_slot+0x344/0x450
acpiphp_check_bridge.part.0+0x119/0x150
acpiphp_hotplug_notify+0xaa/0x140
acpi_device_hotplug+0xa2/0x3f0
acpi_hotplug_work_fn+0x1a/0x30
process_one_work+0x234/0x580
worker_thread+0x50/0x3b0
kthread+0x10a/0x140
ret_from_fork+0x3a/0x50
-> #0 (pci_rescan_remove_lock){+.+.}:
__lock_acquire+0xe54/0x1ac0
lock_acquire+0xb8/0x1b0
__mutex_lock+0xac/0x9a0
authorized_store+0xe8/0x210
kernfs_fop_write+0x125/0x1b0
vfs_write+0xc2/0x1d0
ksys_write+0x6c/0xf0
do_syscall_64+0x50/0x180
entry_SYSCALL_64_after_hwframe+0x49/0xbe
other info that might help us debug this:
Possible unsafe locking scenario:
CPU0 CPU1
---- ----
lock(&tb->lock);
lock(pci_rescan_remove_lock);
lock(&tb->lock);
lock(pci_rescan_remove_lock);
*** DEADLOCK ***
5 locks held by pool-/usr/lib/b/1258:
#0: 000000003df1a1ad (&f->f_pos_lock){+.+.}, at: __fdget_pos+0x4d/0x60
#1: 0000000095a40b02 (sb_writers#6){.+.+}, at: vfs_write+0x185/0x1d0
#2: 0000000017a7d714 (&of->mutex){+.+.}, at: kernfs_fop_write+0xf2/0x1b0
#3: 000000004f262981 (kn->count#208){.+.+}, at: kernfs_fop_write+0xfa/0x1b0
#4: 00000000bfb796b5 (&tb->lock){+.+.}, at: authorized_store+0x7c/0x210
stack backtrace:
CPU: 0 PID: 1258 Comm: pool-/usr/lib/b Tainted: G T 5.3.0-rc6+ #1
On an system using ACPI hotplug the host router gets hotplugged first and then
the firmware starts sending notifications about connected devices so the above
scenario should not happen in reality. However, after taking a second
look at commit a03e828915c0 ("thunderbolt: Serialize PCIe tunnel
creation with PCI rescan") that introduced the locking, I don't think it
is actually correct. It may have cured the symptom but probably the real
root cause was somewhere closer to PCI stack and possibly is already
fixed with recent kernels. I also tried to reproduce the original issue
with the commit reverted but could not.
So to keep lockdep happy and the code bit less complex drop calls to
pci_lock_rescan_remove()/pci_unlock_rescan_remove() in
tb_switch_set_authorized() effectively reverting a03e828915c0.
Link: https://lkml.org/lkml/2019/8/30/513
Fixes: a03e828915c0 ("thunderbolt: Serialize PCIe tunnel creation with PCI rescan")
Reported-by: Dominik Brodowski <linux@dominikbrodowski.net>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
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When we discover existing DP tunnels the code checks whether DP IN
adapter port is enabled by calling tb_dp_port_is_enabled() before it
continues the discovery process. On Light Ridge (gen 1) controller
reading only the first dword of the DP IN config space causes subsequent
access to the same DP IN port path config space to fail or return
invalid data as can be seen in the below splat:
thunderbolt 0000:07:00.0: CFG_ERROR(0:d): Invalid config space or offset
Call Trace:
tb_cfg_read+0xb9/0xd0
__tb_path_deactivate_hop+0x98/0x210
tb_path_activate+0x228/0x7d0
tb_tunnel_restart+0x95/0x200
tb_handle_hotplug+0x30e/0x630
process_one_work+0x1b4/0x340
worker_thread+0x44/0x3d0
kthread+0xeb/0x120
? process_one_work+0x340/0x340
? kthread_park+0xa0/0xa0
ret_from_fork+0x1f/0x30
If both DP In adapter config dwords are read in one go the issue does
not reproduce. This is likely firmware bug but we can work it around by
always reading the two dwords in one go. There should be no harm for
other controllers either so can do it unconditionally.
Link: https://lkml.org/lkml/2019/8/28/160
Reported-by: Brad Campbell <lists2009@fnarfbargle.com>
Tested-by: Brad Campbell <lists2009@fnarfbargle.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
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The Thunderbolt standard went through several major iterations, here
called generation. USB4, which will be based on Thunderbolt, will be
generation 4. Let userspace know the generation of the controller in
the devices in order to distinguish between Thunderbolt and USB4, so
it can be shown in various user interfaces.
Signed-off-by: Christian Kellner <christian@kellner.me>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
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The glitch detection HW (TRC) save it status information into
TRC status register.
Make it available to user-space via read-only sysfs file.
The TRC register is availab for PCH15 gen and newer, for older
platforms reading the sysfs file will fail with EOPNOTSUPP.
Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Link: https://lore.kernel.org/r/20191107104445.19101-1-tomas.winkler@intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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This is to allow working with mei devices embedded within
another pci device, where mei device is represented
as a platform child device and fw status registers
are not necessarily resident in the device pci config space.
Bump the copyright year to 2019 on the modified files.
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Link: https://lore.kernel.org/r/20191106223841.15802-4-tomas.winkler@intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Store irq number in hw struct to by used by synchronize_irq().
This is to allow working with mei devices
embedded within another pci devices, via MFD framework,
where mei device is represented as a platform device.
Bump the copyright year to 2019 on hw-me.c and hw-me.h
Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Link: https://lore.kernel.org/r/20191106223841.15802-3-tomas.winkler@intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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It's enough to bind mei_device with associated 'struct device' instead
of actual 'struct pci_dev'. This is to allow working with mei devices
embedded within another pci device, usually via MFD framework,
where mei device is represented as a platform device.
Bump copyright year to 2019 on effected files.
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Link: https://lore.kernel.org/r/20191106223841.15802-2-tomas.winkler@intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy into char-misc-next
Kishon writes:
phy: for 5.5
*) Add a new PHY driver for USB3 PHY on Allwinner H6 SoC
*) Add a new PHY driver for Innosilicon Video Combo PHY(MIPI/LVDS/TTL)
*) Add support in xusb-tegra210 PHY driver to get USB device mode functional
in Tegra 210
*) Add support for SM8150 QMP UFS PHY in phy-qcom-qmp PHY driver
*) Fix smatch warning (array off by one) in phy-rcar-gen2 PHY driver
*) Enable mac tx internal delay for rgmii-rxid in phy-gmii-sel driver
*) Fix phy-qcom-usb-hs from registering multiple extcon notifiers during PHY
power cycle
*) Use devm_platform_ioremap_resource() in phy-mvebu-a3700-utmi,
phy-hisi-inno-usb2, phy-histb-combphy and regulator_bulk_set_supply_names()
in xusb to simplify code
*) Remove unused variable in xusb-tegra210 and phy-dm816x-usb
*) Fix sparse warnings in phy-brcm-usb-init
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* tag 'phy-for-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy: (28 commits)
phy: phy-rockchip-inno-usb2: add phy description for px30
phy: qcom-usb-hs: Fix extcon double register after power cycle
phy: renesas: phy-rcar-gen2: Fix the array off by one warning
phy: lantiq: vrx200-pcie: fix error return code in ltq_vrx200_pcie_phy_power_on()
dt-bindings: phy: add yaml binding for rockchip,px30-dsi-dphy
phy/rockchip: Add support for Innosilicon MIPI/LVDS/TTL PHY
phy: add PHY_MODE_LVDS
phy: allwinner: add phy driver for USB3 PHY on Allwinner H6 SoC
dt-bindings: Add bindings for USB3 phy on Allwinner H6
phy: qcom-qmp: Add SM8150 QMP UFS PHY support
dt-bindings: phy-qcom-qmp: Add sm8150 UFS phy compatible string
phy: ti: gmii-sel: fix mac tx internal delay for rgmii-rxid
phy: tegra: use regulator_bulk_set_supply_names()
phy: ti: dm816x: remove set but not used variable 'phy_data'
phy: renesas: rcar-gen3-usb2: Fix sysfs interface of "role"
phy: tegra: xusb: Add vbus override support on Tegra186
phy: tegra: xusb: Add vbus override support on Tegra210
phy: tegra: xusb: Add usb3 port fake support on Tegra210
phy: tegra: xusb: Add XUSB dual mode support on Tegra210
dt-bindings: rcar-gen3-phy-usb3: Add r8a774b1 support
...
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The px30 soc from Rockchip shares the same register description as
the rk3328, so can re-use its definitions.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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Commit f0b5c2c96370 ("phy: qcom-usb-hs: Replace the extcon API")
switched from extcon_register_notifier() to the resource-managed
API, i.e. devm_extcon_register_notifier().
This is problematic in this case, because the extcon notifier
is dynamically registered/unregistered whenever the PHY is powered
on/off. The resource-managed API does not unregister the notifier
until the driver is removed, so as soon as the PHY is power cycled,
attempting to register the notifier again results in:
double register detected
WARNING: CPU: 1 PID: 182 at kernel/notifier.c:26 notifier_chain_register+0x74/0xa0
Call trace:
...
extcon_register_notifier+0x74/0xb8
devm_extcon_register_notifier+0x54/0xb8
qcom_usb_hs_phy_power_on+0x1fc/0x208
...
... and USB stops working after plugging the cable out and in
another time.
The easiest way to fix this is to make a partial revert of
commit f0b5c2c96370 ("phy: qcom-usb-hs: Replace the extcon API")
and avoid using the resource-managed API in this case.
Fixes: f0b5c2c96370 ("phy: qcom-usb-hs: Replace the extcon API")
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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Fix the below smatch warning by adding variable check rather than the
hardcoded value.
warn: array off by one? 'data->select_value[channel_num]'
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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ltq_vrx200_pcie_phy_power_on()
Fix to return a negative error code from the error handling
case instead of 0, as done elsewhere in this function.
Fixes: e52a632195bf ("phy: lantiq: vrx200-pcie: add a driver for the Lantiq VRX200 PCIe PHY")
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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This adds a yaml binding for the external dsi phy found on Rockchip
socs of the px30, rk3128 and rk3368 variants.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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The Innosilicon Video Combo PHY not only supports MIPI DSI,
but also LVDS and TTL functions with small die size and low
pin count. Customers can choose according to their own applications.
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
[removed TTL mode for now, as it required a hook back into the dsi host]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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There are combo phys out there that can be switched between doing
dsi and lvds. So add a mode definition for it.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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Allwinner H6 SoC contains a USB3 PHY (with USB2 DP/DM lines also
controlled).
Add a driver for it.
The register operations in this driver is mainly extracted from the BSP
USB3 driver.
Signed-off-by: Ondrej Jirman <megous@megous.com>
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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The new Allwinner H6 SoC contains a USB3 PHY that is wired to the
external USB3 pins of the SoC.
Add a device tree binding for the PHY.
Signed-off-by: Ondrej Jirman <megous@megous.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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SM8150 UFS PHY is v4 of QMP phy. Add support for V4 QMP phy register
defines and support for SM8150 QMP UFS PHY.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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Document "qcom,sdm845-qmp-ufs-phy" compatible string for QMP UFS PHY
found on SM8150.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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Now phy-gmii-sel will disable MAC TX internal delay for PHY interface mode
"rgmii-rxid" which is incorrect.
Hence, fix it by enabling MAC TX internal delay in the case of "rgmii-rxid"
mode.
Fixes: 92b58b34741f ("phy: ti: introduce phy-gmii-sel driver")
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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Use the new regulator helper instead of a for loop.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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Fixes gcc '-Wunused-but-set-variable' warning:
drivers/phy/ti/phy-dm816x-usb.c:192:29: warning:
variable phy_data set but not used [-Wunused-but-set-variable]
It is never used, so can be removed.
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Reviewed-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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Since the role_store() uses strncmp(), it's possible to refer
out-of-memory if the sysfs data size is smaller than strlen("host").
This patch fixes it by using sysfs_streq() instead of strncmp().
Reported-by: Pavel Machek <pavel@denx.de>
Fixes: 9bb86777fb71 ("phy: rcar-gen3-usb2: add sysfs for usb role swap")
Cc: <stable@vger.kernel.org> # v4.10+
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Pavel Machek <pavel@denx.de>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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Tegra XUSB device control driver needs to control vbus override
during its operations, add API for the support.
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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Tegra XUSB device control driver needs to control vbus override
during its operations, add API for the support.
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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On Tegra210, usb2 only otg/peripheral ports dont work in device mode.
They need an assosciated usb3 port to work in device mode. Identify
an unused usb3 port and assign it as a fake USB3 port to USB2 only
port whose mode is otg/peripheral.
Based on work by BH Hsieh <bhsieh@nvidia.com>.
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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Configure the port capabilities based on usb_dr_mode settings.
Based on work by JC Kuo <jckuo@nvidia.com>.
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: JC Kuo <jckuo@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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Document RZ/G2N (R8A774B1) SoC bindings.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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