summaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* LoongArch: Add process managementHuacai Chen2022-06-0314-0/+1865
| | | | | | | | | Add process management support for LoongArch, including: thread info definition, context switch and process tracing. Reviewed-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
* LoongArch: Add exception/interrupt handlingHuacai Chen2022-06-0316-0/+1575
| | | | | | | | | Add the exception and interrupt handling machanism for basic LoongArch support. Reviewed-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
* LoongArch: Add boot and setup routinesHuacai Chen2022-06-0318-0/+1738
| | | | | | | | | | | | | | | | | | | | | | Add basic boot, setup and reset routines for LoongArch. Now, LoongArch machines use UEFI-based firmware. The firmware passes configuration information to the kernel via ACPI and DMI/SMBIOS. Currently an existing interface between the kernel and the bootloader is implemented. Kernel gets 2 values from the bootloader, passed in registers a0 and a1; a0 is an "EFI boot flag" distinguishing UEFI and non-UEFI firmware, while a1 is a pointer to an FDT with systable, memmap, cmdline and initrd information. The standard UEFI boot protocol (EFISTUB) will be added later. Cc: linux-efi@vger.kernel.org Cc: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Co-developed-by: Yun Liu <liuyun@loongson.cn> Signed-off-by: Yun Liu <liuyun@loongson.cn> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
* LoongArch: Add other common headersHuacai Chen2022-06-0318-0/+917
| | | | | | | | Add some other common headers for basic LoongArch support. Reviewed-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
* LoongArch: Add atomic/locking headersHuacai Chen2022-06-037-0/+756
| | | | | | | | | Add common headers (atomic, bitops, barrier and locking) for basic LoongArch support. Reviewed-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
* LoongArch: Add CPU definition headersHuacai Chen2022-06-038-0/+2191
| | | | | | | | | Add common headers (CPU definition and address space layout) for basic LoongArch support. Reviewed-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
* LoongArch: Add build infrastructureHuacai Chen2022-06-0317-1/+701
| | | | | | | | | | Add Kbuild, Makefile, Kconfig and link script for LoongArch build infrastructure. Reviewed-by: Guo Ren <guoren@kernel.org> Reviewed-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
* LoongArch: Add writecombine support for drmHuacai Chen2022-06-033-2/+10
| | | | | | | | | | | | | LoongArch maintains cache coherency in hardware, but its WUC attribute (Weak-ordered UnCached, which is similar to WC) is out of the scope of cache coherency machanism. This means WUC can only used for write-only memory regions. Cc: Daniel Vetter <daniel@ffwll.ch> Cc: dri-devel@lists.freedesktop.org Reviewed-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
* LoongArch: Add ELF-related definitionsHuacai Chen2022-06-035-0/+14
| | | | | | | | | | Add ELF-related definitions for LoongArch, including: EM_LOONGARCH, KEXEC_ARCH_LOONGARCH, AUDIT_ARCH_LOONGARCH32, AUDIT_ARCH_LOONGARCH64 and NT_LOONGARCH_*. Reviewed-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
* Documentation/zh_CN: Add basic LoongArch documentationsHuacai Chen2022-06-035-0/+541
| | | | | | | | | | | | | | | Add some basic documentation (zh_CN version) for LoongArch. LoongArch is a new RISC ISA, which is a bit like MIPS or RISC-V. LoongArch includes a reduced 32-bit version (LA32R), a standard 32-bit version (LA32S) and a 64-bit version (LA64). Reviewed-by: Alex Shi <alexs@kernel.org> Reviewed-by: Yanteng Si <siyanteng@loongson.cn> Reviewed-by: Guo Ren <guoren@kernel.org> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Co-developed-by: WANG Xuerui <git@xen0n.name> Signed-off-by: WANG Xuerui <git@xen0n.name> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
* Documentation: LoongArch: Add basic documentationsHuacai Chen2022-06-035-0/+568
| | | | | | | | | | | | | Add some basic documentation for LoongArch. LoongArch is a new RISC ISA, which is a bit like MIPS or RISC-V. LoongArch includes a reduced 32-bit version (LA32R), a standard 32-bit version (LA32S) and a 64-bit version (LA64). Tested-by: Bagas Sanjaya <bagasdotme@gmail.com> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Co-developed-by: WANG Xuerui <git@xen0n.name> Signed-off-by: WANG Xuerui <git@xen0n.name> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
* irqchip/loongson-liointc: Fix build error for LoongArchHuacai Chen2022-06-031-1/+5
| | | | | | | | | | liointc driver is shared by MIPS and LoongArch, this patch adjust the code to fix build error for LoongArch. Acked-by: Marc Zyngier <maz@kernel.org> Reviewed-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
* irqchip: Adjust Kconfig for LoongsonHuacai Chen2022-06-031-3/+3
| | | | | | | | | | | HTVEC will be shared by both MIPS-based and LoongArch-based Loongson processors (not only Loongson-3), so we adjust its description. HTPIC is only used by MIPS-based Loongson, so we add a MIPS dependency. Acked-by: Marc Zyngier <maz@kernel.org> Reviewed-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
* Merge tag 'docs-5.19-2' of git://git.lwn.net/linuxLinus Torvalds2022-06-037-8/+2056
|\ | | | | | | | | | | | | | | | | | | | | | | | | Pull documentation fixes from Jonathan Corbet: "A handful of late-arriving documentation fixes and the addition of an SVG tux logo which, I'm assured, we're going to want" * tag 'docs-5.19-2' of git://git.lwn.net/linux: documentation: Format button_dev as a pointer. docs: add SVG version of the Linux logo docs: move Linux logo into a new `images` folder docs: blockdev: change title to match section content docs/conf.py: Cope with removal of language=None in Sphinx 5.0.0
| * documentation: Format button_dev as a pointer.Nelson Penn2022-06-011-3/+3
| | | | | | | | | | | | | | | | | | | | | | The docs on creating an input device driver have an example in which button_dev is a pointer to an input_dev struct. However, in two code snippets below, button_dev is used as if it is not a pointer. Make these occurrences of button_dev reflect that it is a pointer. Signed-off-by: Nelson Penn <nelsonapenn@protonmail.com> Link: https://lore.kernel.org/r/20220522194953.12097-1-nelsonapenn@protonmail.com Signed-off-by: Jonathan Corbet <corbet@lwn.net>
| * docs: add SVG version of the Linux logoMiguel Ojeda2022-06-012-0/+2048
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the Rust for Linux patch series, Jonathan Corbet requested [1] that we avoid binary assets (such as the logo), possibly by recreating them in SVG format. However, it turns out there is no SVG version of the Linux logo in the kernel tree yet, only a GIF one from the pre-v2.0.0 days. This patch fixes that by adding a SVG version of the Linux logo, which we could then use in the Rust for Linux documentation and other similar places. This is a vector re-illustration by Garrett LeSage of the original logo by Larry Ewing, plus cleanups by IFo Hancroft. The file was imported as-is from: https://github.com/garrett/Tux/blob/ecd40de64250ea2b24c849e901c3297ad01e54f6/tux.svg The stated license in the repository is: > Public domain http://creativecommons.org/publicdomain/zero/1.0/ > > ...but, if anyone asks: > > Tux was originally made by Larry Ewing in the Gimp, re-illustrated > in vector by Garrett LeSage, using Inkscape and refined and > cleaned up by IFo Hancroft. Here, the acknowledgement requirement has been made mandatory to match the wording of the existing GIF logo in `COPYING-logo`. Both Garrett LeSage and IFo Hancroft gave their permission [2,3] to use their re-illustration with the license as given in the `COPYING-logo` file. Link: https://lore.kernel.org/lkml/87fspk1xoc.fsf@meer.lwn.net/ [1] Link: https://lore.kernel.org/lkml/YgFsD7zBZyVqyF+F@battlestation/ [2] Link: https://lore.kernel.org/lkml/CAFfNkxV=DmRJL1Oqm3w9YzBYcNLSAG3Ss8pih9ZVwh_E-Fbw+Q@mail.gmail.com/ [3] Signed-off-by: Miguel Ojeda <ojeda@kernel.org> Link: https://lore.kernel.org/r/20220528153132.8636-2-ojeda@kernel.org Signed-off-by: Jonathan Corbet <corbet@lwn.net>
| * docs: move Linux logo into a new `images` folderMiguel Ojeda2022-06-013-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Having assets in the top-level `Documentation` directory can make it harder to find the documents one needs, especially if we want to add more of them later on. Instead, create a new `images` folder inside it that is used to hold assets such as logos. In addition, update the reference in `scripts/spdxcheck-test.sh`. Link: https://lore.kernel.org/lkml/8735hicoy7.fsf@meer.lwn.net/ Suggested-by: Jonathan Corbet <corbet@lwn.net> Signed-off-by: Miguel Ojeda <ojeda@kernel.org> Link: https://lore.kernel.org/r/20220528153132.8636-1-ojeda@kernel.org Signed-off-by: Jonathan Corbet <corbet@lwn.net>
| * docs: blockdev: change title to match section contentJoel Colledge2022-06-011-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | This index.rst was added in commit 39443104c7d3 docs: blockdev: convert to ReST It appears that the title from the RapidIO index page was copied. This title does not match the content of this directory. Change it to match. Signed-off-by: Joel Colledge <joel.colledge@linbit.com> Link: https://lore.kernel.org/r/20220530142849.717-1-joel.colledge@linbit.com Signed-off-by: Jonathan Corbet <corbet@lwn.net>
| * docs/conf.py: Cope with removal of language=None in Sphinx 5.0.0Akira Yokosawa2022-06-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | One of the changes in Sphinx 5.0.0 [1] says [sic]: 5.0.0 final - #10474: language does not accept None as it value. The default value of language becomes to 'en' now. [1]: https://www.sphinx-doc.org/en/master/changes.html#release-5-0-0-released-may-30-2022 It results in a new warning from Sphinx 5.0.0 [sic]: WARNING: Invalid configuration value found: 'language = None'. Update your configuration to a valid langauge code. Falling back to 'en' (English). Silence the warning by using 'en'. It works with all the Sphinx versions required for building kernel documentation (1.7.9 or later). Signed-off-by: Akira Yokosawa <akiyks@gmail.com> Link: https://lore.kernel.org/r/bd0c2ddc-2401-03cb-4526-79ca664e1cbe@gmail.com Cc: stable@vger.kernel.org Signed-off-by: Jonathan Corbet <corbet@lwn.net>
* | Merge tag 'asm-generic-fixes-5.19' of ↵Linus Torvalds2022-06-034-11/+11
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic Pull asm-generic fixes from Arnd Bergmann: "The header cleanup series from Masahiro Yamada ended up causing some regressions in the ABI because of an ambigous uid_t type. This was only caught after the original patches got merged, but at least the fixes are trivial and hopefully complete" * tag 'asm-generic-fixes-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic: binder: fix sender_euid type in uapi header sparc: fix mis-use of __kernel_{uid,gid}_t in uapi/asm/stat.h powerpc: use __kernel_{uid,gid}32_t in uapi/asm/stat.h mips: use __kernel_{uid,gid}32_t in uapi/asm/stat.h
| * | binder: fix sender_euid type in uapi headerCarlos Llamas2022-06-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The {pid,uid}_t fields of struct binder_transaction were recently replaced to use kernel types in commit 169adc2b6b3c ("android/binder.h: add linux/android/binder(fs).h to UAPI compile-test coverage"). However, using __kernel_uid_t here breaks backwards compatibility in architectures using 16-bits for this type, since glibc and some others still expect a 32-bit uid_t. Instead, let's use __kernel_uid32_t which avoids this compatibility problem. Fixes: 169adc2b6b3c ("android/binder.h: add linux/android/binder(fs).h to UAPI compile-test coverage") Reported-by: Christopher Ferris <cferris@google.com> Signed-off-by: Carlos Llamas <cmllamas@google.com> Acked-by: Todd Kjos <tkjos@google.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | sparc: fix mis-use of __kernel_{uid,gid}_t in uapi/asm/stat.hMasahiro Yamada2022-06-021-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 31a088b664d6 ("sparc: add asm/stat.h to UAPI compile-test coverage") converted as follows: uid_t --> __kernel_uid_t gid_t --> __kernel_gid_t It changed the field widths of struct stat because Sparc uses 16-bits for ___kernel_{uid,gid}_t as in arch/sparc/include/uapi/asm/posix_types.h. The safe replacements across all architectures are: uid_t --> __kernel_uid32_t gid_t --> __kernel_gid32_t as defined in include/linux/types.h. A similar issue was reported for the android binder. [1] [1]: https://lore.kernel.org/all/20220601010017.2639048-1-cmllamas@google.com/ Fixes: 31a088b664d6 ("sparc: add asm/stat.h to UAPI compile-test coverage") Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | powerpc: use __kernel_{uid,gid}32_t in uapi/asm/stat.hMasahiro Yamada2022-06-021-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit c01013a2f8dd ("powerpc: add asm/stat.h to UAPI compile-test coverage") converted as follows: uid_t --> __kernel_uid_t gid_t --> __kernel_gid_t The bit width of __kernel_{uid,gid}_t is 16 or 32-bits depending on architectures. PPC uses 32-bits for them as in include/uapi/asm-generic/posix_types.h, so the previous conversion is probably fine, but let's stick to the arch-independent conversion just in case. The safe replacements across all architectures are: uid_t --> __kernel_uid32_t gid_t --> __kernel_gid32_t as defined in include/linux/types.h. A similar issue was reported for the android binder. [1] [1]: https://lore.kernel.org/all/20220601010017.2639048-1-cmllamas@google.com/ Fixes: c01013a2f8dd ("powerpc: add asm/stat.h to UAPI compile-test coverage") Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | mips: use __kernel_{uid,gid}32_t in uapi/asm/stat.hMasahiro Yamada2022-06-021-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 8c1a381a4fbb ("mips: add asm/stat.h to UAPI compile-test coverage") converted as follows: uid_t --> __kernel_uid_t gid_t --> __kernel_gid_t The bit width of __kernel_{uid,gid}_t is 16 or 32-bits depending on architectures. MIPS uses 32-bits for them as in include/uapi/asm-generic/posix_types.h, so the previous conversion is probably fine, but let's stick to the arch-independent conversion just in case. The safe replacements across all architectures are: uid_t --> __kernel_uid32_t gid_t --> __kernel_gid32_t as defined in include/linux/types.h. A similar issue was reported for the android binder. [1] [1]: https://lore.kernel.org/all/20220601010017.2639048-1-cmllamas@google.com/ Fixes: 8c1a381a4fbb ("mips: add asm/stat.h to UAPI compile-test coverage") Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* | | Merge tag 'arm-late-5.19' of ↵Linus Torvalds2022-06-0363-101/+1385
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull more ARM SoC updates from Arnd Bergmann: "This is the second part of the general SoC updates, containing everything that did not make it in the initial pull request, or that came in as a bugfix later. - Devicetree updates for SoCFPGA, ASPEED, AT91 and Rockchip, including a new machine using an ASPEED BMC. - More DT fixes from Krzysztof Kozlowski across platforms - A new SoC platform for the GXP baseboard management controller, used in current server products from HPE" * tag 'arm-late-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (56 commits) ARM: configs: Enable more audio support for i.MX tee: optee: Pass a pointer to virt_addr_valid() arm64: dts: rockchip: rename Quartz64-A bluetooth gpios arm64: dts: rockchip: add clocks property to cru node rk3368 arm64: dts: rockchip: add clocks property to cru node rk3308 arm64: dts: rockchip: add clocks to rk356x cru ARM: dts: rockchip: add clocks property to cru node rk3228 ARM: dts: rockchip: add clocks property to cru node rk3036 ARM: dts: rockchip: add clocks property to cru node rk3066a/rk3188 ARM: dts: rockchip: add clocks property to cru node rk3288 ARM: dts: rockchip: Remove "amba" bus nodes from rv1108 ARM: dts: rockchip: add clocks property to cru node rv1108 arm64: dts: sprd: use new 'dma-channels' property ARM: dts: da850: use new 'dma-channels' property ARM: dts: pxa: use new 'dma-channels/requests' properties soc: ixp4xx/qmgr: Fix unused match warning ARM: ep93xx: Make ts72xx_register_flash() static ARM: configs: enable support for Kontron KSwitch D10 ep93xx: clock: Do not return the address of the freed memory arm64: dts: intel: add device tree for n6000 ...
| * \ \ Merge tag 'optee-warning-for-v5.19' of ↵Arnd Bergmann2022-05-301-1/+1
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://git.linaro.org/people/jens.wiklander/linux-tee into arm/late Fix a compiler warning in OP-TEE driver * tag 'optee-warning-for-v5.19' of https://git.linaro.org/people/jens.wiklander/linux-tee: tee: optee: Pass a pointer to virt_addr_valid() Link: https://lore.kernel.org/r/20220530112612.GA1511426@jade Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * | | tee: optee: Pass a pointer to virt_addr_valid()Linus Walleij2022-05-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A pointer into virtual memory is represented by a (void *) not an u32, so the compiler warns: drivers/tee/optee/call.c:365:29: warning: passing argument 1 of 'virt_to_pfn' makes pointer from integer without a cast [-Wint-conversion] Fix this with an explicit cast. Cc: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Sumit Garg <sumit.garg@linaro.org> [jw: fixed merge conflict] Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
| * | | | ARM: configs: Enable more audio support for i.MXMark Brown2022-05-301-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The generic audio card for Freescale platforms is used by a wide range of i.MX systems and also has selects for the various audio controllers used on them so will help with systems that don't use that specific card too. Signed-off-by: Mark Brown <broonie@kernel.org> Reviewed-by: Fabio Estevam <festevam@gmail.com> Link: https://lore.kernel.org/r/20220513121258.168364-1-broonie@kernel.org' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | | | Merge tag 'socfpga_dts_updates_for_v5.19' of ↵Arnd Bergmann2022-05-309-8/+128
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/late SoCFPGA dts updates for v5.19 - dtschema fix SPI NOR node - correct dt-bindings doc for Altera gpio driver - add support for n6000 Agilex platform and dt-bindings documentation * tag 'socfpga_dts_updates_for_v5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: arm64: dts: intel: add device tree for n6000 dt-bindings: intel: add binding for Intel n6000 dt-bindings: soc: add bindings for Intel HPS Copy Engine dt-bindings: gpio: altera: correct interrupt-cells ARM: dts: socfpga: align SPI NOR node name with dtschema Link: https://lore.kernel.org/r/20220519232317.16079-1-dinguyen@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * | | | arm64: dts: intel: add device tree for n6000Matthew Gerlach2022-05-202-1/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a device tree for the n6000 instantiation of Agilex Hard Processor System (HPS). Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
| | * | | | dt-bindings: intel: add binding for Intel n6000Matthew Gerlach2022-05-201-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the binding string for the Agilex based Intel n6000 board. Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
| | * | | | dt-bindings: soc: add bindings for Intel HPS Copy EngineMatthew Gerlach2022-05-201-0/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add device tree bindings documentation for the Intel Hard Processor System (HPS) Copy Engine. Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
| | * | | | dt-bindings: gpio: altera: correct interrupt-cellsDinh Nguyen2022-05-121-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | update documentation to correctly state the interrupt-cells to be 2. Cc: stable@vger.kernel.org Fixes: 4fd9bbc6e071 ("drivers/gpio: Altera soft IP GPIO driver devicetree binding") Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
| | * | | | ARM: dts: socfpga: align SPI NOR node name with dtschemaKrzysztof Kozlowski2022-05-124-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The node names should be generic and SPI NOR dtschema expects "flash". Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
| * | | | | Merge tag 'aspeed-5.19-devicetree' of ↵Arnd Bergmann2022-05-309-55/+431
| |\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc into arm/late ASPEED device tree updates for 5.19 - New machine: * Nuvia's DC-SCM BMC - Enable AST2600 GFX, the BMC-driven graphics device - Add a bunch of devices for the AST2600 EVB - Updates to the AST2600 Bletchley machine - Backwards compatible changes to support the new spi-mem based SPI NOR driver * tag 'aspeed-5.19-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc: ARM: dts: aspeed: ast2600-evb: Enable GFX device ARM: dts: aspeed: Add GFX node to AST2600 ARM: dts: aspeed: ast2600-evb: Enable virtual hub ARM: dts: aspeed: ast2600-evb: Enable video engine ARM: dts: aspeed: everest, rainier: Add power-ffs-sync-history GPIO ARM: dts: aspeed: Add Nuvia DC-SCM BMC ARM: dts: aspeed: bletchley: add sample averaging for ADM1278 ARM: dts: aspeed: bletchley: add eeprom node on each sled ARM: dts: aspeed: bletchley: add pca9536 node on each sled ARM: dts: aspeed: bletchley: update gpio0 line names ARM: dts: aspeed: bletchley: Enable mdio0 bus ARM: dts: aspeed: bletchley: switch spi2 driver to aspeed-smc ARM: dts: aspeed: bletchley: enable ehci0 device node ARM: dts: aspeed: Add USB2.0 device controller node ARM: dts: aspeed-g4: Set spi-max-frequency for all flashes ARM: dts: aspeed: Enable Dual SPI RX transfers ARM: dts: aspeed: Adjust "reg" property of FMC/SPI controllers ARM: dts: aspeed: ast2600-evb: Enable RX delay for MAC0/MAC1 Link: https://lore.kernel.org/r/CACPK8XfUmFxU8Y6C+aZ2+=dT7=fCfs2=2_aYqyRjoXCoeQaUWQ@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * | | | | ARM: dts: aspeed: ast2600-evb: Enable GFX deviceJoel Stanley2022-05-191-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the GFX device with a framebuffer memory region. Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Tommy Haung <tommy_huang@aspeedtech.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20220302024930.18758-3-tommy_huang@aspeedtech.com Signed-off-by: Joel Stanley <joel@jms.id.au>
| | * | | | | ARM: dts: aspeed: Add GFX node to AST2600Joel Stanley2022-05-191-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The GFX device is present in the AST2600 SoC. Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Tommy Haung <tommy_huang@aspeedtech.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20220302024930.18758-2-tommy_huang@aspeedtech.com Signed-off-by: Joel Stanley <joel@jms.id.au>
| | * | | | | ARM: dts: aspeed: ast2600-evb: Enable virtual hubHoward Chiu2022-05-191-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable Aspeed VHub for HID emulation Signed-off-by: Howard Chiu <howard_chiu@aspeedtech.com> Link: https://lore.kernel.org/r/SG2PR06MB23155E8A6193118544A7DBF3E61E9@SG2PR06MB2315.apcprd06.prod.outlook.com Signed-off-by: Joel Stanley <joel@jms.id.au>
| | * | | | | ARM: dts: aspeed: ast2600-evb: Enable video engineHoward Chiu2022-05-191-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable video engine and reserve memory for it. Signed-off-by: Howard Chiu <howard_chiu@aspeedtech.com> Link: https://lore.kernel.org/r/SG2PR06MB23159B914BF7EF937FEDD2B5E61E9@SG2PR06MB2315.apcprd06.prod.outlook.com Signed-off-by: Joel Stanley <joel@jms.id.au>
| | * | | | | ARM: dts: aspeed: everest, rainier: Add power-ffs-sync-history GPIOBrandon Wyman2022-05-192-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The IBM Everest and Rainier systems have a GPIO line that goes to the power supplies. It has a dual function: 1) Fans Full Speed, and 2) Sync input history. Signed-off-by: Brandon Wyman <bjwyman@gmail.com> Link: https://lore.kernel.org/r/20220421213638.1151193-1-bjwyman@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
| | * | | | | ARM: dts: aspeed: Add Nuvia DC-SCM BMCGraeme Gregory2022-05-192-0/+191
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add initial version of device tree for Nuvia DC-SCM BMC which is equipped with Aspeed AST2600 BMC SoC. Signed-off-by: Graeme Gregory <quic_ggregory@quicinc.com> Signed-off-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com> Link: https://lore.kernel.org/r/20220325190247.468079-1-quic_jaehyoo@quicinc.com Signed-off-by: Joel Stanley <joel@jms.id.au>
| | * | | | | ARM: dts: aspeed: bletchley: add sample averaging for ADM1278Potin Lai2022-05-191-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | set number of sample averaging to 128 for both PWR_AVG and VI_AVG Signed-off-by: Potin Lai <potin.lai@quantatw.com> Reviewed-by: Patrick Williams <patrick@stwcx.xyz> Link: https://lore.kernel.org/r/20220418094827.6185-1-potin.lai@quantatw.com Signed-off-by: Joel Stanley <joel@jms.id.au>
| | * | | | | ARM: dts: aspeed: bletchley: add eeprom node on each sledPotin Lai2022-05-191-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add eeprom (24c26) on each sled for storing sled fru information. Signed-off-by: Potin Lai <potin.lai.pt@gmail.com> Reviewed-by: Patrick Williams <patrick@stwcx.xyz> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20220509151118.4899-7-potin.lai.pt@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
| | * | | | | ARM: dts: aspeed: bletchley: add pca9536 node on each sledPotin Lai2022-05-191-0/+66
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add an ioexp node on each sled baseed on DVT schematic, address at 0x41. P0: SLEDX_SWD_MUX P1: SLEDX_XRES_SWD_N P2: SLEDX_CLKREQ_N P3: SLEDX_PCIE_PWR_EN Signed-off-by: Potin Lai <potin.lai.pt@gmail.com> Reviewed-by: Patrick Williams <patrick@stwcx.xyz> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20220509151118.4899-6-potin.lai.pt@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
| | * | | | | ARM: dts: aspeed: bletchley: update gpio0 line namesPotin Lai2022-05-191-15/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update GPIO line names based on DVT schematic Signed-off-by: Potin Lai <potin.lai.pt@gmail.com> Reviewed-by: Patrick Williams <patrick@stwcx.xyz> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20220509151118.4899-5-potin.lai.pt@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
| | * | | | | ARM: dts: aspeed: bletchley: Enable mdio0 busPotin Lai2022-05-191-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable mdio0 bus based on DVT schematic. TODO: Add Marvell 88E6191 Switch Signed-off-by: Potin Lai <potin.lai.pt@gmail.com> Reviewed-by: Patrick Williams <patrick@stwcx.xyz> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20220509151118.4899-4-potin.lai.pt@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
| | * | | | | ARM: dts: aspeed: bletchley: switch spi2 driver to aspeed-smcPotin Lai2022-05-191-20/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Due to DVT schematic has stable spi signal, switch back to aspeed-smc driver for improving performance. Signed-off-by: Potin Lai <potin.lai.pt@gmail.com> Reviewed-by: Patrick Williams <patrick@stwcx.xyz> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20220509151118.4899-3-potin.lai.pt@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
| | * | | | | ARM: dts: aspeed: bletchley: enable ehci0 device nodePotin Lai2022-05-191-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable ehci0 node for USB2 host feature Signed-off-by: Potin Lai <potin.lai.pt@gmail.com> Reviewed-by: Patrick Williams <patrick@stwcx.xyz> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20220509151118.4899-2-potin.lai.pt@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
| | * | | | | ARM: dts: aspeed: Add USB2.0 device controller nodeNeal Liu2022-05-191-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add USB2.0 device controller(udc) node to device tree for AST2600. Signed-off-by: Neal Liu <neal_liu@aspeedtech.com> Link: https://lore.kernel.org/r/20220518062043.1075360-3-neal_liu@aspeedtech.com Signed-off-by: Joel Stanley <joel@jms.id.au>
| | * | | | | ARM: dts: aspeed-g4: Set spi-max-frequency for all flashesTao Ren2022-05-191-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set "spi-max-frequency" to 50 MHz for all the flashes under the FMC controller to ensure the clock frequency is calculated correctly. Suggested-by: Cédric Le Goater <clg@kaod.org> Tested-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com> Signed-off-by: Tao Ren <rentao.bupt@gmail.com> Signed-off-by: Cédric Le Goater <clg@kaod.org> Link: https://lore.kernel.org/r/20220509175616.1089346-11-clg@kaod.org Signed-off-by: Joel Stanley <joel@jms.id.au>
generated by cgit v1.2.3 (git 2.39.1) at 2025-02-05 15:47:22 +0100