| Commit message (Expand) | Author | Age | Files | Lines |
* | pci: Decouple quirks.c from i915_reg.h | Ville Syrjälä | 2015-11-18 | 1 | -1/+3 |
* | drm/i915: Rely on TEST_SINK_START instead of tracking Sink CRC state on dev_p... | Rodrigo Vivi | 2015-11-18 | 2 | -13/+6 |
* | drm/i915: Stop tracking last calculated Sink CRC. | Rodrigo Vivi | 2015-11-18 | 2 | -32/+9 |
* | drm/i915: Make Sink crc calculation waiting for counter to reset. | Rodrigo Vivi | 2015-11-18 | 1 | -1/+18 |
* | drm/i915: Allow 1 vblank to let Sink CRC calculation to start or stop. | Rodrigo Vivi | 2015-11-18 | 1 | -0/+4 |
* | drm/i915/skl: Remove unused suspend and resume callbacks | Patrik Jakobsson | 2015-11-17 | 1 | -17/+0 |
* | drm/i915/gen9: Add boot parameter for disabling DC6 | Patrik Jakobsson | 2015-11-17 | 3 | -3/+18 |
* | drm/i915/gen9: Turn DC handling into a power well | Patrik Jakobsson | 2015-11-17 | 4 | -35/+90 |
* | drm/i915: Explain usage of power well IDs vs bit groups | Patrik Jakobsson | 2015-11-17 | 1 | -0/+4 |
* | drm/i915: Do not warn on PG2 enabled in gen9_disable_dc5() | Patrik Jakobsson | 2015-11-17 | 1 | -3/+0 |
* | drm/i915: Add a modeset power domain | Patrik Jakobsson | 2015-11-17 | 2 | -0/+3 |
* | drm/i915: Remove distinction between DDI 2 vs 4 lanes | Patrik Jakobsson | 2015-11-17 | 4 | -78/+45 |
* | drm/i915: Remove DDI power domain exclusion SKL_DISPLAY_ALWAYS_ON_POWER_DOMAINS | Ville Syrjälä | 2015-11-17 | 1 | -5/+1 |
* | drm/i915: Introduce a gmbus power domain | Ville Syrjälä | 2015-11-17 | 6 | -40/+13 |
* | drm/i915: Clean up AUX power domain handling | Ville Syrjälä | 2015-11-17 | 3 | -34/+59 |
* | drm/i915/gen9: Always set mask memory up when enabling DC5 or DC6 | Patrik Jakobsson | 2015-11-17 | 1 | -18/+17 |
* | drm/i915: Don't trust CSR program memory contents | Patrik Jakobsson | 2015-11-17 | 1 | -7/+3 |
* | drm/i915: fix handling of the disable_power_well module option | Imre Deak | 2015-11-17 | 2 | -2/+16 |
* | drm/i915/skl: remove redundant DDI/IRQ reinitialization during PW1 enabling | Imre Deak | 2015-11-17 | 1 | -5/+0 |
* | drm/i915/skl: make sure LCPLL is disabled when uniniting CDCLK | Imre Deak | 2015-11-17 | 1 | -10/+4 |
* | drm/i915/skl: disable DC states before display core init/uninit | Imre Deak | 2015-11-17 | 1 | -0/+4 |
* | drm/i915/gen9: simplify DC toggling code | Imre Deak | 2015-11-17 | 2 | -36/+28 |
* | drm/i915/skl: don't toggle PW1 and MISC power wells on-demand | Imre Deak | 2015-11-17 | 1 | -27/+9 |
* | drm/i915/skl: init/uninit display core as part of the HW power domain state | Imre Deak | 2015-11-17 | 5 | -21/+61 |
* | drm/i915: rename intel_power_domains_resume to *_sync_hw | Imre Deak | 2015-11-17 | 1 | -2/+2 |
* | drm/i915: Make turning on/off PW1 and Misc I/O part of the init/fini sequences | Damien Lespiau | 2015-11-17 | 4 | -4/+35 |
* | drm/i915: fix lookup_power_well for power wells without any domain | Imre Deak | 2015-11-17 | 1 | -2/+4 |
* | drm/i915: fix the power well ID for always on wells | Imre Deak | 2015-11-17 | 2 | -1/+5 |
* | drm/i915: get runtime PM reference around GEM set_tiling IOCTL | Imre Deak | 2015-11-17 | 1 | -0/+4 |
* | drm/i915: Serialise updates to GGTT with access through GGTT on Braswell | Chris Wilson | 2015-11-17 | 2 | -0/+25 |
* | drm/i915: force link training when requested by Sink | Shubhangi Shrivastava | 2015-11-17 | 1 | -1/+3 |
* | drm/i915: Cleanup test data during long/short hotplug | Shubhangi Shrivastava | 2015-11-17 | 1 | -8/+22 |
* | drm/i915/skl: Correct other-pipe watermark update condition check (v2) | Kumar, Mahesh | 2015-11-17 | 1 | -7/+5 |
* | drm/i915: Model PSR AUX register selection more like the normal AUX code | Ville Syrjälä | 2015-11-16 | 1 | -6/+21 |
* | drm/i915: Add dev_priv->psr_mmio_base | Ville Syrjälä | 2015-11-16 | 4 | -21/+27 |
* | drm/i915: Store aux data reg offsets in intel_dp->aux_ch_data_reg[] | Ville Syrjälä | 2015-11-16 | 2 | -10/+85 |
* | drm/i915: Remove the magic AUX_CTL is at DP + foo tricks | Ville Syrjälä | 2015-11-16 | 2 | -76/+105 |
* | drm/i915: Parametrize AUX registers | Ville Syrjälä | 2015-11-16 | 3 | -63/+62 |
* | drm/i915: Replace the aux ddc name switch statement with kasprintf() | Ville Syrjälä | 2015-11-16 | 1 | -29/+46 |
* | drm/i915: Replace aux_ch_ctl_reg check with port check | Ville Syrjälä | 2015-11-16 | 1 | -1/+1 |
* | drm/i915/skl: Update DDI translation tables for SKL | jim.bride@linux.intel.com | 2015-11-13 | 1 | -11/+11 |
* | drm/i915: Fix SKL i_boost level | Ander Conselvan de Oliveira | 2015-11-13 | 1 | -3/+3 |
* | drm/i915/skl: Removed assert for csr-fw-loading check during disabling dc6 | Animesh Manna | 2015-11-12 | 1 | -1/+0 |
* | drm/i915/gen9: flush DMC fw loading work during system suspend | Imre Deak | 2015-11-12 | 1 | -0/+3 |
* | drm/i915/gen9: Use flush_work to synchronize with dmc loader | Animesh Manna | 2015-11-12 | 2 | -2/+2 |
* | drm/i915: Use request_firmware and our own async work | Daniel Vetter | 2015-11-12 | 2 | -13/+14 |
* | drm/i915/gen9: extract parse_csr_fw | Daniel Vetter | 2015-11-12 | 1 | -19/+31 |
* | drm/i915/gen9: Use dev_priv in csr functions | Daniel Vetter | 2015-11-12 | 4 | -24/+18 |
* | drm/i915/gen9: Don't try to load garbage dmc firmware on resume | Daniel Vetter | 2015-11-12 | 1 | -1/+1 |
* | drm/i915/gen9: Simplify csr loading failure printing. | Daniel Vetter | 2015-11-12 | 3 | -23/+4 |