summaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* percpu: fix synchronization between chunk->map_extend_work and chunk destructionTejun Heo2016-05-251-21/+36
| | | | | | | | | | | | | | | | | | Atomic allocations can trigger async map extensions which is serviced by chunk->map_extend_work. pcpu_balance_work which is responsible for destroying idle chunks wasn't synchronizing properly against chunk->map_extend_work and may end up freeing the chunk while the work item is still in flight. This patch fixes the bug by rolling async map extension operations into pcpu_balance_work. Signed-off-by: Tejun Heo <tj@kernel.org> Reported-and-tested-by: Alexei Starovoitov <alexei.starovoitov@gmail.com> Reported-by: Vlastimil Babka <vbabka@suse.cz> Reported-by: Sasha Levin <sasha.levin@oracle.com> Cc: stable@vger.kernel.org # v3.18+ Fixes: 9c824b6a172c ("percpu: make sure chunk->map array has available space")
* Merge tag 'armsoc-fixes' of ↵Linus Torvalds2016-05-256-483/+8
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC fixes from Arnd Bergmann: "This is a first set of bug fixes on top of what was merged for 4.7. Two patches for lpc32xx address a harmless build warning that was just introduced, one patch for the mediatek soc driver fixes a warning for arm64, and the pxa changes are minor cleanups that should have been part of the original pull requests but that I forgot to apply to the cleanup-fixes branch earlier" * tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: lpc32xx: fix NR_IRQS confict ARM: lpc32xx: remove legacy irq controller driver soc: mtk-pmic-wrap: avoid integer overflow warning ARM: pxa: Remove CLK_IS_ROOT ARM: pxa: activate pinctrl for device-tree machines
| * ARM: lpc32xx: fix NR_IRQS confictArnd Bergmann2016-05-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the change to sparse IRQs, the lpc32xx platform gets a warning about conflicting macros: In file included from arch/arm/mach-lpc32xx/irq.c:31:0: arch/arm/mach-lpc32xx/include/mach/irqs.h:115:0: warning: "NR_IRQS" redefined #define NR_IRQS 96 arch/arm/include/asm/irq.h:9:0: note: this is the location of the previous definition #define NR_IRQS NR_IRQS_LEGACY One such instance was in the old irq driver that is now removed by the previous patch, but any other file including mach/irqs.h still has the issue. Since none of them use this constant, we can just remove the old definition. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Fixes: 8cb17b5ed017 ("irqchip: Add LPC32xx interrupt controller driver")
| * ARM: lpc32xx: remove legacy irq controller driverVladimir Zapolskiy2016-05-242-478/+1
| | | | | | | | | | | | | | | | | | | | New NXP LPC32xx irq chip driver is used instead of a legacy one. [this also fixes a harmless build warning about the NR_IRQS redefinition] Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * Merge tag 'pxa-for-4.7' of https://github.com/rjarzmik/linux into fixesArnd Bergmann2016-05-202-1/+3
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge "pxa changes for v4.7 cycle" from Robert Jarzmik: This is a minor cycle with : - cleanup fix from Stephen on clocks (CLK_ROOT deprecated) - pin control activation for device-tree platforms * tag 'pxa-for-4.7' of https://github.com/rjarzmik/linux: ARM: pxa: Remove CLK_IS_ROOT ARM: pxa: activate pinctrl for device-tree machines These should have been part of the original pull request but got accidentally dropped. Both changes in this branch can be considered bugfixes, so I'm putting them in the fixes branch now.
| | * ARM: pxa: Remove CLK_IS_ROOTStephen Boyd2016-04-301-1/+1
| | | | | | | | | | | | | | | | | | | | | This flag is a no-op now (see commit 47b0eeb3dc8a "clk: Deprecate CLK_IS_ROOT", 2016-02-02) so remove it. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
| | * ARM: pxa: activate pinctrl for device-tree machinesRobert Jarzmik2016-04-301-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pincontrol is not yet ready for all PXA platforms. For example, a legacy platform, if PINCTRL was activated, will fail its calls to gpio_request() or gpio_direction_output(), as the pinctrl driver might not be available, such as for pxa25x and pxa3xx. As a step forward, activate pincontrol for all device-tree available machines, ie. pxa27x device-tree based and pxa3xx device-tree based. If it appears later that pincontrol is also required for legacy platforms and if the mfp->pinctrl conversion can be achieved, then PINCTRL will be activated for the whole PXA architecture. Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Acked-by: Linus Walleij <linus.walleij@linaro.org>
| * | soc: mtk-pmic-wrap: avoid integer overflow warningArnd Bergmann2016-05-191-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On ARM64, the mtk-pmic-wrap driver causes a harmless warning: mtk-pmic-wrap.c:1062:16: warning: large integer implicitly truncated to unsigned type [-Woverflow] mtk-pmic-wrap.c:1074:16: warning: large integer implicitly truncated to unsigned type [-Woverflow] mtk-pmic-wrap.c:1086:16: warning: large integer implicitly truncated to unsigned type [-Woverflow] .int_en_all = ~(BIT(31) | BIT(1)), The problem is that the result of the BIT() macro is an 'unsigned long', so taking the bitwise NOT operation of that results in an integer with the upper 32 bits all set and that cannot be assigned to a 'u32' variable without loss of information. This is harmless because we were never interested in the upper bits here anyway, so we can shut up the warning by adding a simple cast to 'u32'. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* | | Merge tag 'armsoc-late' of ↵Linus Torvalds2016-05-2526-497/+2918
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC late DT updates from Arnd Bergmann: "This is a collection of a few late fixes and other misc stuff that had dependencies on things being merged from other trees. The Renesas R-Car power domain handling, and the Nvidia Tegra USB support both hand notable changes that required changing the DT binding in a way that only provides compatibility with old DT blobs on new kernels but not vice versa. As a consequence, the DT changes are based on top of the driver changes and are now in this branch. For NXP i.MX and Samsung Exynos, the changes in here depend on other changes that got merged through the clk maintainer tree" * tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (35 commits) ARM: dts: exynos: Add support of Bus frequency using VDD_INT for exynos5422-odroidxu3 ARM: dts: exynos: Add bus nodes using VDD_INT for Exynos542x SoC ARM: dts: exynos: Add NoC Probe dt node for Exynos542x SoC ARM: dts: exynos: Add support of bus frequency for exynos4412-trats/odroidu3 ARM: dts: exynos: Expand the voltage range of buck1/3 regulator for exynos4412-odroidu3 ARM: dts: exynos: Add support of bus frequency using VDD_INT for exynos3250-rinato ARM: dts: exynos: Add exynos4412-ppmu-common dtsi to delete duplicate PPMU nodes ARM: dts: exynos: Add bus nodes using VDD_MIF for Exynos4210 ARM: dts: exynos: Add bus nodes using VDD_INT for Exynos4x12 ARM: dts: exynos: Add bus nodes using VDD_MIF for Exynos4x12 ARM: dts: exynos: Add bus nodes using VDD_INT for Exynos3250 ARM: dts: exynos: Add DMC bus frequency for exynos3250-rinato/monk ARM: dts: exynos: Add DMC bus node for Exynos3250 ARM: tegra: Enable XUSB on Nyan ARM: tegra: Enable XUSB on Jetson TK1 ARM: tegra: Enable XUSB on Venice2 ARM: tegra: Add Tegra124 XUSB controller ARM: tegra: Move Tegra124 to the new XUSB pad controller binding ARM: dts: r8a7794: Use SYSC "always-on" PM Domain ARM: dts: r8a7793: Use SYSC "always-on" PM Domain ...
| * \ \ Merge tag 'samsung-dt-devfreq-4.7' of ↵Arnd Bergmann2016-05-1012-155/+1295
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/late Merge "ARM: dts: exynos: Devfreq for v4.7: from Krzysztof Kozłowski: Topic branch for Device Tree changes adding new generic devfreq driver, for v4.7: 1. Add bus nodes for Exynos3250, Exynos4x12, Exynos4210 and Exynos542x. 2. Split out common PPMU (Performance Monitoring Unit) nodes into separate DTSI. The PPMU provides performance data for devfreq. 3. Add NoCP (Network on Chip Probe) node for Exynos542x. On this SoC, like PPMU on older designs, provides performance data for devfreq. 4. Enable DFVS (Dynamic Voltage and Frequency Scaling) on boards: - Exynos3250 Rinato, - Exynos4412 Odroid-X/X2/U3 and Trats2, - Exynos5422 Odroid XU3/XU3-Lite/XU4. * tag 'samsung-dt-devfreq-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: ARM: dts: exynos: Add support of Bus frequency using VDD_INT for exynos5422-odroidxu3 ARM: dts: exynos: Add bus nodes using VDD_INT for Exynos542x SoC ARM: dts: exynos: Add NoC Probe dt node for Exynos542x SoC ARM: dts: exynos: Add support of bus frequency for exynos4412-trats/odroidu3 ARM: dts: exynos: Expand the voltage range of buck1/3 regulator for exynos4412-odroidu3 ARM: dts: exynos: Add support of bus frequency using VDD_INT for exynos3250-rinato ARM: dts: exynos: Add exynos4412-ppmu-common dtsi to delete duplicate PPMU nodes ARM: dts: exynos: Add bus nodes using VDD_MIF for Exynos4210 ARM: dts: exynos: Add bus nodes using VDD_INT for Exynos4x12 ARM: dts: exynos: Add bus nodes using VDD_MIF for Exynos4x12 ARM: dts: exynos: Add bus nodes using VDD_INT for Exynos3250 ARM: dts: exynos: Add DMC bus frequency for exynos3250-rinato/monk ARM: dts: exynos: Add DMC bus node for Exynos3250 clk: samsung: exynos542x: Add the clock id for ACLK dt-bindings: clock: Add the clock id for ACLK clock of Exynos542x SoC
| | * | | ARM: dts: exynos: Add support of Bus frequency using VDD_INT for ↵Chanwoo Choi2016-05-031-0/+99
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | exynos5422-odroidxu3 This patch adds the bus device tree nodes for INT (Internal) block to enable the AMBA bus frequency scaling and add the NoC (Network on Chip) Probe Device Tree node to measure the bandwidth for AMBA AXI bus. The WCORE bus bus is parent device in INT block using VDD_INT. Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Tested-by: Markus Reichl <m.reichl@fivetechno.de> Tested-by: Anand Moon <linux.amoon@gmail.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
| | * | | ARM: dts: exynos: Add bus nodes using VDD_INT for Exynos542x SoCChanwoo Choi2016-05-031-0/+371
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the AMBA bus nodes using VDD_INT for Exynos542x SoC. Exynos542x has the following AMBA buses to translate data between DRAM and sub-blocks. Following list specifies the detailed correlation between sub-block and clock: - CLK_DOUT_ACLK400_WCORE clock for WCORE's AXI - CLK_DOUT_ACLK100_NOC for NoC (Network on Chip)'s AXI - CLK_DOUT_PCLK200_FSYS for FSYS's APB - CLK_DOUT_ACLK200_FSYS for FSYS's AXI - CLK_DOUT_ACLK200_FSYS2 for FSYS2's AXI - CLK_DOUT_ACLK333 for MFC's AXI - CLK_DOUT_ACLK266 for GEN's AXI - CLK_DOUT_ACLK66 for PERIC/PERIR's AXI - CLK_DOUT_ACLK333_G2D for G2D's AXI - CLK_DOUT_ACLK266_G2D for ACP's AXI - CLK_DOUT_ACLK300_JPEG for JPEG's AXI - CLK_DOUT_ACLK166 for JPEG's APB - CLK_DOUT_ACLK300_DISP1 for FIMD's AXI - CLK_DOUT_ACLK400_DISP1 for DISP1's AXI - CLK_DOUT_ACLK300_GSCL for GSCL Scaler's AXI - CLK_DOUT_ACLK400_MSCL for MSCL's AXI Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Tested-by: Markus Reichl <m.reichl@fivetechno.de> Tested-by: Anand Moon <linux.amoon@gmail.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
| | * | | ARM: dts: exynos: Add NoC Probe dt node for Exynos542x SoCChanwoo Choi2016-05-031-0/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the NoCP (Network on Chip Probe) Device Tree node to measure the bandwidth of memory and g3d in Exynos542x SoC. Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Tested-by: Markus Reichl <m.reichl@fivetechno.de> Tested-by: Anand Moon <linux.amoon@gmail.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
| | * | | ARM: dts: exynos: Add support of bus frequency for exynos4412-trats/odroidu3Chanwoo Choi2016-05-032-0/+94
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the bus device tree nodes for both MIF (Memory) and INT (Internal) block to enable the bus frequency. The DMC bus is parent device in MIF block using VDD_MIF and the LEFTBUS bus is parent device in INT block using VDD_INT. Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> [m.reichl and linux.amoon: Tested it on exynos4412-odroidu3 board] Tested-by: Markus Reichl <m.reichl@fivetechno.de> Tested-by: Anand Moon <linux.amoon@gmail.com> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
| | * | | ARM: dts: exynos: Expand the voltage range of buck1/3 regulator for ↵Chanwoo Choi2016-05-031-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | exynos4412-odroidu3 This patch expands the voltage range of buck1/3 regulator due to as following: - MIF (Memory Interface) bus frequency needs the range of '900 - 1100 mV'. - INT (Internal) bus frequency needs the range of '900 - 1050 mV'. Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> [m.reichl and linux.amoon: Tested it on exynos4412-odroidu3 board] Tested-by: Markus Reichl <m.reichl@fivetechno.de> Tested-by: Anand Moon <linux.amoon@gmail.com> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
| | * | | ARM: dts: exynos: Add support of bus frequency using VDD_INT for ↵Chanwoo Choi2016-05-031-0/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | exynos3250-rinato This patch adds the bus device-tree nodes of INT (internal) block to enable the bus frequency scaling. The following sub-blocks share the VDD_INT power source: - LEFTBUS (parent device) - RIGHTBUS - PERIL - LCD0 - FSYS - MCUISP / ISP - MFC The LEFTBUS is parent device with devfreq ondemand governor and the rest of devices depend on the LEFTBUS device. Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
| | * | | ARM: dts: exynos: Add exynos4412-ppmu-common dtsi to delete duplicate PPMU nodesChanwoo Choi2016-05-035-120/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the exynos4412-ppmu-common.dtsi to remove duplicate PPMU nodes because exynos3250-rinato/monk, exynos4412-trats2/odroidu3 has the same PPMU device tree node. Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> [m.reichl and linux.amoon: Tested it on exynos4412-odroidu3 board] Tested-by: Markus Reichl <m.reichl@fivetechno.de> Tested-by: Anand Moon <linux.amoon@gmail.com> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
| | * | | ARM: dts: exynos: Add bus nodes using VDD_MIF for Exynos4210Chanwoo Choi2016-05-031-0/+159
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the bus nodes for Exynos4210 SoC. Exynos4210 SoC has one power line for all buses to translate data between DRAM and sub-blocks. Following list specifies the detailed relation between DRAM and sub-blocks: - DMC/ACP clock for DMC (Dynamic Memory Controller) - ACLK200 clock for LCD0 - ACLK100 clock for PERIL/PERIR/MFC(PCLK) - ACLK160 clock for CAM/TV/LCD0/LCD1 - ACLK133 clock for FSYS/GPS - GDL/GDR clock for LEFTBUS/RIGHTBUS - SCLK_MFC clock for MFC Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
| | * | | ARM: dts: exynos: Add bus nodes using VDD_INT for Exynos4x12Chanwoo Choi2016-05-031-0/+106
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the bus nodes using VDD_INT for Exynos4x12 SoC. Exynos4x12 has the following AXI buses to translate data between DRAM and sub-blocks. Following list specifies the detailed relation between DRAM and sub-blocks: - ACLK100 clock for PERIL/PERIR/MFC(PCLK) - ACLK160 clock for CAM/TV/LCD : The minimum clock of ACLK160 should be over 160MHz. When drop the clock under 160MHz, show the broken image. - ACLK133 clock for FSYS - GDL clock for LEFTBUS - GDR clock for RIGHTBUS - SCLK_MFC clock for MFC Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> [m.reichl and linux.amoon: Tested it on exynos4412-odroidu3 board] Tested-by: Markus Reichl <m.reichl@fivetechno.de> Tested-by: Anand Moon <linux.amoon@gmail.com> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
| | * | | ARM: dts: exynos: Add bus nodes using VDD_MIF for Exynos4x12Chanwoo Choi2016-05-031-0/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the bus nodes using VDD_MIF for Exynos4x12 SoC. Exynos4x12 has the following AXI buses to translate data between DRAM and DMC/ACP/C2C. Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> [m.reichl and linux.amoon: Tested it on exynos4412-odroidu3 board] Tested-by: Markus Reichl <m.reichl@fivetechno.de> Tested-by: Anand Moon <linux.amoon@gmail.com> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
| | * | | ARM: dts: exynos: Add bus nodes using VDD_INT for Exynos3250Chanwoo Choi2016-05-031-0/+147
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the bus nodes using VDD_INT for Exynos3250 SoC. Exynos3250 has following AXI buses to translate data between DRAM and sub-blocks. Following list specifies the detailed relation between DRAM and sub-blocks: - ACLK400 clock for MCUISP - ACLK266 clock for ISP - ACLK200 clock for FSYS - ACLK160 clock for LCD0 - ACLK100 clock for PERIL - GDL clock for LEFTBUS - GDR clock for RIGHTBUS - SCLK_MFC clock for MFC Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
| | * | | ARM: dts: exynos: Add DMC bus frequency for exynos3250-rinato/monkChanwoo Choi2016-05-032-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the DMC (Dynamic Memory Controller) bus frequency node which includes the devfreq-events and regulator properties. The bus frequency support the DVFS (Dynamic Voltage Frequency Scaling) feature with ondemand governor. The devfreq-events (ppmu_dmc0*) can monitor the utilization of DMC bus on runtime and the buck1_reg (VDD_MIF power line) supplies the power to the DMC block. Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Acked-by: MyungJoo Ham <myungjoo.ham@samsung.com> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
| | * | | ARM: dts: exynos: Add DMC bus node for Exynos3250Chanwoo Choi2016-05-031-0/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the DMC (Dynamic Memory Controller) bus node for Exynos3250 SoC. The DMC is an AMBA AXI-compliant slave to interface external JEDEC standard SDRAM devices. The bus includes the OPP tables and the source clock for DMC block. Following list specifies the detailed relation between the clock and DMC block: - The source clock of DMC block : div_dmc Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Acked-by: MyungJoo Ham <myungjoo.ham@samsung.com> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
| | * | | Merge tag 'clk-v4.7-exynos542x' of git://linuxtv.org/snawrocki/samsung into ↵Krzysztof Kozlowski2016-05-032-31/+70
| | |\ \ \ | | | |_|/ | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | for-v4.7-late/dts-exynos-devfreq Addition of IDs for Exynos542x SoC AMBA AXI bus clocks. These IDs are needed before we start using them in DTS.
| * | | | Merge tag 'imx-dt-clkdep-4.7' of ↵Arnd Bergmann2016-05-1013-15/+934
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/late Merge "The i.MX device tree updates with new clocks for 4.7" from Shawn Guo: - Add LCDIF and FlexCAN device support for i.MX7D - New support i.MX7D based Nitrogen7 board from Boundary Devices - Add display support for vf610-colibri board * tag 'imx-dt-clkdep-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: dts: vf610-colibri: enable display controller ARM: dts: vf610: add display nodes ARM: dts: imx: add Boundary Devices Nitrogen7 board ARM: dts: imx7d: add flexcan support ARM: dts: imx7d: add lcdif support clk: imx: vf610: fix whitespace in vf610-clock.h clk: imx: vf610: add TCON ipg clock clk: imx: vf610: fix DCU clock tree clk: imx: add ckil clock for i.MX7 clk: imx: vf610: add suspend/resume support clk: imx: vf610: add WKPU unit clk: imx: vf610: leave DDR clock on clk: imx: clk-gate2: allow custom gate configuration clk: imx6sx: Register SAI clocks as shared clocks
| | * | | | ARM: dts: vf610-colibri: enable display controllerStefan Agner2016-04-132-0/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable dcu node which is used by the DCU DRM driver. Assign the 5.7" EDT panel with VGA resolution which Toradex sells often with the evaluation board. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| | * | | | ARM: dts: vf610: add display nodesStefan Agner2016-04-131-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the dcu and tcon nodes to enable the Display Controller Unit and Timing Controller in Vybrid's SoC level device-tree file. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| | * | | | ARM: dts: imx: add Boundary Devices Nitrogen7 boardGary Bisson2016-04-132-0/+746
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on i.MX7 Dual with 1GB of RAM. https://boundarydevices.com/product/nitrogen7/ Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| | * | | | ARM: dts: imx7d: add flexcan supportGary Bisson2016-04-131-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the device nodes for the i.MX7 FlexCAN buses. Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| | * | | | ARM: dts: imx7d: add lcdif supportGary Bisson2016-04-131-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the device node for the i.MX7 eLCDIF interface. Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| | * | | | Merge tag 'imx-clk-4.7' into imx/dt-clkdepShawn Guo2016-04-137-15/+89
| | |\ \ \ \ | | | |/ / / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The i.MX clock update for 4.7: - Register SAI clk as shared clocks to support SAI audio on i.MX6SX - Add the missing ckil clock for i.MX7 - Update clk-gate2 and vf610 clock driver to prepare for suspend support on VF610 - Fix DCU clock configurations and add TCON ipg clock to support DRM display on VF610
| * | | | | Merge tag 'tegra-for-4.7-xusb-no-defconfig' of ↵Arnd Bergmann2016-05-094-50/+456
| |\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/late Merge "ARM: tegra: Enable the XUSB controller" from Thierry Reding: These changes add support for the XUSB controller on Tegra124. It is an XHCI compatible controller that replaces the existing EHCI controllers. Support is enabled on Venice2, Jetson TK1 and Nyan-based Chromebooks. * tag 'tegra-for-4.7-xusb-no-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: ARM: tegra: Enable XUSB on Nyan ARM: tegra: Enable XUSB on Jetson TK1 ARM: tegra: Enable XUSB on Venice2 ARM: tegra: Add Tegra124 XUSB controller ARM: tegra: Move Tegra124 to the new XUSB pad controller binding
| | * | | | | ARM: tegra: Enable XUSB on NyanThierry Reding2016-04-291-28/+94
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add XUSB pad controller and XUSB controller device tree nodes and enable them with a configuration for the Nyan boards. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | ARM: tegra: Enable XUSB on Jetson TK1Thierry Reding2016-04-291-14/+102
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add XUSB pad controller and XUSB controller device tree nodes and enable them with a configuration for the Jetson TK1 board. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | ARM: tegra: Enable XUSB on Venice2Thierry Reding2016-04-291-1/+100
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add XUSB pad controller and XUSB controller device tree nodes and enable them with a configuration for the Venice2 board. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | ARM: tegra: Add Tegra124 XUSB controllerThierry Reding2016-04-291-0/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a device tree node for the Tegra XUSB controller. It contains a phandle to the XUSB pad controller for control of the PHYs assigned to the USB ports. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | ARM: tegra: Move Tegra124 to the new XUSB pad controller bindingThierry Reding2016-04-291-7/+125
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the new XUSB pad controller binding on Tegra124. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | Merge branch 'for-4.7/xhci' into for-4.7/xusbThierry Reding2016-04-294-0/+1461
| | |\ \ \ \ \
| | * \ \ \ \ \ Merge branch 'for-4.7/pci' into for-4.7/xusbThierry Reding2016-04-292-22/+446
| | |\ \ \ \ \ \
| | * \ \ \ \ \ \ Merge branch 'for-4.7/phy' into for-4.7/xusbThierry Reding2016-04-2918-34/+6173
| | |\ \ \ \ \ \ \ | | | |_|_|/ / / / | | |/| | | | | |
| | | | | | | | |
| | \ \ \ \ \ \ \
| *-. \ \ \ \ \ \ \ Merge branches 'tegra/pci' and 'tegra/usb' into next/lateArnd Bergmann2016-05-0924-56/+8080
| |\ \ \ \ \ \ \ \ \ | | | |_|_|/ / / / / | | |/| | | / / / / | | | | |_|/ / / / | | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a prerequisite for enabling the Tegra XUSB, all the branches should be merged already at the time we get here. * tegra/pci: PCI: tegra: Support per-lane PHYs dt-bindings: pci: tegra: Update for per-lane PHYs phy: tegra: Add Tegra210 support phy: Add Tegra XUSB pad controller support dt-bindings: phy: tegra-xusb-padctl: Add Tegra210 support dt-bindings: phy: Add NVIDIA Tegra XUSB pad controller binding phy: core: Allow children node to be overridden clk: tegra: Add interface to enable hardware control of SATA/XUSB PLLs * tegra/usb: usb: xhci: tegra: Add Tegra210 support usb: xhci: Add NVIDIA Tegra XUSB controller driver dt-bindings: usb: xhci-tegra: Add Tegra210 XUSB controller support dt-bindings: usb: Add NVIDIA Tegra XUSB controller binding phy: tegra: Add Tegra210 support phy: Add Tegra XUSB pad controller support dt-bindings: phy: tegra-xusb-padctl: Add Tegra210 support dt-bindings: phy: Add NVIDIA Tegra XUSB pad controller binding phy: core: Allow children node to be overridden clk: tegra: Add interface to enable hardware control of SATA/XUSB PLLs
| * | | | | | | | Merge tag 'renesas-arm64-dt-pm-domain-for-v4.7' of ↵Arnd Bergmann2016-05-092-54/+176
| |\ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/late Merge "Renesas ARM64 Based SoC DT PM Domain Updates for v4.7" from Simon Horman: * Add SYSC PM Domains to DT of r8a7795 SoC * tag 'renesas-arm64-dt-pm-domain-for-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: arm64: dts: r8a7795: Use SYSC "always-on" PM Domain arm64: dts: r8a7795: Add SYSC PM Domains arm64: dts: r8a7795: Don't disable referenced optional clocks arm64: dts: salvator-x: populate EXTALR arm64: dts: r8a7795: enable PCIe on Salvator-X arm64: dts: r8a7795: Add PCIe nodes arm64: dts: r8a7795: Use USB3.0 fallback compatibility string arm64: dts: r8a7795: Add CAN support arm64: dts: r8a7795: Add CAN external clock support
| | * | | | | | | | arm64: dts: r8a7795: Use SYSC "always-on" PM DomainGeert Uytterhoeven2016-04-271-55/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Hook up all devices that are part of the CPG/MSSR Clock Domain to the SYSC "always-on" PM Domain, for a more consistent device-power-area description in DT. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | | | | | | arm64: dts: r8a7795: Add SYSC PM DomainsGeert Uytterhoeven2016-04-271-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a device node for the System Controller. Hook up the Cortex-A57 CPU cores and the Cortex-A57 and Cortex A53 L2 caches/SCUs to their respective PM Domains. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | | | | | | Merge tag 'renesas-rcar-sysc2-for-v4.7' into arm64-dt-pm-domain-for-v4.7Simon Horman2016-04-2733-232/+1023
| | |\ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Second Round of Renesas ARM Based SoC R-Car SYSC Updates for v4.7 Introduce a DT-based driver for the R-Car System Controller, as found on Renesas R-Car H1, R-Car Gen2, and R-Car Gen3 SoCs.
| * | \ \ \ \ \ \ \ \ Merge tag 'renesas-dt-pm-domain-for-v4.7' of ↵Arnd Bergmann2016-04-2857-1147/+2112
| |\ \ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/late Merge "Renesas ARM Based SoC DT PM Domain Updates for v4.7" into next/late * Add SYSC PM Domains to DT for R-Car Gen 1 and 2 SoCs This pull requests is based on a merge of: * "[GIT PULL] Second Round of Renesas ARM Based SoC R-Car SYSC Updates for v4.7", tagged as renesas-rcar-sysc2-for-v4.7, which you have already pulled. * "[GIT PULL v2] Renesas ARM Based SoC DT Updates for v4.7", tagged as renesas-dt-for-v4.7, which you have also already pulled. The reason for the somewhat tedious base on renesas-rcar-sysc2-for-v4.7, which provides driver changes, is a hard run-time dependency. I also have a similar set of changes for arm64 which I will send separately. * tag 'renesas-dt-pm-domain-for-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (88 commits) ARM: dts: r8a7794: Use SYSC "always-on" PM Domain ARM: dts: r8a7793: Use SYSC "always-on" PM Domain ARM: dts: r8a7791: Use SYSC "always-on" PM Domain ARM: dts: r8a7790: Use SYSC "always-on" PM Domain ARM: dts: r8a7779: Use SYSC "always-on" PM Domain ARM: dts: r8a7794: Add SYSC PM Domains ARM: dts: r8a7793: Add SYSC PM Domains ARM: dts: r8a7791: Add SYSC PM Domains ARM: dts: r8a7790: Add SYSC PM Domains ARM: dts: r8a7779: Add SYSC PM Domains soc: renesas: rcar-sysc: Add support for R-Car H3 power areas soc: renesas: rcar-sysc: Add support for R-Car E2 power areas soc: renesas: rcar-sysc: Add support for R-Car M2-N power areas soc: renesas: rcar-sysc: Add support for R-Car M2-W power areas soc: renesas: rcar-sysc: Add support for R-Car H2 power areas soc: renesas: rcar-sysc: Add support for R-Car H1 power areas soc: renesas: rcar-sysc: Enable Clock Domain for I/O devices ARM: dts: gose: Enable SDHI controllers ARM: dts: r8a7793: Add SDHI controllers ARM: dts: r8a7790: fix max-frequency for SDHI ...
| | * | | | | | | | | | ARM: dts: r8a7794: Use SYSC "always-on" PM DomainGeert Uytterhoeven2016-04-271-53/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Hook up all devices that are part of the CPG/MSTP Clock Domain to the SYSC "always-on" PM Domain, for a more consistent device-power-area description in DT. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | | | | | | | | ARM: dts: r8a7793: Use SYSC "always-on" PM DomainGeert Uytterhoeven2016-04-271-51/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Hook up all devices that are part of the CPG/MSTP Clock Domain to the SYSC "always-on" PM Domain, for a more consistent device-power-area description in DT. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | | | | | | | | ARM: dts: r8a7791: Use SYSC "always-on" PM DomainGeert Uytterhoeven2016-04-271-73/+73
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Hook up all devices that are part of the CPG/MSTP Clock Domain to the SYSC "always-on" PM Domain, for a more consistent device-power-area description in DT. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | | | | | | | | ARM: dts: r8a7790: Use SYSC "always-on" PM DomainGeert Uytterhoeven2016-04-271-69/+69
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Hook up all devices that are part of the CPG/MSTP Clock Domain to the SYSC "always-on" PM Domain, for a more consistent device-power-area description in DT. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
generated by cgit v1.2.3 (git 2.39.1) at 2025-01-30 06:23:48 +0100