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* AMD IOMMU: use coherent_dma_mask in alloc_coherentJoerg Roedel2008-09-191-7/+22
| | | | | | | | | The alloc_coherent implementation for AMD IOMMU currently uses *dev->dma_mask per default. This patch changes it to prefer dev->coherent_dma_mask if it is set. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* add AMD IOMMU tree to MAINTAINERS fileJoerg Roedel2008-09-191-0/+1
| | | | | Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* AMD IOMMU: use cmd_buf_size when freeing the command bufferJoerg Roedel2008-09-191-1/+2
| | | | | | | | | The command buffer release function uses the CMD_BUF_SIZE macro for get_order. Replace this with iommu->cmd_buf_size which is more reliable about the actual size of the buffer. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* AMD IOMMU: calculate IVHD size with a functionJoerg Roedel2008-09-191-2/+10
| | | | | | | | | The current calculation of the IVHD entry size is hard to read. So move this code to a seperate function to make it more clear what this calculation does. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* AMD IOMMU: remove unnecessary cast to u64 in the init codeJoerg Roedel2008-09-191-1/+1
| | | | | | | | The ctrl variable is only u32 and readl also returns a 32 bit value. So the cast to u64 is pointless. Remove it with this patch. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* AMD IOMMU: free domain bitmap with its allocation orderJoerg Roedel2008-09-191-1/+2
| | | | | | | | | | The amd_iommu_pd_alloc_bitmap is allocated with a calculated order and freed with order 1. This is not a bug since the calculated order always evaluates to 1, but its unclean code. So replace the 1 with the calculation in the release path. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* AMD IOMMU: simplify dma_mask_to_pagesJoerg Roedel2008-09-191-2/+1
| | | | | | | | The current calculation is very complicated. This patch replaces it with a much simpler version. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* AMD IOMMU: replace memset with __GFP_ZERO in alloc_coherentJoerg Roedel2008-09-191-1/+1
| | | | | | | Remove the memset and use __GFP_ZERO at allocation time instead. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* AMD IOMMU: avoid unnecessary low zone allocation in alloc_coherentFUJITA Tomonori2008-09-191-2/+3
| | | | | | | | | | | x86's common alloc_coherent (dma_alloc_coherent in dma-mapping.h) sets up the gfp flag according to the device dma_mask but AMD IOMMU doesn't need it for devices that the IOMMU can do virtual mappings for. This patch avoids unnecessary low zone allocation. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* AMD IOMMU: some set_device_domain cleanupsJoerg Roedel2008-09-192-4/+8
| | | | | | | | Remove some magic numbers and split the pte_root using standard functions. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* AMD IOMMU: don't assign preallocated protection domains to devicesJoerg Roedel2008-09-192-5/+44
| | | | | | | | | | | In isolation mode the protection domains for the devices are preallocated and preassigned. This is bad if a device should be passed to a virtualization guest because the IOMMU code does not know if it is in use by a driver. This patch changes the code to assign the device to the preallocated domain only if there are dma mapping requests for it. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* AMD IOMMU: add dma_supported callbackJoerg Roedel2008-09-191-0/+25
| | | | | | | | | This function determines if the AMD IOMMU implementation is responsible for a given device. So the DMA layer can get this information from the driver. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* AMD IOMMU: allow IO page faults from devicesJoerg Roedel2008-09-191-1/+0
| | | | | | | | | | There is a bit in the device entry to suppress all IO page faults generated by a device. This bit was set until now because there was no event logging. Now that there is event logging this patch allows IO page faults from devices to see them in the kernel log. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* AMD IOMMU: enable event loggingJoerg Roedel2008-09-191-0/+8
| | | | | | | | The code to log IOMMU events is in place now. So enable event logging with this patch. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* AMD IOMMU: add event handling codeJoerg Roedel2008-09-193-2/+108
| | | | | | | | This patch adds code for polling and printing out events generated by the AMD IOMMU. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* AMD IOMMU: add MSI interrupt supportJoerg Roedel2008-09-195-1/+120
| | | | | | | | The AMD IOMMU can generate interrupts for various reasons. This patch adds the basic interrupt enabling infrastructure to the driver. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* AMD IOMMU: save pci_dev instead of devidJoerg Roedel2008-09-192-11/+19
| | | | | | | | | We need the pci_dev later anyways to enable MSI for the IOMMU hardware. So remove the devid pointing to the BDF and replace it with the pci_dev structure where the IOMMU is implemented. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* AMD IOMMU: save pci segment from ACPI tablesJoerg Roedel2008-09-192-0/+4
| | | | | | | | This patch adds the pci_seg field to the amd_iommu structure and fills it with the corresponding value from the ACPI table. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* AMD IOMMU: add event buffer allocationJoerg Roedel2008-09-192-0/+38
| | | | | | | | | This patch adds the allocation of a event buffer for each AMD IOMMU in the system. The hardware will log events like device page faults or other errors to this buffer once this is enabled. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* AMD IOMMU: align alloc_coherent addresses properlyJoerg Roedel2008-09-191-8/+14
| | | | | | | | | | The API definition for dma_alloc_coherent states that the bus address has to be aligned to the next power of 2 boundary greater than the allocation size. This is violated by AMD IOMMU so far and this patch fixes it. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* AMD IOMMU: add branch hints to completion wait checksJoerg Roedel2008-09-191-6/+6
| | | | | | | | | | | | This patch adds branch hints to the cecks if a completion_wait is necessary. The completion_waits in the mapping paths are unlikly because they will only happen on software implementations of AMD IOMMU which don't exists today or with lazy IO/TLB flushing when the allocator wraps around the address space. With lazy IO/TLB flushing the completion_wait in the unmapping path is unlikely too. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* AMD IOMMU: implement lazy IO/TLB flushingJoerg Roedel2008-09-193-5/+31
| | | | | | | | | | The IO/TLB flushing on every unmaping operation is the most expensive part in AMD IOMMU code and not strictly necessary. It is sufficient to do the flush before any entries are reused. This is patch implements lazy IO/TLB flushing which does exactly this. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: move GART TLB flushing options to generic codeJoerg Roedel2008-09-195-15/+18
| | | | | | | | | | The GART currently implements the iommu=[no]fullflush command line parameters which influence its IO/TLB flushing strategy. This patch makes these parameters generic so that they can be used by the AMD IOMMU too. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* AMD IOMMU: move TLB flushing to the map/unmap helper functionsJoerg Roedel2008-09-191-14/+5
| | | | | | | | | This patch moves the invocation of the flushing functions to the map/unmap helpers because its common code in all dma_ops relevant mapping/unmapping code. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* AMD IOMMU: check for invalid device pointersJoerg Roedel2008-09-191-8/+35
| | | | | | | | Currently AMD IOMMU code triggers a BUG_ON if NULL is passed as the device. This is inconsistent with other IOMMU implementations. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* convert swiotlb to use dma_get_maskFUJITA Tomonori2008-09-192-6/+2
| | | | | | | | swiotlb can use dma_get_mask() instead of the homegrown function. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Cc: tony.luck@intel.com Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: gart alloc_coherent does virtual mapppings only when necessaryFUJITA Tomonori2008-09-141-1/+9
| | | | | | | | | gart alloc_coherent need to do virtual mapppings only when an allocated buffer is not DMA-capable for a device. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: avoid unnecessary low zone allocation in Calgary's alloc_coherentFUJITA Tomonori2008-09-141-0/+2
| | | | | | | | | | | x86's common alloc_coherent (dma_alloc_coherent in dma-mapping.h) sets up the gfp flag according to the device dma_mask but Calgary doesn't need it because of virtual mappings. This patch avoids unnecessary low zone allocation. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by: Muli Ben-Yehuda <muli@il.ibm.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: make GART to respect device's dma_mask about virtual mappingsFUJITA Tomonori2008-09-141-11/+28
| | | | | | | | | | | Currently, GART IOMMU ingores device's dma_mask when it does virtual mappings. So it could give a device a virtual address that the device can't access to. This patch fixes the above problem. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* iommu: add dma_get_mask helper functionFUJITA Tomonori2008-09-141-0/+7
| | | | | | | | Several IOMMUs do the same thing to get the dma_mask of a device. This adds a helper function to do the same thing to sweep them. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* iommu: add iommu_device_max_index IOMMU helper functionFUJITA Tomonori2008-09-141-0/+10
| | | | | | | | This function helps IOMMUs to know the highest address that a device can access to. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* Merge branch 'linus' into x86/iommuIngo Molnar2008-09-1492-784/+1212
|\ | | | | | | | | | | | | Conflicts: lib/swiotlb.c Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2008-09-136-40/+131
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * master.kernel.org:/home/rmk/linux-2.6-arm: [ARM] Fix PCI_DMA_BUS_IS_PHYS for ARM [ARM] 5247/1: tosa: SW_EAR_IN support [ARM] 5246/1: tosa: add proper clock alias for tc6393xb clock [ARM] 5245/1: Fix warning about unused return value in drivers/pcmcia [ARM] OMAP: Fix MMC device data imx serial: fix rts handling for non imx1 based hardware imx serial: set RXD mux bit on i.MX27 and i.MX31 i.MX serial: fix init failure pcm037: add rts/cts support for serial port
| | * [ARM] Fix PCI_DMA_BUS_IS_PHYS for ARMRussell King2008-09-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PCI_DMA_BUS_IS_PHYS was defined to be zero, which meant we ignored the DMA mask for IDE and SCSI transfers. This is wrong - we have no DMA translation hardware. We want to obey DMA masks so that the block layer performs bouncing itself. Reported-by: Mikael Pettersson <mikpe@it.uu.se> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * Merge branch 'for-rmk' of ↵Russell King2008-09-132-6/+23
| | |\ | | | | | | | | | | | | git://pasiphae.extern.pengutronix.de/git/imx/linux-2.6.git
| | | * imx serial: fix rts handling for non imx1 based hardwareMarc Kleine-Budde2008-09-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The interrupt handler for muxed interrupts (imx2/imx3) was calling the rts handling subroutine if the RTSS bit was set. (Which indicates the status of the RTS line), leading to an interrupt flood on RTS bit low. This patch fixes the problem by looking at the RTSD bit instead, indicating a change in the RTS line. Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | | * imx serial: set RXD mux bit on i.MX27 and i.MX31Marc Kleine-Budde2008-09-021-2/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | RX in i.MX27 and i.MX31 UART lines does not work unless the "RXD Muxed Input Select" bit is set on i.MX27 and i.MX31 processors. This patch sets the missing RXD mux bit in the UCR3 register. Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | | * i.MX serial: fix init failureDarius Augulis2008-09-021-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds extra "out" label to probe function after calling .init form platform data. Because .init can return error number caused by gpio request fail. Signed-off-by: Darius Augulis <augulis.darius@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | | * pcm037: add rts/cts support for serial portSascha Hauer2008-09-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | We have rts/cts pins on the first serial port on the pcm037. Enable it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | * | [ARM] 5247/1: tosa: SW_EAR_IN supportDmitry Baryshkov2008-09-131-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com> Acked-by: Eric Miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | [ARM] 5246/1: tosa: add proper clock alias for tc6393xb clockDmitry Baryshkov2008-09-131-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add clock alias for clock that is used by tc6393xb device on tosa. As that chip plays pretty major part in tosa life and is currently disabled, this is 2.4.27 material. Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | [ARM] 5245/1: Fix warning about unused return value in drivers/pcmciaJürgen Schindele2008-09-131-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix warning when compiling "drivers/pcmcia/soc-common.c" The return value of the function "device_create_file" was not used / assigned. Signed-off-by: Jrgen Schindele <linux@schindele.name> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | [ARM] OMAP: Fix MMC device dataRussell King2008-09-111-32/+91
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAPs MMC device data was passing the wrong structure via the platform device. Moreover, a missing function means that both sx1_defconfig and omap_h2_1610_defconfig builds failed with undefined reference to `omap_set_mmc_info' errors. Fix this by updating the MMC support from the omapzoom tree. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | Merge branch 'upstream-linus' of ↵Linus Torvalds2008-09-133-3/+4
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev * 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev: [libata] LBA28/LBA48 off-by-one bug in ata.h sata_inic162x: enable LED blinking ata: duplicate variable sparse warning
| | * | | [libata] LBA28/LBA48 off-by-one bug in ata.hTaisuke Yamada2008-09-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I recently bought 3 HGST P7K500-series 500GB SATA drives and had trouble accessing the block right on the LBA28-LBA48 border. Here's how it fails (same for all 3 drives): # dd if=/dev/sdc bs=512 count=1 skip=268435455 > /dev/null dd: reading `/dev/sdc': Input/output error 0+0 records in 0+0 records out 0 bytes (0 B) copied, 0.288033 seconds, 0.0 kB/s # dmesg ata1.00: exception Emask 0x0 SAct 0x0 SErr 0x0 action 0x0 ata1.00: BMDMA stat 0x25 ata1.00: cmd c8/00:08:f8:ff:ff/00:00:00:00:00/ef tag 0 dma 4096 in res 51/04:08:f8:ff:ff/00:00:00:00:00/ef Emask 0x1 (device error) ata1.00: status: { DRDY ERR } ata1.00: error: { ABRT } ata1.00: configured for UDMA/33 ata1: EH complete ... After some investigations, it turned out this seems to be caused by misinterpretation of the ATA specification on LBA28 access. Following part is the code in question: === include/linux/ata.h === static inline int lba_28_ok(u64 block, u32 n_block) { /* check the ending block number */ return ((block + n_block - 1) < ((u64)1 << 28)) && (n_block <= 256); } HGST drive (sometimes) fails with LBA28 access of {block = 0xfffffff, n_block = 1}, and this behavior seems to be comformant. Other drives, including other HGST drives are not that strict, through. >From the ATA specification: (http://www.t13.org/Documents/UploadedDocuments/project/d1410r3b-ATA-ATAPI-6.pdf) 8.15.29 Word (61:60): Total number of user addressable sectors This field contains a value that is one greater than the total number of user addressable sectors (see 6.2). The maximum value that shall be placed in this field is 0FFFFFFFh. So the driver shouldn't use the value of 0xfffffff for LBA28 request as this exceeds maximum user addressable sector. The logical maximum value for LBA28 is 0xffffffe. The obvious fix is to cut "- 1" part, and the patch attached just do that. I've been using the patched kernel for about a month now, and the same fix is also floating on the net for some time. So I believe this fix works reliably. Just FYI, many Windows/Intel platform users also seems to be struck by this, and HGST has issued a note pointing to Intel ICH8/9 driver. "28-bit LBA command is being used to access LBAs 29-bits in length" http://www.hitachigst.com/hddt/knowtree.nsf/cffe836ed7c12018862565b000530c74/b531b8bce8745fb78825740f00580e23 Also, *BSDs seems to have similar fix included sometime around ~2004, through I have not checked out exact portion of the code. Signed-off-by: Taisuke Yamada <tai@rakugaki.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
| | * | | sata_inic162x: enable LED blinkingBob Stewart2008-09-131-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable LED blinking. Signed-off-by: Bob Stewart <bob@evoria.net> Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
| | * | | ata: duplicate variable sparse warningStephen Hemminger2008-09-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | drivers/ata/ata_piix.c:1502:7: warning: symbol 'rc' shadows an earlier one Signed-off-by: Stephen Hemminger <shemminger@vyatta.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
| * | | | Merge branch 'for-linus' of ↵Linus Torvalds2008-09-135-8/+47
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6 * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6: PCI: re-add debug prints for unmodified BARs PCI: fix pciehp_free_irq() PCI Hotplug: fakephp: fix deadlock... again PCI: Fix printk warnings in setup-bus.c PCI: Fix printk warnings in probe.c PCI/iommu: blacklist DMAR on Intel G31/G33 chipsets
| | * | | | PCI: re-add debug prints for unmodified BARsYinghai Lu2008-09-131-4/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Print out for device BAR values before the kernel tries to update them. Also make related output use KERN_DEBUG. Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| | * | | | PCI: fix pciehp_free_irq()Adrian Bunk2008-09-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes an obvious bug (loop was never entered) caused by commit 820943b6fc4781621dee52ba026106758a727dd3 (pciehp: cleanup pcie_poll_cmd). Reported-by: Adrian Bunk <bunk@kernel.org> Signed-off-by: Adrian Bunk <bunk@kernel.org> Acked-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
generated by cgit v1.2.3 (git 2.39.1) at 2025-01-04 16:17:43 +0100