summaryrefslogtreecommitdiffstats
Commit message (Expand)AuthorAgeFilesLines
...
| | | | | * | | | dt-bindings: clock: qcom,gcc-ipq8064: add pll4 to used clocksDmitry Baryshkov2022-11-061-2/+7
| | | | | * | | | dt-bindings: clock: split qcom,gcc-sdm660 to the separate fileDmitry Baryshkov2022-10-172-3/+61
| | | | |/ / / /
| | | * | | | | clk: Add trace events for rate requestsMaxime Ripard2022-12-072-0/+74
| | | * | | | | clk: Store clk_core for clk_rate_requestMaxime Ripard2022-12-072-0/+3
| | | |/ / / /
| | * | | | | Merge tag 'mtk-clk-for-6.2' of https://git.kernel.org/pub/scm/linux/kernel/gi...Stephen Boyd2022-11-2920-386/+1135
| | |\ \ \ \ \ | | | |/ / / / | | |/| | | |
| | | * | | | clk: mediatek: fix dependency of MT7986 ADC clocksDaniel Golle2022-11-291-1/+1
| | | * | | | clk: mediatek: Change PLL register API for MT8186Johnson Wang2022-11-292-3/+64
| | | * | | | clk: mediatek: Add new clock driver to handle FHCTL hardwareJohnson Wang2022-11-296-0/+635
| | | * | | | dt-bindings: clock: mediatek: Add new bindings of MediaTek frequency hoppingJohnson Wang2022-11-291-0/+53
| | | * | | | clk: mediatek: Export PLL operations symbolsJohnson Wang2022-11-292-50/+89
| | | * | | | clk: mediatek: mt8186-topckgen: Add GPU clock mux notifierAngeloGioacchino Del Regno2022-11-291-0/+27
| | | * | | | clk: mediatek: mt8186-mfg: Propagate rate changes to parentAngeloGioacchino Del Regno2022-11-291-2/+3
| | | * | | | clk: mediatek: mt8195-topckgen: Drop flags for main/univpll fixed factorsAngeloGioacchino Del Regno2022-11-291-39/+39
| | | * | | | clk: mediatek: mt8192: Drop flags for main/univpll fixed factorsAngeloGioacchino Del Regno2022-11-291-38/+38
| | | * | | | clk: mediatek: mt6795-topckgen: Drop flags for main/sys/univpll fixed factorsAngeloGioacchino Del Regno2022-11-291-38/+38
| | | * | | | clk: mediatek: mt8173: Drop flags for main/sys/univpll fixed factorsAngeloGioacchino Del Regno2022-11-291-38/+38
| | | * | | | clk: mediatek: mt8183: Drop flags for sys/univpll fixed factorsAngeloGioacchino Del Regno2022-11-291-38/+38
| | | * | | | clk: mediatek: mt8183: Compress top_divs array entriesAngeloGioacchino Del Regno2022-11-291-144/+72
| | | * | | | clk: mediatek: mt8186-topckgen: Drop flags for main/univpll fixed factorsAngeloGioacchino Del Regno2022-11-291-31/+31
| | | * | | | clk: mediatek: clk-mtk: Allow specifying flags on mtk_fixed_factor clocksAngeloGioacchino Del Regno2022-11-292-2/+7
| | |/ / / /
| | | | | |
| | \ \ \ \
| | \ \ \ \
| | \ \ \ \
| | \ \ \ \
| | \ \ \ \
| *-----. \ \ \ \ Merge branches 'clk-spear', 'clk-fract', 'clk-rockchip' and 'clk-imx' into cl...Stephen Boyd2022-12-1232-198/+5627
| |\ \ \ \ \ \ \ \
| | | | | * \ \ \ \ Merge tag 'clk-imx-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/abel...Stephen Boyd2022-11-2917-147/+178
| | | | | |\ \ \ \ \ | | | | | | |/ / / / | | | | | |/| | | |
| | | | | | * | | | clk: imx: rename imx_obtain_fixed_clk_hw() to imx_get_clk_hw_by_name()Dario Binacchi2022-11-2513-55/+53
| | | | | | * | | | clk: imx8mn: fix imx8mn_enet_phy_sels clocks listDario Binacchi2022-11-251-2/+2
| | | | | | * | | | clk: imx8mn: fix imx8mn_sai2_sels clocks listDario Binacchi2022-11-251-1/+1
| | | | | | * | | | clk: imx: rename video_pll1 to video_pllDario Binacchi2022-11-252-52/+56
| | | | | | * | | | clk: imx: replace osc_hdmi with dummyDario Binacchi2022-11-251-6/+6
| | | | | | * | | | clk: imx8mn: rename vpu_pll to m7_alt_pllDario Binacchi2022-11-252-12/+16
| | | | | | * | | | clk: imx: imxrt1050: add IMXRT1050_CLK_LCDIF_PIX clock gateGiulio Benetti2022-11-211-0/+1
| | | | | | * | | | clk: imx: imxrt1050: fix IMXRT1050_CLK_LCDIF_APB offsetsGiulio Benetti2022-11-211-1/+1
| | | | | | * | | | clk: imx8mp: Add audio shared gateAbel Vesa2022-11-211-1/+11
| | | | | | * | | | dt-bindings: clock: imx8mp: Add ids for the audio shared gateAbel Vesa2022-11-211-1/+10
| | | | | | * | | | clk: imx: pll14xx: Add 320 MHz and 640 MHz entries for PLL146xMarek Vasut2022-11-211-0/+2
| | | | | | * | | | clk: imx93: keep sys ctr clock always onJacky Bai2022-11-211-1/+2
| | | | | | * | | | clk: imx: keep hsio bus clock always onJacky Bai2022-11-211-1/+5
| | | | | | * | | | clk: imx93: drop tpm1/3, lpit1/2 clkPeng Fan2022-11-211-8/+4
| | | | | | * | | | dt-bindings: clock: imx93: drop TPM1/3 LPIT1/2 entryPeng Fan2022-11-211-4/+0
| | | | | | * | | | clk: imx93: correct enet clockPeng Fan2022-11-211-1/+1
| | | | | | * | | | clk: imx93: unmap anatop base in error handling pathPeng Fan2022-11-211-6/+9
| | | | | | * | | | clk: imx: imx8mp: add shared clk gate for usb suspend clkLi Jun2022-11-211-1/+3
| | | | | | * | | | dt-bindings: clocks: imx8mp: Add ID for usb suspend clockLi Jun2022-11-211-1/+2
| | | | | | * | | | clk: imx93: correct the flexspi1 clock settingHaibo Chen2022-11-211-1/+1
| | | | | |/ / / /
| | | | * | | | | Merge tag 'v6.2-rockchip-clk-1' of git://git.kernel.org/pub/scm/linux/kernel/...Stephen Boyd2022-11-2913-38/+5389
| | | | |\ \ \ \ \ | | | | | |/ / / / | | | | |/| | | |
| | | | | * | | | clk: rockchip: Fix memory leak in rockchip_clk_register_pll()Xiu Jianfeng2022-11-231-0/+1
| | | | | * | | | clk: rockchip: add clock controller for the RK3588Elaine Zhang2022-11-155-1/+3447
| | | | | * | | | clk: rockchip: add lookup table supportSebastian Reichel2022-11-142-15/+40
| | | | | * | | | clk: rockchip: simplify rockchip_clk_add_lookupSebastian Reichel2022-11-142-10/+6
| | | | | * | | | clk: rockchip: allow additional mux options for cpu-clock frequency changesElaine Zhang2022-11-142-0/+43
| | | | | * | | | clk: rockchip: add pll type for RK3588Elaine Zhang2022-11-142-1/+235
| | | | | * | | | clk: rockchip: add register offset of the cores select parentElaine Zhang2022-11-142-8/+23