summaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* Merge tag 'imx-drivers-5.17' of ↵Arnd Bergmann2021-12-204-4/+125
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers i.MX drivers update for 5.17: - A number of patches from Adam Ford to update gpcv2 and blk-ctrl driver to keep i.MX8MM VPU-H1 and i.MX8MN GPUMIX bus clocks active, and add i.MX8MN display related domain support. - Add optional continuous burst clock support for imx-weim bus driver. - Call pm_runtime_put_sync_suspend() instead of pm_runtime_put() in gpcv2 driver to prevent a sequence issue seen with i.MX8MM GPU and MIX domain. * tag 'imx-drivers-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: soc: imx: imx8m-blk-ctrl: add i.MX8MN DISP blk-ctrl dt-bindings: power: imx8mn: add defines for DISP blk-ctrl domains soc: imx: gpcv2: Add dispmix and mipi domains to imx8mn soc: imx: gpcv2: keep i.MX8MN gpumix bus clock enabled bus: imx-weim: optionally enable continuous burst clock soc: imx: gpcv2: keep i.MX8MM VPU-H1 bus clock active soc: imx: gpcv2: Synchronously suspend MIX domains Link: https://lore.kernel.org/r/20211218071427.26745-1-shawnguo@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * soc: imx: imx8m-blk-ctrl: add i.MX8MN DISP blk-ctrlAdam Ford2021-12-171-1/+76
| | | | | | | | | | | | | | | | This adds the description for the i.MX8MN disp blk-ctrl. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * dt-bindings: power: imx8mn: add defines for DISP blk-ctrl domainsAdam Ford2021-12-171-0/+5
| | | | | | | | | | | | | | | | | | | | This adds the defines for the power domains provided by the DISP blk-ctrl. Signed-off-by: Adam Ford <aford173@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * soc: imx: gpcv2: Add dispmix and mipi domains to imx8mnAdam Ford2021-12-171-0/+25
| | | | | | | | | | | | | | | | | | The dispmix will be needed for the blkctl driver, so add it to the gpcv2. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * soc: imx: gpcv2: keep i.MX8MN gpumix bus clock enabledAdam Ford2021-12-171-0/+1
| | | | | | | | | | | | | | | | | | Like the i.MX8MM, keep the gpumix clocks running when the domain is active. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * bus: imx-weim: optionally enable continuous burst clockIvan Bornyakov2021-12-141-2/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To enable continuous burst clock, add "fsl,continuous-burst-clk" along with "fsl,burst-clk-enable" property to the weim bus's devicetree node. Example: weim: weim@21b8000 { compatible = "fsl,imx6ul-weim", "fsl,imx6q-weim"; reg = <0x021b8000 0x4000>; clocks = <&clks 143>; #address-cells = <2>; #size-cells = <1>; ranges = <0 0 0x50000000 0x08000000>; fsl,weim-cs-gpr = <&gpr>; fsl,burst-clk-enable; fsl,continuous-burst-clk; client-device@0 { ... }; }; Signed-off-by: Ivan Bornyakov <i.bornyakov@metrotek.ru> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * soc: imx: gpcv2: keep i.MX8MM VPU-H1 bus clock activeAdam Ford2021-11-231-0/+1
| | | | | | | | | | | | | | | | | | | | Enable the vpu-h1 clock when the domain is active because reading or writing to the VPU-H1 IP block cause the system to hang. Fixes: 656ade7aa42a ("soc: imx: gpcv2: keep i.MX8M* bus clocks enabled") Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * soc: imx: gpcv2: Synchronously suspend MIX domainsMarek Vasut2021-11-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In case the following power domain sequence happens, iMX8M Mini always hangs: gpumix:on -> gpu:on -> gpu:off -> gpu:on This is likely due to another quirk of the GPC block. This situation can be prevented by always synchronously powering off both the domain and MIX domain. Make it so. This turns the aforementioned sequence into: gpumix:on -> gpu:on -> gpu:off -> gpumix:off -> gpumix:on -> gpu:on Signed-off-by: Marek Vasut <marex@denx.de> Cc: Frieder Schrempf <frieder.schrempf@kontron.de> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: NXP Linux Team <linux-imx@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Shawn Guo <shawnguo@kernel.org> Acked-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* | Merge tag 'at91-soc-5.17' of ↵Arnd Bergmann2021-12-201-0/+2
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/drivers AT91 SoC #1 for 5.17: - one low priority fix about of_node_put() missing in PM code * tag 'at91-soc-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: at91: pm: Add of_node_put() before goto Link: https://lore.kernel.org/r/20211217164134.28566-1-nicolas.ferre@microchip.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | ARM: at91: pm: Add of_node_put() before gotoWan Jiabing2021-12-081-0/+2
| |/ | | | | | | | | | | | | | | | | | | | | | | | | Fix following coccicheck warning: ./arch/arm/mach-at91/pm.c:643:1-33: WARNING: Function for_each_matching_node_and_match should have of_node_put() before goto Early exits from for_each_matching_node_and_match should decrement the node reference counter. Signed-off-by: Wan Jiabing <wanjiabing@vivo.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20211014084555.21422-1-wanjiabing@vivo.com
* | Merge tag 'tegra-for-5.17-soc' of ↵Arnd Bergmann2021-12-207-25/+326
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers soc/tegra: Changes for v5.17-rc1 This set of changes contains some preparatory work that is shared by several branches and trees to support DVFS via power domains. There's also a bit of cleanup and improvements to reboot on chips that use PSCI. * tag 'tegra-for-5.17-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: soc/tegra: pmc: Rename core power domain soc/tegra: pmc: Rename 3d power domains soc/tegra: regulators: Prepare for suspend soc/tegra: fuse: Use resource-managed helpers soc/tegra: fuse: Reset hardware soc/tegra: pmc: Add reboot notifier soc/tegra: Don't print error message when OPPs not available Link: https://lore.kernel.org/r/20211217162253.1801077-1-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | soc/tegra: pmc: Rename core power domainDmitry Osipenko2021-12-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | CORE power domain uses name of device-tree node, which is inconsistent with the names of PMC domains. Set the name to "core" to make it consistent. Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| * | soc/tegra: pmc: Rename 3d power domainsDmitry Osipenko2021-12-161-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Device-tree schema doesn't allow domain name to start with a number. We don't use 3d domain yet in device-trees, so rename it to the name used by Tegra TRMs: TD, TD2. Reported-by: David Heidelberg <david@ixit.cz> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| * | soc/tegra: regulators: Prepare for suspendDmitry Osipenko2021-12-162-0/+221
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Depending on hardware version, Tegra SoC may require a higher voltages during resume from system suspend, otherwise hardware will crash. Set SoC voltages to a nominal levels during suspend. Link: https://lore.kernel.org/all/a8280b5b-7347-8995-c97b-10b798cdf057@gmail.com/ Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| * | soc/tegra: fuse: Use resource-managed helpersDmitry Osipenko2021-12-162-17/+48
| | | | | | | | | | | | | | | | | | | | | | | | Use resource-managed helpers to make code cleaner and more correct, properly releasing all resources in case of driver probe error. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| * | soc/tegra: fuse: Reset hardwareDmitry Osipenko2021-12-162-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | The FUSE controller is enabled at a boot time. Reset it in order to put hardware and clock into clean and disabled state. Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| * | soc/tegra: pmc: Add reboot notifierJon Hunter2021-12-161-3/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Tegra PMC driver implements a restart handler that supports Tegra specific reboot commands such as placing the device into 'recovery' mode in order to reprogram the platform. This is accomplished by setting the appropriate bit in the PMC scratch0 register prior to rebooting the platform. For Tegra platforms that support PSCI or EFI, the default Tegra restart handler is not called and the PSCI or EFI restart handler is called instead. Hence, for Tegra platforms that support PSCI or EFI, the Tegra specific reboot commands do not currently work. Fix this by moving the code that programs the PMC scratch0 register into a separate reboot notifier that will always be called on reboot. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Tested-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| * | soc/tegra: Don't print error message when OPPs not availableDmitry Osipenko2021-12-161-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously we assumed that devm_tegra_core_dev_init_opp_table() will be used only by drivers that will always have device with OPP table, but this is not true anymore. For example now Tegra30 will have OPP table for PWM, but Tegra20 not and both use the same driver. Hence let's not print the error message about missing OPP table in the common helper, we can print it elsewhere. Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* | | Merge tag 'tegra-for-5.17-drivers' of ↵Arnd Bergmann2021-12-209-67/+369
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers drivers: Changes for v5.17-rc1 This is an assortment of driver patches that rely on some of the changes in the for-5.17/soc branch. These have all been acked by the respective maintainers and go through the Tegra tree to more easily handle the build dependency. * tag 'tegra-for-5.17-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: media: staging: tegra-vde: Support generic power domain spi: tegra20-slink: Add OPP support mtd: rawnand: tegra: Add runtime PM and OPP support mmc: sdhci-tegra: Add runtime PM and OPP support pwm: tegra: Add runtime PM and OPP support bus: tegra-gmi: Add runtime PM and OPP support usb: chipidea: tegra: Add runtime PM and OPP support soc/tegra: Add devm_tegra_core_dev_init_opp_table_common() soc/tegra: Enable runtime PM during OPP state-syncing Link: https://lore.kernel.org/r/20211217162253.1801077-2-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | | media: staging: tegra-vde: Support generic power domainDmitry Osipenko2021-12-161-11/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently driver supports legacy power domain API, this patch adds generic power domain support. This allows us to utilize a modern GENPD API for newer device-trees. Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30 Tested-by: Paul Fertser <fercerpav@gmail.com> # PAZ00 T20 Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20 and TK1 T124 Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30 Acked-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| * | | spi: tegra20-slink: Add OPP supportDmitry Osipenko2021-12-161-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SPI on Tegra belongs to the core power domain and we're going to enable GENPD support for the core domain. Now SPI driver must use OPP API for driving the controller's clock rate because OPP API takes care of reconfiguring the domain's performance state in accordance to the rate. Add OPP support to the driver. Acked-by: Mark Brown <broonie@kernel.org> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| * | | mtd: rawnand: tegra: Add runtime PM and OPP supportDmitry Osipenko2021-12-161-8/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The NAND on Tegra belongs to the core power domain and we're going to enable GENPD support for the core domain. Now NAND must be resumed using runtime PM API in order to initialize the NAND power state. Add runtime PM and OPP support to the NAND driver. Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| * | | mmc: sdhci-tegra: Add runtime PM and OPP supportDmitry Osipenko2021-12-161-16/+65
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SDHCI on Tegra belongs to the core power domain and we're going to enable GENPD support for the core domain. Now SDHCI must be resumed using runtime PM API in order to initialize the SDHCI power state. The SDHCI clock rate must be changed using OPP API that will reconfigure the power domain performance state in accordance to the rate. Add runtime PM and OPP support to the SDHCI driver. Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| * | | pwm: tegra: Add runtime PM and OPP supportDmitry Osipenko2021-12-161-18/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PWM on Tegra belongs to the core power domain and we're going to enable GENPD support for the core domain. Now PWM must be resumed using runtime PM API in order to initialize the PWM power state. The PWM clock rate must be changed using OPP API that will reconfigure the power domain performance state in accordance to the rate. Add runtime PM and OPP support to the PWM driver. Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| * | | bus: tegra-gmi: Add runtime PM and OPP supportDmitry Osipenko2021-12-161-6/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The GMI bus on Tegra belongs to the core power domain and we're going to enable GENPD support for the core domain. Now GMI must be resumed using runtime PM API in order to initialize the GMI power state. Add runtime PM and OPP support to the GMI driver. Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| * | | usb: chipidea: tegra: Add runtime PM and OPP supportDmitry Osipenko2021-12-161-7/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Tegra USB controller belongs to the core power domain and we're going to enable GENPD support for the core domain. Now USB controller must be resumed using runtime PM API in order to initialize the USB power state. We already support runtime PM for the CI device, but CI's PM is separated from the RPM managed by tegra-usb driver. Add runtime PM and OPP support to the driver. Acked-by: Peter Chen <peter.chen@kernel.org> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| * | | Merge branch 'tegra-for-5.17-soc-opp' of ↵Thierry Reding2021-12-162-0/+40
| |\| | | | |/ | |/| | | | git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into for-5.17/drivers
| | * soc/tegra: Add devm_tegra_core_dev_init_opp_table_common()Dmitry Osipenko2021-12-161-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Only couple drivers need to get the -ENODEV error code and majority of drivers need to explicitly initialize the performance state. Add new common helper which sets up OPP table for these drivers. Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * soc/tegra: Enable runtime PM during OPP state-syncingDmitry Osipenko2021-12-161-0/+25
| |/ | | | | | | | | | | | | | | | | | | | | | | | | GENPD core now can set up domain's performance state properly while device is RPM-suspended. Runtime PM of a device must be enabled during setup because GENPD checks whether device is suspended and check doesn't work while RPM is disabled. Instead of replicating the boilerplate RPM-enable code around OPP helper for each driver, let's make OPP helper to take care of enabling it. Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* | Merge tag 'ti-driver-soc-fixes-for-v5.17' of ↵Arnd Bergmann2021-12-204-13/+14
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into arm/drivers SoC: Keystone driver update for v5.17 * k3-socinfo: Add entry for J721S2 SoC family * Misc fixups for tisci, pruss, knav_dma * tag 'ti-driver-soc-fixes-for-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: soc: ti: knav_dma: Fix NULL vs IS_ERR() checking in dma_init soc: ti: k3-socinfo: Add entry for J721S2 SoC family firmware: ti_sci: rm: remove unneeded semicolon soc: ti: pruss: fix referenced node in error message Link: https://lore.kernel.org/r/20211217154921.cagzppcensxx6wm4@pension Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | soc: ti: knav_dma: Fix NULL vs IS_ERR() checking in dma_initMiaoqian Lin2021-12-161-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since devm_ioremap_resource() function return error pointers. The pktdma_get_regs() function does not return NULL, It return error pointers too. Using IS_ERR() to check the return value to fix this. Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20211214015544.7270-1-linmq006@gmail.com
| * | soc: ti: k3-socinfo: Add entry for J721S2 SoC familyAswath Govindraju2021-12-131-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | J721S2 SoC's JTAG PARTNO is 0xBB75. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Kishon Vijay Abraham I <kishon@ti.com> Link: https://lore.kernel.org/r/20211203120913.14737-1-a-govindraju@ti.com
| * | firmware: ti_sci: rm: remove unneeded semicolonJason Wang2021-11-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The semicolon after `}' is unneeded. So, just remove it. Signed-off-by: Jason Wang <wangborong@cdjrlc.com> Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20211114055333.217919-1-wangborong@cdjrlc.com
| * | soc: ti: pruss: fix referenced node in error messageJan Kiszka2021-11-231-1/+1
| |/ | | | | | | | | | | | | | | | | So far, "(null)" is reported for the node that is missing clocks. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Acked-by: Suman Anna <s-anna@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/d6e24953-ea89-fd1c-6e16-7a0142118054@siemens.com
* | Merge tag 'renesas-drivers-for-v5.17-tag2' of ↵Arnd Bergmann2021-12-1710-380/+596
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/drivers Renesas driver updates for v5.17 (take two) - Core support for the R-Car S4-8 (R8A779F0) SoC, including System Controller (SYSC) and Reset (RST) support. * tag 'renesas-drivers-for-v5.17-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: soc: renesas: rcar-rst: Add support for R-Car S4-8 soc: renesas: Identify R-Car S4-8 soc: renesas: r8a779f0-sysc: Add r8a779f0 support soc: renesas: rcar-gen4-sysc: Introduce R-Car Gen4 SYSC driver dt-bindings: clock: Add r8a779f0 CPG Core Clock Definitions dt-bindings: power: Add r8a779f0 SYSC power domain definitions Link: https://lore.kernel.org/r/cover.1639736722.git.geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | soc: renesas: rcar-rst: Add support for R-Car S4-8Yoshihiro Shimoda2021-12-071-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for R-Car S4-8 (R8A779F0) to the R-Car RST driver. The register map of R-Car S4-8 is the same as R-Car V3U so that renames "V3U" and "r8a779a0" to "Gen4". Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20211201073308.1003945-11-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| * | soc: renesas: Identify R-Car S4-8Yoshihiro Shimoda2021-12-072-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | Add support for identifying the R-Car S4-8 (R8A779F0) SoC. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20211201073308.1003945-8-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| * | soc: renesas: r8a779f0-sysc: Add r8a779f0 supportYoshihiro Shimoda2021-12-075-0/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for R-Car S4-8 (R8A779F0) SoC power areas and register access. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20211201073308.1003945-7-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| * | Merge tag 'renesas-r8a779f0-dt-binding-defs-tag' into renesas-drivers-for-v5.17Geert Uytterhoeven2021-12-072-0/+94
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | Renesas R-Car S4-8 DT Binding Definitions Clock and Power Domain definitions for the Renesas R-Car S4-8 (R8A77FA0) SoC, shared by driver and DT source files.
| | * | dt-bindings: clock: Add r8a779f0 CPG Core Clock DefinitionsYoshihiro Shimoda2021-12-071-0/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add all Clock Pulse Generator Core Clock Outputs for the Renesas R-Car S4-8 (R8A779F0) SoC. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20211201073308.1003945-4-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| | * | dt-bindings: power: Add r8a779f0 SYSC power domain definitionsYoshihiro Shimoda2021-12-071-0/+30
| | |/ | | | | | | | | | | | | | | | | | | | | | Add power domain indices for R-Car S4-8 (r8a779f0). Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20211201073308.1003945-3-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| * | soc: renesas: rcar-gen4-sysc: Introduce R-Car Gen4 SYSC driverYoshihiro Shimoda2021-12-075-377/+423
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to the official website [1], the R-Car V3U SoC is based on the R-Car Gen4 architecture. So, introduce R-Car Gen4 SYSC driver. [1] https://www.renesas.com/us/en/products/automotive-products/automotive-system-chips-socs/r-car-v3u-best-class-r-car-v3u-asil-d-system-chip-automated-driving Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20211201073308.1003945-6-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* | | Merge tag 'asahi-soc-pmgr-5.17-v2' of https://github.com/AsahiLinux/linux ↵Arnd Bergmann2021-12-152-1/+8
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into arm/drivers Apple SoC PMGR driver updates for 5.17 * Adds an auto-PM feature that is necessary for a single device * Disables module builds, which were broken anyway * tag 'asahi-soc-pmgr-5.17-v2' of https://github.com/AsahiLinux/linux: soc: apple: apple-pmgr-pwrstate: Do not build as a module soc: apple: apple-pmgr-pwrstate: Add auto-PM min level support Link: https://lore.kernel.org/r/660f6f7f-0857-b54c-c415-79bcb93f0e02@marcan.st Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | | soc: apple: apple-pmgr-pwrstate: Do not build as a moduleHector Martin2021-12-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This doesn't make any sense as a module since it is a critical device, and it turns out of_phandle_iterator_args was not exported so the module version doesn't build anyway. Fixes: 6df9d38f9146 ("soc: apple: Add driver for Apple PMGR power state controls") Reported-by: kernel test robot <lkp@intel.com> Reviewed-by: Sven Peter <sven@svenpeter.dev> Signed-off-by: Hector Martin <marcan@marcan.st>
| * | | soc: apple: apple-pmgr-pwrstate: Add auto-PM min level supportHector Martin2021-12-121-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is seemingly required for DCP/DCPEXT, without which they refuse to boot properly. They need to be set to minimum state 4 (clock gated). Reviewed-by: Sven Peter <sven@svenpeter.dev> Signed-off-by: Hector Martin <marcan@marcan.st>
* | | | Merge tag 'memory-controller-drv-renesas-5.17' of ↵Arnd Bergmann2021-12-145-57/+122
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers Memory controller drivers for v5.17 - Renesas Changes to the Renesas RPC-IF driver: 1. Add support for R9A07G044 / RZ/G2L. 2. Several minor fixes and improvements to the driver. * tag 'memory-controller-drv-renesas-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: memory: renesas-rpc-if: refactor MOIIO and IOFV macros memory: renesas-rpc-if: avoid use of undocumented bits memory: renesas-rpc-if: simplify register update memory: renesas-rpc-if: Silence clang warning memory: renesas-rpc-if: Add support for RZ/G2L memory: renesas-rpc-if: Drop usage of RPCIF_DIRMAP_SIZE macro memory: renesas-rpc-if: Return error in case devm_ioremap_resource() fails dt-bindings: memory: renesas,rpc-if: Add optional interrupts property dt-bindings: memory: renesas,rpc-if: Add support for the R9A07G044 Link: https://lore.kernel.org/r/20211213105618.5686-1-krzysztof.kozlowski@canonical.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | | | memory: renesas-rpc-if: refactor MOIIO and IOFV macrosWolfram Sang2021-11-221-12/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Don't use _HIZ macros but also provide a val. This is more consistent with the other macros and, thus, easier to read. Also shorter. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20211119110442.4946-1-wsa+renesas@sang-engineering.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| * | | | memory: renesas-rpc-if: avoid use of undocumented bitsWolfram Sang2021-11-221-36/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of writing fixed values with undocumented bits which happen to be set on some SoCs, better switch to read-modify-write operations changing only bits which are documented. This is way more future-proof as we don't know yet how these bits may be on upcoming SoCs. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20211117093710.14430-1-wsa+renesas@sang-engineering.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| * | | | memory: renesas-rpc-if: simplify register updateWolfram Sang2021-11-221-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | No need to open code regmap_update_bits(). Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20211117102902.20062-1-wsa+renesas@sang-engineering.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| * | | | memory: renesas-rpc-if: Silence clang warningLad Prabhakar2021-11-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch silences the following clang warning: | drivers/memory/renesas-rpc-if.c:253:14: warning: cast to smaller integer | type 'enum rpcif_type' from 'const void *' [-Wvoid-pointer-to-enum-cast] | rpc->type = (enum rpcif_type)of_device_get_match_data(dev); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Fixes: b04cc0d912eb8 ("memory: renesas-rpc-if: Add support for RZ/G2L") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20211121180155.9062-1-prabhakar.mahadev-lad.rj@bp.renesas.com [krzysztof: drop enum rpcif_type cast] Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-23 03:04:25 +0100