summaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* pinctrl: nuvoton: wpcm450: Fix build error without OFZheng Bin2022-03-251-0/+1
| | | | | | | | | | | | | | | If OF is not set, bulding fails: drivers/pinctrl/nuvoton/pinctrl-wpcm450.o: In function `wpcm450_dt_node_to_map': pinctrl-wpcm450.c:(.text+0x404): undefined reference to `pinconf_generic_dt_node_to_map' Make PINCTRL_WPCM450 depends on OF to fix this. Fixes: a1d1e0e3d80a ("pinctrl: nuvoton: Add driver for WPCM450") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Zheng Bin <zhengbin13@huawei.com> Link: https://lore.kernel.org/r/20220325074450.3228840-1-zhengbin13@huawei.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: qcom-pmic-gpio: Add support for pm8450Dmitry Baryshkov2022-03-242-0/+2
| | | | | | | | | PM8450 provides 4 GPIOs. Add a compatible entry for this GPIO block. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20220315091106.613153-1-dmitry.baryshkov@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* dt-bindings: pinctrl: aspeed: Update gfx node in exampleJoel Stanley2022-03-241-0/+16
| | | | | | | | | | The example needs updating to match the to be added yaml bindings for the gfx node. Signed-off-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20220304000311.970267-2-joel@jms.id.au Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* dt-bindings: pinctrl: rt2880: add missing pin groups and functionsArınç ÜNAL2022-03-241-5/+6
| | | | | | | | | | | | | | | | Add the missing pin groups: jtag, wdt Add the missing functions: i2s, jtag, pcie refclk, pcie rst, pcm, spdif2, spdif3, wdt refclk, wdt rst Sort pin groups and functions in alphabetical order. Fix a typo. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Link: https://lore.kernel.org/r/20220310140542.7483-1-arinc.unal@arinc9.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: ingenic: Fix regmap on X series SoCsAidan MacDonald2022-03-241-1/+45
| | | | | | | | | | | | | | | | | | | The X series Ingenic SoCs have a shadow GPIO group which is at a higher offset than the other groups, and is used for all GPIO configuration. The regmap did not take this offset into account and set max_register too low, so the regmap API blocked writes to the shadow group, which made the pinctrl driver unable to configure any pins. Fix this by adding regmap access tables to the chip info. The way that max_register was computed was also off by one, since max_register is an inclusive bound, not an exclusive bound; this has been fixed. Cc: stable@vger.kernel.org Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@gmail.com> Fixes: 6626a76ef857 ("pinctrl: ingenic: Add .max_register in regmap_config") Reviewed-by: Paul Cercueil <paul@crapouillou.net> Link: https://lore.kernel.org/r/20220317000740.1045204-1-aidanmacdonald.0x0@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: nuvoton: Fix return value check in wpcm450_gpio_register()Jialin Zhang2022-03-241-2/+3
| | | | | | | | | | | | | In case of error, the function devm_platform_ioremap_resource() returns ERR_PTR() and never returns NULL. The NULL test in the return value check should be replaced with IS_ERR(). Fixes: a1d1e0e3d80a ("pinctrl: nuvoton: Add driver for WPCM450") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Jialin Zhang <zhangjialin11@huawei.com> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Link: https://lore.kernel.org/r/20220317065851.495394-1-zhangjialin11@huawei.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: nuvoton: wpcm450: off by one in wpcm450_gpio_register()Dan Carpenter2022-03-241-1/+1
| | | | | | | | | | | The > WPCM450_NUM_BANKS should be >= or it leads to an out of bounds access on the next line. Fixes: a1d1e0e3d80a ("pinctrl: nuvoton: Add driver for WPCM450") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Link: https://lore.kernel.org/r/20220318071131.GA29472@kili Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: nuvoton: wpcm450: select GENERIC_PINCTRL_GROUPSJonathan Neuschäfer2022-03-241-0/+1
| | | | | | | | | | | | | CONFIG_GENERIC_PINCTRL_GROUPS must be selected in order for struct group_desc to be defined in pinctrl/core.h. Add the missing select line to CONFIG_PINCTRL_WPCM450. Reported-by: kernel test robot <lkp@intel.com> Fixes: a1d1e0e3d80a ("pinctrl: nuvoton: Add driver for WPCM450") Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Link: https://lore.kernel.org/r/20220317114413.1418484-1-j.neuschaefer@gmx.net Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: nuvoton: Fix sparse warningLinus Walleij2022-03-242-3/+3
| | | | | | | | | | | | | | | Sparse complains: drivers/pinctrl/nuvoton/pinctrl-wpcm450.c:626:9: sparse: sparse: obsolete array initializer, use C99 syntax This is because no equal sign is between the array index and the assignments, in the macro. Fix it up. Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: mediatek: mt8186: Account for probe refactoringLinus Walleij2022-03-241-6/+2
| | | | | | | | | | The new MT8186 drive came in and the probe calls were refactored at the same time. Fix it up. Fixes a build issue. Cc: Guodong Liu <guodong.liu@mediatek.com> Cc: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: mediatek: common-v1: Commonize spec_ies_smt_set callbackAngeloGioacchino Del Regno2022-03-179-103/+71
| | | | | | | | | | | | | | | | | | | | | | All of the MediaTek pinctrl drivers registering with pinctrl-mtk-common that are offering a .spec_ies_smt_set() callback are declaring their own function which is doing exactly the same on all drivers: calling mtk_pconf_spec_set_ies_smt_range() with their struct and a simple check. Commonize this callback by adding the ies and smt structure pointers to struct mtk_pinctrl_devdata and changing the callback signature to take it. Removing the callback and checking for the existance of the spec_smt and/or spec_ies data would allow us to staticize the function mtk_pconf_spec_set_ies_smt_range(), but this solution was avoided as to keep flexibility, as some SoCs may need to perform a very different operation compared to what this commonized function is doing. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20220222111144.20796-6-angelogioacchino.delregno@collabora.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: mediatek: common-v1: Commonize spec_pupd callbackAngeloGioacchino Del Regno2022-03-1710-75/+46
| | | | | | | | | | | | | | Reduce code size and duplication by using a common spec_pupd callback, which is possible to use on all of the pinctrl drivers that are using the v1 pinctrl-mtk-common code, with the exception of mt8135, which has a different handling compared to the others. Since the callback function signature was changed, this had to be propagated to pinctrl-mt8135's spec_pull_set(). Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20220222111144.20796-5-angelogioacchino.delregno@collabora.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: mediatek: common-v1: Use common probe functionAngeloGioacchino Del Regno2022-03-177-60/+15
| | | | | | | | | | | | | | | | | | | Most of the mediatek pinctrl drivers are calling mtk_pctrl_init() and passing only a pointer to struct mtk_pinctrl_devdata, as the regmap handle it passed from device-tree, with the exception of mt6397. For all of the drivers that don't require passing a struct regmap pointer from a parent device, simplify the probe mechanism by assigning the required structure as match data and use mtk_pctrl_common_probe() as their probe function. While at it, also collapse the of_device_id entries to a single line, as they all fit in max 83 columns, which is acceptable. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20220222111144.20796-4-angelogioacchino.delregno@collabora.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: mediatek: common-v1: Add common probe functionAngeloGioacchino Del Regno2022-03-172-0/+13
| | | | | | | | | | | As a preparation to cleanup the probe mechanism of mediatek pinctrl drivers that are using the v1 controller, add a common probe function to this driver. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20220222111144.20796-3-angelogioacchino.delregno@collabora.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: mediatek: paris: Unify probe function by using OF match dataAngeloGioacchino Del Regno2022-03-178-47/+19
| | | | | | | | | | | | | | | | All of the SoCs using Paris pinctrl are defining a custom probe function that is simply calling mtk_paris_pinctrl_probe() passing a pointer to the SoC specific mtk_pin_soc structure and nothing else. Simplify the probe mechanism across all pinctrl drivers that are using pinctrl-paris by passing the specific mtk_pin_soc as match data and using function mtk_paris_pinctrl_probe as a common probe function for all of them. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20220222111144.20796-2-angelogioacchino.delregno@collabora.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl/rockchip: Add missing of_node_put() in rockchip_pinctrl_probeMiaoqian Lin2022-03-151-0/+2
| | | | | | | | | | | The device_node pointer is returned by of_parse_phandle() with refcount incremented. We should use of_node_put() on it when done. Fixes: 1e747e59cc4d ("pinctrl: rockchip: base regmap supplied by a syscon") Fixes: 14dee8677e19 ("pinctrl: rockchip: let pmu registers be supplied by a syscon") Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Link: https://lore.kernel.org/r/20220307120234.28657-1-linmq006@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: nomadik: Add missing of_node_put() in nmk_pinctrl_probeMiaoqian Lin2022-03-151-1/+3
| | | | | | | | | | | This node pointer is returned by of_parse_phandle() with refcount incremented in this function. Calling of_node_put() to avoid the refcount leak. Fixes: 32e67eee670e ("pinctrl: nomadik: Allow prcm_base to be extracted from Device Tree") Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Link: https://lore.kernel.org/r/20220307115116.25316-1-linmq006@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: berlin: fix error return code of berlin_pinctrl_build_state()Meng Tang2022-03-151-0/+2
| | | | | | | | | | | When krealloc() fails and pctrl->functions is NULL, no error return code of berlin_pinctrl_build_state() is assigned. To fix this bug, ret is assigned with -ENOMEM when pctrl->functions is NULL. Signed-off-by: Meng Tang <tangmeng@uniontech.com> Link: https://lore.kernel.org/r/20220303080206.16463-1-tangmeng@uniontech.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: qcom: Introduce sc8280xp TLMM driverBjorn Andersson2022-03-153-0/+1963
| | | | | | | | | The SC8280XP comes, like all other Qualcomm platforms, with a TLMM block, so add a driver for it. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220308221132.1423218-2-bjorn.andersson@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* dt-bindings: pinctrl: qcom: Add sc8280xp TLMM bindingBjorn Andersson2022-03-151-0/+151
| | | | | | | | | | | The Qualcomm SC8280XP platform contains a single block of registers for the TLMM block. This provides pinconf and pinmux for 228 GPIOs, 2 UFS_RESET pins and one SDC interface. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20220308221132.1423218-1-bjorn.andersson@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: microchip-sgpio: wait until output is actually setMichael Walle2022-03-151-1/+68
| | | | | | | | | | | | | | | | | | | | | Right now, when a gpio value is set, the actual hardware pin gets set asynchronously. When linux write the output register, it takes some time until it is actually propagated to the output shift registers. If that output port is connected to an I2C mux for example, the linux driver assumes the I2C bus is already switched although it is not. Fortunately, there is a single shot mode with a feedback: you can trigger the single shot and the hardware will clear that bit once it has finished the clocking and strobed the load signal of the shift registers. This can take a considerable amount of time though. Measuremens have shown that it takes up to a whole burst cycle gap which is about 50ms on the largest setting. Therefore, we have to mark the output bank as sleepable. To avoid unnecessary waiting, just trigger the single shot if the value was actually changed. Signed-off-by: Michael Walle <michael@walle.cc> Link: https://lore.kernel.org/r/20220226204507.2511633-6-michael@walle.cc Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: microchip-sgpio: return error in spgio_output_set()Michael Walle2022-03-151-8/+8
| | | | | | | | | | | Make sgpio_output_set() return an error value. Don't just ignore the return value of any regmap access but propagate it to our callers. Even if the accesses never fail, this is a preparation patch to add single shot mode where we need to poll a bit and thus we might get -ETIMEDOUT. Signed-off-by: Michael Walle <michael@walle.cc> Link: https://lore.kernel.org/r/20220226204507.2511633-5-michael@walle.cc Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: microchip-sgpio: use regmap_update_bits()Michael Walle2022-03-151-11/+4
| | | | | | | | | Convert sgpio_clrsetbits() to use regmap_update_bits() and drop the spinlocks because regmap already takes care of the locking. Signed-off-by: Michael Walle <michael@walle.cc> Link: https://lore.kernel.org/r/20220226204507.2511633-4-michael@walle.cc Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: microchip-sgpio: don't do RMW for interrupt ack registerMichael Walle2022-03-151-1/+8
| | | | | | | | | | | | The interrupt ack register has the usual "write one to clear" semantics. No read-modify-write is required here. This is also a preparation patch to change the sgpio_clrsetbits() to use regmap_update_bits() which don't write the value if it is not changed. Signed-off-by: Michael Walle <michael@walle.cc> Link: https://lore.kernel.org/r/20220226204507.2511633-3-michael@walle.cc Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: microchip-sgpio: lock RMW accessMichael Walle2022-03-151-0/+15
| | | | | | | | | Protect any RMW access to the registers by a spinlock. Fixes: 7e5ea974e61c ("pinctrl: pinctrl-microchip-sgpio: Add pinctrl driver for Microsemi Serial GPIO") Signed-off-by: Michael Walle <michael@walle.cc> Link: https://lore.kernel.org/r/20220226204507.2511633-2-michael@walle.cc Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: ocelot: Fix interrupt parsingHoratiu Vultur2022-03-151-2/+2
| | | | | | | | | | | | In the blamed commit, it removes the duplicate of_node assignment in the driver. But the driver uses this before calling into of_gpio_dev_init to determine if it needs to assign an IRQ chip to the GPIO. The fixes consists in using the platform_get_irq_optional Fixes: 8a8d6bbe1d3bc7 ("pinctrl: Get rid of duplicate of_node assignment in the drivers") Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Link: https://lore.kernel.org/r/20220304144432.3397621-3-horatiu.vultur@microchip.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: imx: Reduce printk message level for empty nodesAlexander Stein2022-03-151-1/+1
| | | | | | | | | | | | iomuxc_snvs from imx6ull supports 2 boot mode and 10 tamper pins. Probably most users won't use them, causing this error message during boot: no groups defined in /soc/bus@2200000/iomuxc-snvs@2290000 This is actually not an error in this case, so reduce the level accordingly. Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Link: https://lore.kernel.org/r/20220224094243.1376965-1-alexander.stein@ew.tq-group.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: zynq: use module_platform_driver to simplify the codeSrinivas Neeli2022-03-151-5/+2
| | | | | | | | | module_platform_driver() makes the code simpler by eliminating boilerplate code. Signed-off-by: Srinivas Neeli <srinivas.neeli@xilinx.com> Link: https://lore.kernel.org/r/20220224043605.26157-1-srinivas.neeli@xilinx.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: qcom: cleanup commentsTom Rix2022-03-152-3/+3
| | | | | | | | | | | | Add leading space to spdx tag Replacements voilates to violates sepearte to separate Signed-off-by: Tom Rix <trix@redhat.com> Link: https://lore.kernel.org/r/20220220162355.3594831-1-trix@redhat.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* dt-bindings: pinctrl: mt8195: Add mediatek,drive-strength-adv propertyTinghan Shen2022-03-151-0/+35
| | | | | | | | | | | Extend driving support for I2C pins on SoC mt8195. This property is already documented in mediatek,mt8183-pinctrl.yaml. Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220216113131.13145-3-tinghan.shen@mediatek.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: mediatek: pinctrl-mtk-common: Simplify with dev_err_probe()AngeloGioacchino Del Regno2022-03-151-14/+11
| | | | | | | | | | Use the dev_err_probe() helper to simplify error handling during probe. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20220308100956.2750295-12-wenst@chromium.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: mediatek: pinctrl-paris: Simplify with dev_err_probe()AngeloGioacchino Del Regno2022-03-151-12/+7
| | | | | | | | | | Use the dev_err_probe() helper to simplify error handling during probe. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20220308100956.2750295-11-wenst@chromium.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: mediatek: pinctrl-moore: Simplify with dev_err_probe()AngeloGioacchino Del Regno2022-03-151-16/+9
| | | | | | | | | | Use the dev_err_probe() helper to simplify error handling during probe. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20220308100956.2750295-10-wenst@chromium.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: mediatek: paris: Support generic PIN_CONFIG_DRIVE_STRENGTH_UAChen-Yu Tsai2022-03-151-0/+99
| | | | | | | | | | | | | | | | | | | | | Some of the MediaTek chips that utilize the Paris pinctrl driver library support a lower drive strength (<= 1mA) than the standard drive strength settings (2~16 mA) on certain pins. This was previously supported by the custom MTK_PIN_CONFIG_DRV_ADV parameter along with the "mediatek,drive-strength-adv" device tree property. The drive strength values for this hardware are 125, 250, 500, and 1000 mA, and can be readily described by the existing "drive-strength-microamp" property, which then gets parsed by the generic pinconf library into the parameter PIN_CONFIG_DRIVE_STRENGTH_UA. Add support for PIN_CONFIG_DRIVE_STRENGTH_UA while keeping the old custom parameter around for backward compatibility. Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220308100956.2750295-9-wenst@chromium.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: mediatek: paris: Rework mtk_pinconf_{get,set} switch/case logicChen-Yu Tsai2022-03-151-83/+61
| | | | | | | | | | | | | | | | | | | | | | | | | The current code deals with optional features by testing for the function pointers and returning -ENOTSUPP if it is not valid. This is done for multiple pin config settings and results in the code that handles the supporting cases to get indented by one level. This is aggrevated by the fact that some features require another level of conditionals. Instead of assigning the same error code in all unsupported optional feature cases, simply have that error code as the default, and break out of the switch/case block whenever a feature is unsupported, or an error is returned. This reduces indentation by one level for the useful code. Also replace the goto statements with break statements. The result is the same, as the gotos simply exit the switch/case block, which can also be achieved with a break statement. With the latter the intent is clear and easier to understand. Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220308100956.2750295-8-wenst@chromium.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: mediatek: paris: Skip custom extra pin config dump for virtual GPIOsChen-Yu Tsai2022-03-151-0/+3
| | | | | | | | | | | | | | Virtual GPIOs do not have any hardware state associated with them. Any attempt to read back hardware state for these pins result in error codes. Skip dumping extra pin config information for these virtual GPIOs. Fixes: 184d8e13f9b1 ("pinctrl: mediatek: Add support for pin configuration dump via debugfs.") Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220308100956.2750295-7-wenst@chromium.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: mediatek: paris: Drop extra newline in mtk_pctrl_show_one_pin()Chen-Yu Tsai2022-03-151-8/+4
| | | | | | | | | | | | | | | | | | The caller of mtk_pctrl_show_one_pin() is responsible for printing the full line. mtk_pctrl_show_one_pin(), called through mtk_pctrl_dbg_show(), should only produce a string containing the extra information the driver wants included. Drop the extra newlines. Also unbreak the line that is only slightly over 80 characters to make it easier on the eye, and get rid of the braces now that each block in the conditionals is just one line. Fixes: 184d8e13f9b1 ("pinctrl: mediatek: Add support for pin configuration dump via debugfs.") Fixes: fb34a9ae383a ("pinctrl: mediatek: support rsel feature") Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220308100956.2750295-6-wenst@chromium.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: mediatek: paris: Fix pingroup pin config state readbackChen-Yu Tsai2022-03-151-5/+3
| | | | | | | | | | | | | | | | | | | | mtk_pconf_group_get(), used to read back pingroup pin config state, simply returns a set of configs saved from a previous invocation of mtk_pconf_group_set(). This is an unfiltered, unvalidated set passed in from the pinconf core, which does not match the current hardware state. Since the driver library is designed to have one pin per group, pass through mtk_pconf_group_get() to mtk_pinconf_get(), to read back the current pin config state of the only pin in the group. Also drop the assignment of pin config state to the group. Fixes: 805250982bb5 ("pinctrl: mediatek: add pinctrl-paris that implements the vendor dt-bindings") Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220308100956.2750295-5-wenst@chromium.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: mediatek: paris: Fix "argument" argument type for mtk_pinconf_get()Chen-Yu Tsai2022-03-151-2/+1
| | | | | | | | | | | | | | | | For mtk_pinconf_get(), the "argument" argument is typically returned by pinconf_to_config_argument(), which holds the value for a given pinconf parameter. It certainly should not have the type of "enum pin_config_param", which describes the type of the pinconf parameter itself. Change the type to u32, which matches the return type of pinconf_to_config_argument(). Fixes: 805250982bb5 ("pinctrl: mediatek: add pinctrl-paris that implements the vendor dt-bindings") Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220308100956.2750295-4-wenst@chromium.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: mediatek: paris: Fix PIN_CONFIG_BIAS_* readbackChen-Yu Tsai2022-03-151-10/+6
| | | | | | | | | | | | | | | When reading back pin bias settings, if the pin is not in the corresponding bias state, the function should return -EINVAL. Fix this in the mediatek-paris pinctrl library so that the read back state is not littered with bogus a "input bias disabled" combined with "pull up" or "pull down" states. Fixes: 805250982bb5 ("pinctrl: mediatek: add pinctrl-paris that implements the vendor dt-bindings") Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220308100956.2750295-3-wenst@chromium.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: pinconf-generic: Print arguments for bias-pull-*Chen-Yu Tsai2022-03-151-3/+3
| | | | | | | | | | | | | | | The bias-pull-* properties, or PIN_CONFIG_BIAS_PULL_* pin config parameters, accept optional arguments in ohms denoting the strength of the pin bias. Print these values out in debugfs as well. Fixes: eec450713e5c ("pinctrl: pinconf-generic: Add flag to print arguments") Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220308100956.2750295-2-wenst@chromium.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: mediatek: Fix missing of_node_put() in mtk_pctrl_initMiaoqian Lin2022-03-151-0/+2
| | | | | | | | | | | The device_node pointer is returned by of_parse_phandle() with refcount incremented. We should use of_node_put() on it when done. Fixes: a6df410d420a ("pinctrl: mediatek: Add Pinctrl/GPIO driver for mt8135.") Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220308071155.21114-1-linmq006@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: nuvoton: Add driver for WPCM450Jonathan Neuschäfer2022-03-155-1/+1171
| | | | | | | | | | | | | | | | | | | This driver is based on the one for NPCM7xx, because the WPCM450 is a predecessor of those SoCs. Notable differences: - On WPCM450, the GPIO registers are not organized in multiple banks, but rather placed continually into the same register block. This affects how register offsets are computed. - Pinmux nodes can explicitly select GPIO mode, whereas in the npcm7xx driver, this happens automatically when a GPIO is requested. Some functionality implemented in the hardware was (for now) left unused in the driver, specifically blinking and pull-up/down. Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reported-by: kernel test robot <lkp@intel.com> Link: https://lore.kernel.org/r/20220129115228.2257310-6-j.neuschaefer@gmx.net Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* dt-bindings: pinctrl: Add Nuvoton WPCM450Jonathan Neuschäfer2022-03-151-0/+160
| | | | | | | | | | | | | | | | | | This binding is heavily based on the one for NPCM7xx, because the hardware is similar. There are some notable differences, however: - The addresses of GPIO banks are not physical addresses but simple indices (0 to 7), because the GPIO registers are not laid out in convenient blocks. - Pinmux settings can explicitly specify that the GPIO mode is used. Certain pins support blink patterns in hardware. This is currently not modelled in the DT binding. Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220129115228.2257310-5-j.neuschaefer@gmx.net Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: ocelot: fix duplicate debugfs entryMichael Walle2022-03-151-0/+1
| | | | | | | | | | | | | | | | This driver can have up to two regmaps. If the second one is registered its debugfs entry will have the same name as the first one and the following error will be printed: [ 2.242568] debugfs: Directory 'e2004064.pinctrl' with parent 'regmap' already present! Give the second regmap a name to avoid this. Fixes: 076d9e71bcf8 ("pinctrl: ocelot: convert pinctrl to regmap") Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Colin Foster <colin.foster@in-advantage.com> Link: https://lore.kernel.org/r/20220216122727.1005041-1-michael@walle.cc Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: ocelot: fix confops resource indexMichael Walle2022-03-151-1/+1
| | | | | | | | | | | | | | Prior to commit ad96111e658a ("pinctrl: ocelot: combine get resource and ioremap into single call") the resource index was 1, now it is 0. But 0 is the base region for the pinctrl block. Fix it. I noticed this because there was an error that the memory region was ioremapped twice. Fixes: ad96111e658a ("pinctrl: ocelot: combine get resource and ioremap into single call") Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Colin Foster <colin.foster@in-advantage.com> Link: https://lore.kernel.org/r/20220216082020.981797-1-michael@walle.cc Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: imx93: Add pinctrl driver supportJacky Bai2022-03-153-0/+280
| | | | | | | | | Add i.MX93 pinctrl driver Signed-off-by: Jacky Bai <ping.bai@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220228010103.2725893-2-peng.fan@oss.nxp.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* dt-bindings: pinctrl: imx93: Add pinctrl bindingPeng Fan2022-03-151-0/+85
| | | | | | | | | Add pinctrl binding doc for i.MX93 Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220228010103.2725893-1-peng.fan@oss.nxp.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: canonical rsel resistance selection propertyGuodong Liu2022-03-151-1/+1
| | | | | | | | | Change "mediatek,rsel_resistance_in_si_unit" to "mediatek,rsel-resistance-in-si-unit" Fixes: fb34a9ae383a ("pinctrl: mediatek: support rsel feature") Signed-off-by: Guodong Liu <guodong.liu@mediatek.com> Link: https://lore.kernel.org/r/20220216032124.28067-4-guodong.liu@mediatek.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: add pinctrl driver on mt8186Guodong Liu2022-03-154-0/+3465
| | | | | | | | This commit includes pinctrl driver for mt8186. Signed-off-by: Guodong Liu <guodong.liu@mediatek.com> Link: https://lore.kernel.org/r/20220216032124.28067-3-guodong.liu@mediatek.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>