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* Merge branch 'remotes/lorenzo/pci/mediatek'Bjorn Helgaas2021-09-023-108/+189
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| * PCI: mediatek: Use PCI domain to handle ports detectionChuanjia Liu2021-08-261-12/+17
| * PCI: mediatek: Add new method to get irq numberChuanjia Liu2021-08-261-1/+5
| * PCI: mediatek: Add new method to get shared pcie-cfg base addressChuanjia Liu2021-08-261-0/+17
| * dt-bindings: PCI: mediatek: Update the Device tree bindingsChuanjia Liu2021-08-262-95/+150
* | Merge branch 'remotes/lorenzo/pci/keembay'Bjorn Helgaas2021-09-026-0/+662
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| * | PCI: keembay: Add support for Intel Keem BaySrikanth Thokala2021-08-204-0/+496
| * | dt-bindings: PCI: Add Intel Keem Bay PCIe controllerSrikanth Thokala2021-08-202-0/+166
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* | Merge branch 'remotes/lorenzo/pci/iproc'Bjorn Helgaas2021-09-022-11/+7
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| * | PCI: iproc: Fix BCMA probe resource handlingRob Herring2021-08-041-10/+6
| * | PCI: of: Don't fail devm_pci_alloc_host_bridge() on missing 'ranges'Rob Herring2021-08-041-1/+1
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* | Merge branch 'remotes/lorenzo/pci/hyper-v'Bjorn Helgaas2021-09-024-45/+93
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| * | PCI: hv: Turn on the host bridge probing on ARM64Boqun Feng2021-08-231-0/+7
| * | PCI: hv: Set up MSI domain at bridge probing timeBoqun Feng2021-08-231-5/+8
| * | PCI: hv: Set ->domain_nr of pci_host_bridge at probing timeBoqun Feng2021-08-231-4/+5
| * | PCI: hv: Generify PCI probingArnd Bergmann2021-08-231-27/+30
| * | arm64: PCI: Support root bridge preparation for Hyper-VBoqun Feng2021-08-231-1/+11
| * | arm64: PCI: Restructure pcibios_root_bridge_prepare()Boqun Feng2021-08-231-7/+12
| * | PCI: Support populating MSI domains of root buses via bridgesBoqun Feng2021-08-231-1/+5
| * | PCI: Introduce domain_nr in pci_host_bridgeBoqun Feng2021-08-232-1/+16
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* | Merge branch 'remotes/lorenzo/pci/hv'Bjorn Helgaas2021-09-021-5/+62
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| * | PCI: hv: Support for create interrupt v3Sunil Muthuswamy2021-08-131-5/+62
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* | Merge branch 'remotes/lorenzo/pci/cadence'Bjorn Helgaas2021-09-026-6/+103
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| * | misc: pci_endpoint_test: Add deviceID for AM64 and J7200Kishon Vijay Abraham I2021-08-191-0/+8
| * | PCI: j721e: Add PCIe support for AM64Kishon Vijay Abraham I2021-08-191-0/+19
| * | PCI: j721e: Add PCIe support for J7200Kishon Vijay Abraham I2021-08-191-4/+36
| * | PCI: cadence: Add quirk flag to set minimum delay in LTSSM Detect.Quiet stateNadeem Athani2021-08-194-0/+38
| * | PCI: cadence: Use bitfield for *quirk_retrain_flag* instead of boolKishon Vijay Abraham I2021-08-192-2/+2
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* | Merge branch 'remotes/lorenzo/pci/aardvark'Bjorn Helgaas2021-09-022-12/+319
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| * | PCI: aardvark: Fix masking and unmasking legacy INTx interruptsPali Rohár2021-08-261-0/+9
| * | PCI: aardvark: Configure PCIe resources from 'ranges' DT propertyPali Rohár2021-08-201-1/+194
| * | PCI: aardvark: Fix reporting CRS valuePali Rohár2021-08-051-4/+63
| * | PCI: pci-bridge-emul: Add PCIe Root Capabilities RegisterPali Rohár2021-08-051-1/+1
| * | PCI: aardvark: Increase polling delay to 1.5s while waiting for PIO responsePali Rohár2021-08-051-1/+1
| * | PCI: aardvark: Fix checking for PIO statusEvan Wang2021-08-051-8/+54
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* | Merge branch 'pci/visconti'Bjorn Helgaas2021-09-024-0/+344
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| * | MAINTAINERS: Add entries for Toshiba Visconti PCIe controllerNobuhiro Iwamatsu2021-08-311-0/+2
| * | PCI: visconti: Add Toshiba Visconti PCIe host controller driverNobuhiro Iwamatsu2021-08-313-0/+342
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* | Merge branch 'pci/rockchip-dwc'Bjorn Helgaas2021-09-023-0/+291
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| * | PCI: rockchip-dwc: Add Rockchip RK356X host controller driverSimon Xue2021-08-313-0/+291
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* | Merge branch 'pci/dwc'Bjorn Helgaas2021-09-021-1/+0
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| * | PCI: dwc: Remove surplus break statement after returnKrzysztof Wilczyński2021-08-311-1/+0
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* | Merge branch 'pci/artpec6'Bjorn Helgaas2021-09-021-5/+2
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| * | PCI: artpec6: Remove local code block from switch statementKrzysztof Wilczyński2021-08-311-4/+2
| * | PCI: artpec6: Remove surplus break statement after returnKrzysztof Wilczyński2021-08-311-1/+0
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* | Merge branch 'pci/misc'Bjorn Helgaas2021-09-028-29/+30
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| * | x86/PCI: sta2x11: switch from 'pci_' to 'dma_' APIChristophe JAILLET2021-09-021-2/+1
| * | PCI: Sync __pci_register_driver() stub for CONFIG_PCI=nAndy Shevchenko2021-08-211-2/+3
| * | PCI: Make saved capability state private to coreBjorn Helgaas2021-08-202-20/+21
| * | PCI: Add schedule point in proc_bus_pci_read()Krzysztof Wilczyński2021-08-201-0/+1