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* Merge tag 'mips_5.14' of ↵Linus Torvalds2021-07-0239-115/+254
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux Pull MIPS updates from Thomas Bogendoerfer: - add support for OpeneEmbed SOM9331 board - Ingenic fixes/improvments - other fixes and cleanups * tag 'mips_5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (39 commits) MIPS: Fix PKMAP with 32-bit MIPS huge page support MIPS: CI20: Add second percpu timer for SMP. MIPS: CI20: Reduce clocksource to 750 kHz. MIPS: Ingenic: Add MAC syscon nodes for Ingenic SoCs. dt-bindings: clock: Add documentation for MAC PHY control bindings. MIPS: X1830: Respect cell count of common properties. MIPS: set mips32r5 for virt extensions MIPS: loongsoon64: Reserve memory below starting pfn to prevent Oops MIPS: MT extensions are not available on MIPS32r1 mips/kvm: Use BUG_ON instead of if condition followed by BUG MIPS: OCTEON: octeon-usb: Use devm_platform_get_and_ioremap_resource() MIPS: add PMD table accounting into MIPS'pmd_alloc_one MIPS: Loongson64: fix spelling of SPDX tag MIPS: ingenic: rs90: Add dedicated VRAM memory region MIPS: ingenic: gcw0: Set codec to cap-less mode for FM radio MIPS: ingenic: jz4780: Fix I2C nodes to match DT doc MIPS: ingenic: Select CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER MIPS: Kconfig: ingenic: Ensure MACH_INGENIC_GENERIC selects all SoCs MIPS: cpu-probe: Fix FPU detection on Ingenic JZ4760(B) MIPS: boot: Support specifying UART port on Ingenic SoCs ...
| * MIPS: Fix PKMAP with 32-bit MIPS huge page supportWei Li2021-06-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | When 32-bit MIPS huge page support is enabled, we halve the number of pointers a PTE page holds, making its last half go to waste. Correspondingly, we should halve the number of kmap entries, as we just initialized only a single pte table for that in pagetable_init(). Fixes: 35476311e529 ("MIPS: Add partial 32-bit huge page support") Signed-off-by: Wei Li <liwei391@huawei.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| * MIPS: CI20: Add second percpu timer for SMP.周琰杰 (Zhou Yanjie)2021-06-301-10/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | 1.Add a new TCU channel as the percpu timer of core1, this is to prepare for the subsequent SMP support. The newly added channel will not adversely affect the current single-core state. 2.Adjust the position of TCU node to make it consistent with the order in jz4780.dtsi file. Tested-by: Nikolaus Schaller <hns@goldelico.com> # on CI20 Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Acked-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| * MIPS: CI20: Reduce clocksource to 750 kHz.周琰杰 (Zhou Yanjie)2021-06-301-2/+2
| | | | | | | | | | | | | | | | | | | | | | The original clock (3 MHz) is too fast for the clocksource, there will be a chance that the system may get stuck. Reported-by: Nikolaus Schaller <hns@goldelico.com> Tested-by: Nikolaus Schaller <hns@goldelico.com> # on CI20 Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Acked-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| * MIPS: Ingenic: Add MAC syscon nodes for Ingenic SoCs.周琰杰 (Zhou Yanjie)2021-06-302-0/+14
| | | | | | | | | | | | | | | | Add MAC syscon nodes for X1000 SoC and X1830 SoC from Ingenic. Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Acked-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| * dt-bindings: clock: Add documentation for MAC PHY control bindings.周琰杰 (Zhou Yanjie)2021-06-301-0/+2
| | | | | | | | | | | | | | | | | | | | Update the CGU binding documentation, add mac-phy-ctrl as a pattern property. Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Acked-by: Paul Cercueil <paul@crapouillou.net> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| * MIPS: X1830: Respect cell count of common properties.周琰杰 (Zhou Yanjie)2021-06-301-5/+4
| | | | | | | | | | | | | | | | | | | | If N fields of X cells should be provided, then that's what the devicetree should represent, instead of having one single field of (N * X) cells. Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Acked-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| * MIPS: set mips32r5 for virt extensionsNick Desaulniers2021-06-291-4/+4
| | | | | | | | | | | | | | | | | | | | | | Clang's integrated assembler only accepts these instructions when the cpu is set to mips32r5. With this change, we can assemble malta_defconfig with Clang via `make LLVM_IAS=1`. Link: https://github.com/ClangBuiltLinux/linux/issues/763 Reported-by: Dmitry Golovin <dima@golovin.in> Signed-off-by: Nick Desaulniers <ndesaulniers@google.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| * MIPS: loongsoon64: Reserve memory below starting pfn to prevent Oopszhanglianjie2021-06-291-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The cause of the problem is as follows: 1. when cat /sys/devices/system/memory/memory0/valid_zones, test_pages_in_a_zone() will be called. 2. test_pages_in_a_zone() finds the zone according to stat_pfn = 0. The smallest pfn of the numa node in the mips architecture is 128, and the page corresponding to the previous 0~127 pfn is not initialized (page->flags is 0xFFFFFFFF) 3. The nid and zonenum obtained using page_zone(pfn_to_page(0)) are out of bounds in the corresponding array, &NODE_DATA(page_to_nid(page))->node_zones[page_zonenum(page)], access to the out-of-bounds zone member variables appear abnormal, resulting in Oops. Therefore, it is necessary to keep the page between 0 and the minimum pfn to prevent Oops from appearing. Signed-off-by: zhanglianjie <zhanglianjie@uniontech.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| * MIPS: MT extensions are not available on MIPS32r1Paul Cercueil2021-06-291-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | MIPS MT extensions were added with the MIPS 34K processor, which was based on the MIPS32r2 ISA. This fixes a build error when building a generic kernel for a MIPS32r1 CPU. Fixes: c434b9f80b09 ("MIPS: Kconfig: add MIPS_GENERIC_KERNEL symbol") Cc: stable@vger.kernel.org # v5.9 Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| * mips/kvm: Use BUG_ON instead of if condition followed by BUGzhouchuangao2021-06-211-2/+1
| | | | | | | | | | | | | | | | | | | | BUG_ON uses unlikely in if(), it can be optimized at compile time. Usually, the condition in if() is not satisfied. In my opinion, this can improve the efficiency of the multi-stage pipeline. Signed-off-by: zhouchuangao <zhouchuangao@vivo.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| * MIPS: OCTEON: octeon-usb: Use devm_platform_get_and_ioremap_resource()Yang Yingliang2021-06-211-8/+1
| | | | | | | | | | | | | | | | | | | | | | | | Remove unneeded error handling on the result of a call to platform_get_resource() when the value is passed to devm_ioremap_resource(). And use devm_platform_get_and_ioremap_resource() to simplify code. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| * MIPS: add PMD table accounting into MIPS'pmd_alloc_oneHuang Pei2021-06-211-3/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | This fixes Page Table accounting bug. MIPS is the ONLY arch just defining __HAVE_ARCH_PMD_ALLOC_ONE alone. Since commit b2b29d6d011944 (mm: account PMD tables like PTE tables), "pmd_free" in asm-generic with PMD table accounting and "pmd_alloc_one" in MIPS without PMD table accounting causes PageTable accounting number negative, which read by global_zone_page_state(), always returns 0. Signed-off-by: Huang Pei <huangpei@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| * MIPS: Loongson64: fix spelling of SPDX tagTom Rix2021-06-211-1/+1
| | | | | | | | | | | | | | | | checkpatch looks for SPDX-License-Identifier. So change the '_' to '-' Signed-off-by: Tom Rix <trix@redhat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| * MIPS: ingenic: rs90: Add dedicated VRAM memory regionPaul Cercueil2021-06-011-0/+14
| | | | | | | | | | | | | | | | | | Add a 1 MiB memory area dedicated to the video driver. This area will be managed by Linux' CMA, so that the ingenic-drm driver can be sure to always be able to allocate contiguous buffers. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| * MIPS: ingenic: gcw0: Set codec to cap-less mode for FM radioPaul Cercueil2021-06-011-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | When using the FM radio, we must not have capacitors on the headphones line, since it is used as the antenna. The "FM Radio" widget is removed so that the cap-less mode can be enabled dynamically through DAPM when the line input is used. This widget was useless anyway. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| * MIPS: ingenic: jz4780: Fix I2C nodes to match DT docPaul Cercueil2021-06-011-5/+5
| | | | | | | | | | | | | | | | | | The "ingenic,jz4780-i2c" should have "ingenic,jz4770-i2c" as a fallback compatible, as per the Device Tree documentation found in Documentation/devicetree/bindings/i2c/ingenic,i2c.yaml. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| * MIPS: ingenic: Select CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMERPaul Cercueil2021-06-011-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | The clock driving the XBurst CPUs in Ingenic SoCs is integer divided from the main PLL. As such, it is possible to control the frequency of the CPU, either by changing the divider, or by changing the rate of the main PLL. The XBurst CPUs also lack the CP0 timer; the TCU, a separate piece of hardware in the SoC, provides this functionality. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| * MIPS: Kconfig: ingenic: Ensure MACH_INGENIC_GENERIC selects all SoCsPaul Cercueil2021-06-011-0/+2
| | | | | | | | | | | | | | | | The MACH_INGENIC_GENERIC config option must select all SoCs, in order for all the SoC-specific drivers to become available. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| * MIPS: cpu-probe: Fix FPU detection on Ingenic JZ4760(B)Paul Cercueil2021-06-011-0/+5
| | | | | | | | | | | | | | | | | | Ingenic JZ4760 and JZ4760B do have a FPU, but the config registers don't report it. Force the FPU detection in case the processor ID match the JZ4760(B) one. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| * MIPS: boot: Support specifying UART port on Ingenic SoCsPaul Cercueil2021-06-012-2/+10
| | | | | | | | | | | | | | | | Allow specifying from the config the UART to use on Ingenic SoCs when compressed kernel debugging is enabled. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| * MIPS: mm: XBurst CPU requires sync after DMAPaul Cercueil2021-06-012-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | I am not sure why this is required, but if this is not enabled, reading from a buffer in which data has been DMA'd may read incorrect values. This used to happen for instance in mmc_app_send_scr() (drivers/mmc/core/sd_ops.c), where data is DMA'd to a buffer then copied by the CPU to a different location. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| * mips: syscalls: use pattern rules to generate syscall headersMasahiro Yamada2021-06-011-24/+4
| | | | | | | | | | | | | | Use pattern rules to unify similar build rules among n32, n64, and o32. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| * mips: syscalls: define syscall offsets directly in <asm/unistd.h>Masahiro Yamada2021-06-013-7/+5
| | | | | | | | | | | | | | | | | | | | | | | | There is no good reason to generate the syscall offset macros by scripting since they are not derived from the syscall tables. Define __NR_*_Linux macros directly in arch/mips/include/asm/unistd.h, and clean up the Makefile and the shell script. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| * MIPS: Loongson64: Make some functions static in smp.cTiezhu Yang2021-06-011-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make some functions static to fix the following sparse warnings: arch/mips/loongson64/smp.c:54:5: sparse: sparse: symbol 'ipi_read_clear' was not declared. Should it be static? arch/mips/loongson64/smp.c:55:6: sparse: sparse: symbol 'ipi_write_action' was not declared. Should it be static? arch/mips/loongson64/smp.c:56:6: sparse: sparse: symbol 'ipi_write_enable' was not declared. Should it be static? arch/mips/loongson64/smp.c:57:6: sparse: sparse: symbol 'ipi_clear_buf' was not declared. Should it be static? arch/mips/loongson64/smp.c:58:6: sparse: sparse: symbol 'ipi_write_buf' was not declared. Should it be static? Fixes: fed4955f304e ("MIPS: Loongson64: Add Mail_Send support for 3A4000+ CPU") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| * mips: dts: loongson: fix DTC unit name warningszhaoxiao2021-05-271-1/+1
| | | | | | | | | | | | | | | | | | Fixes the following W=1 kernel build warning(s): arch/mips/boot/dts/loongson/rs780e-pch.dtsi:24.7-41.5: Warning (unit_address_vs_reg): /bus@10000000/isa: node has a reg or ranges property, but no unit name arch/mips/boot/dts/loongson/rs780e-pch.dtsi:24.7-41.5: Warning (simple_bus_reg): /bus@10000000/isa: simple-bus unit address format error, expected "18000000" Signed-off-by: zhaoxiao <zhaoxiao@uniontech.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| * mips: dts: loongson: fix DTC unit name warningszhaoxiao2021-05-271-1/+1
| | | | | | | | | | | | | | | | | | Fixes the following W=1 kernel build warning(s): arch/mips/boot/dts/loongson/ls7a-pch.dtsi:410.7-415.5: Warning (unit_address_vs_reg): /bus@10000000/isa: node has a reg or ranges property, but no unit name arch/mips/boot/dts/loongson/ls7a-pch.dtsi:410.7-415.5: Warning (simple_bus_reg): /bus@10000000/isa: simple-bus unit address format error, expected "18000000" Signed-off-by: zhaoxiao <zhaoxiao@uniontech.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| * mips: dts: loongson: fix DTC unit name warningszhaoxiao2021-05-271-1/+1
| | | | | | | | | | | | | | | | | | Fixes the following W=1 kernel build warning(s): arch/mips/boot/dts/loongson/loongson64v_4core_virtio.dts:91.7-96.5: Warning (unit_address_vs_reg): /bus@10000000/isa: node has a reg or ranges property, but no unit name arch/mips/boot/dts/loongson/loongson64v_4core_virtio.dts:91.7-96.5: Warning (simple_bus_reg): /bus@10000000/isa: simple-bus unit address format error, expected "18000000" Signed-off-by: zhaoxiao <zhaoxiao@uniontech.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| * mips: dts: loongson: fix DTC unit name warningszhaoxiao2021-05-271-2/+2
| | | | | | | | | | | | | | | | | | | | Fixes the following W=1 kernel build warning(s): arch/mips/boot/dts/loongson/loongson64g-package.dtsi:42.30-49.5: Warning (simple_bus_reg): /bus@1fe00000/serial@1fe001e0: simple-bus unit address format error, expected "1fe00100" arch/mips/boot/dts/loongson/loongson64g-package.dtsi:51.30-59.5: Warning (simple_bus_reg): /bus@1fe00000/serial@1fe001e8: simple-bus unit address format error, expected "1fe00110" Signed-off-by: zhaoxiao <zhaoxiao@uniontech.com> Acked-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| * mips: dts: loongson: fix DTC unit name warningszhaoxiao2021-05-271-1/+1
| | | | | | | | | | | | | | | | Fixes the following W=1 kernel build warning(s): arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi:26.9-32.4: Warning (unit_address_vs_reg): /memory: node has a reg or ranges property, but no unit name Signed-off-by: zhaoxiao <zhaoxiao@uniontech.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| * MIPS: Loongson64: Update loongson3_defconfigTiezhu Yang2021-05-271-11/+1
| | | | | | | | | | | | | | | | | | | | | | | | Some configs in loongson3_defconfig is invalid or needless, use the following steps to update it: make loongson3_defconfig make savedefconfig cp defconfig arch/mips/configs/loongson3_defconfig Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| * MIPS: Loongson64: Remove a "set but not used" variableHuacai Chen2021-05-271-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fix build warning: arch/mips/loongson64/env.c: In function 'prom_init_env': >> arch/mips/loongson64/env.c:50:14: warning: variable 'device' set but not used [-Wunused-but-set-variable] 50 | u16 vendor, device; | ^~~~~~ {standard input}: Assembler messages: {standard input}:788: Error: found '(', expected: ')' {standard input}:788: Error: found '(', expected: ')' {standard input}:788: Error: non-constant expression in ".if" statement {standard input}:788: Error: junk at end of line, first unrecognized character is `(' {standard input}:801: Error: found '(', expected: ')' {standard input}:801: Error: found '(', expected: ')' {standard input}:801: Error: non-constant expression in ".if" statement {standard input}:801: Error: junk at end of line, first unrecognized character is `(' Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| * MIPS: ath79: ar9331: add pause property for the MAC <> switch linkOleksij Rempel2021-05-271-0/+2
| | | | | | | | | | | | | | | | Both, MAC and switch support flow control, so add pause property for the MAC <> switch link. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| * MIPS: ath79: ar9331: Add OpeneEmbed SOM9331 BoardOleksij Rempel2021-05-272-0/+111
| | | | | | | | | | | | | | | | Add SOM9331 based Board. It has 3 LAN ports, usb to uart controller and USB type A port. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| * dt-bindings: vendor-prefixes: Add an entry for OpenEmbedOleksij Rempel2021-05-271-0/+2
| | | | | | | | | | | | | | | | Add "openembed" entry for https://www.openembed.com/ Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| * MIPS: SEAD3: Correct Ethernet node nameGeert Uytterhoeven2021-05-271-1/+1
| | | | | | | | | | | | | | | | | | | | make dtbs_check: eth@1f010000: $nodename:0: 'eth@1f010000' does not match '^ethernet(@.*)?$' Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| * hugetlb: clear huge pte during flush function on mips platformBibo Mao2021-05-111-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If multiple threads are accessing the same huge page at the same time, hugetlb_cow will be called if one thread write the COW huge page. And function huge_ptep_clear_flush is called to notify other threads to clear the huge pte tlb entry. The other threads clear the huge pte tlb entry and reload it from page table, the reload huge pte entry may be old. This patch fixes this issue on mips platform, and it clears huge pte entry before notifying other threads to flush current huge page entry, it is similar with other architectures. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| * MIPS:DTS:Correct device id of pcie for Loongnon-2KXiaochuan Mao2021-05-111-8/+8
| | | | | | | | | | | | | | | | | | | | | | from Loongson-2K user manual know that Loongson-2K have two pcie controller pcie0 and pcie1, pcie0 have four port named port0~port3 and pcie1 have 2 port named port0~port1. the device id of port0 is 7a19 in each pcie controller and others are 7a09. Signed-off-by: Xiaochuan Mao <maoxiaochuan@loongson.cn> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| * MIPS: Loongson64: Fix build error 'secondary_kexec_args' undeclared under !SMPYouling Tang2021-05-111-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | On the Loongson64 platform, if CONFIG_SMP is not set, the following build error will occur: arch/mips/loongson64/reset.c:133:2: error:'secondary_kexec_args' undeclared Because the definition and declaration of secondary_kexec_args are in the CONFIG_SMP, the secondary_kexec_args variable should be used in CONFIG_SMP. Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Youling Tang <tangyouling@loongson.cn> Acked-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| * MIPS: Octeon: drop dependency on CONFIG_HOLES_IN_ZONEMike Rapoport2021-05-111-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CAVIUM_OCTEON_SOC configuration selects HOLES_IN_ZONE option to cope with memory crashes that were happening in 2011. This option effectively aliases pfn_valid_within() to pfn_valid() when enabled and hardwires it to 1 when disabled. The check for pfn_valid_within() is only relevant in case the memory map may have holes or undefined struct page instances inside MAX_ORDER chunks. Since 2011 memory management initialization in general and memory map initialization particularly became much more robust so the check for pfn_valid_within() is not required on Octeon even despite its, hmm, unusual memory setup. Remove the selection of HOLES_IN_ZONE by CAVIUM_OCTEON_SOC and drop the HOLES_IN_ZONE configuration option entirely as Octeon was the only MIPS platform to use it. Signed-off-by: Mike Rapoport <rppt@linux.ibm.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* | Merge tag 'pinctrl-v5.14-1' of ↵Linus Torvalds2021-07-0286-1020/+7498
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "This is the bulk of pin control changes for the v5.14 kernel. Not so much going on. No core changes, just drivers. The most interesting would be that MIPS Ralink is migrating to pin control and we have some bindings but not yet code for the Apple M1 pin controller. New drivers: - Last merge window we created a driver for the Ralink RT2880. We are now moving the Ralink SoC pin control drivers out of the MIPS architecture code and into the pin control subsystem. This concerns RT288X, MT7620, RT305X, RT3883 and MT7621. - Qualcomm SM6125 SoC pin control driver. - Qualcomm spmi-gpio support for PM7325. - Qualcomm spmi-mpp also handles PMI8994 (just a compatible string) - Mediatek MT8365 SoC pin controller. - New device HID for the AMD GPIO controller. Improvements: - Pin bias config support for a slew of Renesas pin controllers. - Incremental improvements and non-urgent bug fixes to the Renesas SoC drivers. - Implement irq_set_wake on the AMD pin controller so we can wake up from external pin events. Misc: - Devicetree bindings for the Apple M1 pin controller, we will probably see a proper driver for this soon as well" * tag 'pinctrl-v5.14-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (54 commits) pinctrl: ralink: rt305x: add missing include pinctrl: stm32: check for IRQ MUX validity during alloc() pinctrl: zynqmp: some code cleanups drivers: qcom: pinctrl: Add pinctrl driver for sm6125 dt-bindings: pinctrl: qcom: sm6125: Document SM6125 pinctrl driver dt-bindings: pinctrl: mcp23s08: add documentation for reset-gpios pinctrl: mcp23s08: Add optional reset GPIO pinctrl: mediatek: fix mode encoding pinctrl: mcp23s08: Fix missing unlock on error in mcp23s08_irq() pinctrl: bcm: Constify static pinmux_ops pinctrl: bcm: Constify static pinctrl_ops pinctrl: ralink: move RT288X SoC pinmux config into a new 'pinctrl-rt288x.c' file pinctrl: ralink: move MT7620 SoC pinmux config into a new 'pinctrl-mt7620.c' file pinctrl: ralink: move RT305X SoC pinmux config into a new 'pinctrl-rt305x.c' file pinctrl: ralink: move RT3883 SoC pinmux config into a new 'pinctrl-rt3883.c' file pinctrl: ralink: move MT7621 SoC pinmux config into a new 'pinctrl-mt7621.c' file pinctrl: ralink: move ralink architecture pinmux header into the driver pinctrl: single: config: enable the pin's input pinctrl: mtk: Fix mt8365 Kconfig dependency pinctrl: mcp23s08: fix race condition in irq handler ...
| * | pinctrl: ralink: rt305x: add missing includeSergio Paracuellos2021-06-301-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Header 'rt305x.h' is ralink architecture dependent file where other general definitions which are in 'ralink_regs.h' are being used. This 'rt305x.h' is only being included in two different files: 'rt305x.c' and 'pinctrl-rt305x.c'. When file 'pinctrl-rt305x.c' is being compiled definitions in 'ralink_regs.h' are need to build it properly. Hence, add missing include 'ralink_regs.h' in 'pinctrl-rt305x.c' source to avoid compilation problems. Fixes: 3a1b0ca5a83b ("pinctrl: ralink: move RT305X SoC pinmux config into a new 'pinctrl-rt305x.c' file") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Link: https://lore.kernel.org/r/20210629143407.14703-1-sergio.paracuellos@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: stm32: check for IRQ MUX validity during alloc()Fabien Dessenne2021-06-261-39/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Considering the following irq_domain_ops call chain: - .alloc() is called when a clients calls platform_get_irq() or gpiod_to_irq() - .activate() is called next, when the clients calls request_threaded_irq() Check for the IRQ MUX conflict during the first stage (alloc instead of activate). This avoids to provide the client with an IRQ that can't be used. Signed-off-by: Fabien Dessenne <fabien.dessenne@foss.st.com> Link: https://lore.kernel.org/r/20210617144602.2557619-1-fabien.dessenne@foss.st.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: zynqmp: some code cleanupsSai Krishna Potthuri2021-06-262-30/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some minor code cleanups and updates which includes - Mention module name under help in Kconfig. - Remove extra lines and duplicate Pin range checks. - Replace 'return ret' with 'return 0' in success path. - Copyright year update. - use devm_pinctrl_register() instead pinctrl_register() in probe. Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com> Link: https://lore.kernel.org/r/1624273214-66849-1-git-send-email-lakshmi.sai.krishna.potthuri@xilinx.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | drivers: qcom: pinctrl: Add pinctrl driver for sm6125Martin Botka2021-06-183-0/+1287
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds pinctrl driver for sm6125. Signed-off-by: Martin Botka <martin.botka@somainline.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210614172713.558192-2-martin.botka@somainline.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | dt-bindings: pinctrl: qcom: sm6125: Document SM6125 pinctrl driverMartin Botka2021-06-181-0/+132
| | | | | | | | | | | | | | | | | | | | | | | | | | | Document the newly added SM6125 pinctrl driver Signed-off-by: Martin Botka <martin.botka@somainline.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210614172713.558192-1-martin.botka@somainline.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | Merge tag 'renesas-pinctrl-for-v5.14-tag2' of ↵Linus Walleij2021-06-126-80/+1844
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: renesas: Updates for v5.14 (take two) - Add bias support for the R-Car H2, V2H, E2, V3M, and V3H, and RZ/G1C, RZ/G1H, and RZ/G1E SoCs.
| | * | pinctrl: renesas: r8a77980: Add bias pinconf supportGeert Uytterhoeven2021-05-311-6/+203
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement support for pull-up and pull-down handling for the R-Car V3H SoC, using the common R-Car bias handling. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/448f47ccd89d9bc8621c7fda8c81508deb05cb82.1619785375.git.geert+renesas@glider.be
| | * | pinctrl: renesas: r8a77970: Add bias pinconf supportGeert Uytterhoeven2021-05-311-6/+169
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement support for pull-up (most pins, excl. DU_DOTCLKIN and EXTALR) and pull-down (most pins, excl. JTAG) handling for the R-Car V3M SoC, using the common R-Car bias handling. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/bcfad447624d874258a45a92554574b8fe9f712f.1619785375.git.geert+renesas@glider.be
| | * | pinctrl: renesas: r8a7794: Add bias pinconf supportGeert Uytterhoeven2021-05-311-9/+351
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement support for pull-up (most pins) and pull-down (ASEBRK#/ACK) handling for R-Car E2 and RZ/G1E SoCs, using the common R-Car bias handling. Note that on RZ/G1E, the "ASEBRK#/ACK" pin is called "ACK", but the code doesn't handle that naming difference. Hence users should use the R-Car naming in DTS files. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/f78da2ba937ce98ae9196f4ee54149a5214fd545.1619785375.git.geert+renesas@glider.be
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