| Commit message (Collapse) | Author | Age | Files | Lines |
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Convert the drivers in drivers/i2c/busses/* to usemodule_pci_driver()
macro which makes the code smaller and a bit simpler.
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Acked-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Cc: Rudolf Marek <r.marek@assembler.cz>
Cc: Olof Johansson <olof@lixom.net>
Cc: "Mark M. Hoffman" <mhoffman@lightlink.com>
Cc: Tomoya MORINAGA <tomoya.rohm@gmail.com>
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My old e-mail address won't be valid for much longer. Time to update it.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
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Pull arch/tile updates from Chris Metcalf:
"These changes provide support for PCIe root complex and USB host mode
for tilegx's on-chip I/Os.
In addition, this pull provides the required underpinning for the
on-chip networking support that was pulled into 3.5. The changes have
all been through LKML (with several rounds for PCIe RC) and on
linux-next."
* git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile:
tile: updates to pci root complex from community feedback
bounce: allow use of bounce pool via config option
usb: add host support for the tilegx architecture
arch/tile: provide kernel support for the tilegx USB shim
tile pci: enable IOMMU to support DMA for legacy devices
arch/tile: enable ZONE_DMA for tilegx
tilegx pci: support I/O to arbitrarily-cached pages
tile: remove unused header
arch/tile: tilegx PCI root complex support
arch/tile: provide kernel support for the tilegx TRIO shim
arch/tile: break out the "csum a long" function to <asm/checksum.h>
arch/tile: provide kernel support for the tilegx mPIPE shim
arch/tile: common DMA code for the GXIO IORPC subsystem
arch/tile: support MMIO-based readb/writeb etc.
arch/tile: introduce GXIO IORPC framework for tilegx
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Reviewed-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
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The tilegx USB OHCI support needs the bounce pool since we're not
using the IOMMU to handle 32-bit addresses.
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
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This change adds OHCI and EHCI support for the tilegx's on-chip
USB hardware.
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
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This change adds support for accessing the USB shim from within the
kernel. Note that this change by itself does not allow the kernel
to act as a host or as a device; it merely exposes the built-in on-chip
hardware to the kernel.
The <arch/usb_host.h> and <arch/usb_host_def.h> headers are empty at
the moment because the kernel does not require any types or definitions
specific to the tilegx USB shim; the generic USB core code is all we need.
The headers are left in as stubs so that we don't need to modify the
hypervisor header (drv_usb_host_intf.h) from upstream.
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
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This change uses the TRIO IOMMU to map the PCI DMA space and physical
memory at different addresses. We also now use the dma_mapping_ops
to provide support for non-PCI DMA, PCIe DMA (64-bit) and legacy PCI
DMA (32-bit). We use the kernel's software I/O TLB framework
(i.e. bounce buffers) for the legacy 32-bit PCI device support since
there are a limited number of TLB entries in the IOMMU and it is
non-trivial to handle indexing, searching, matching, etc. For 32-bit
devices the performance impact of bounce buffers should not be a concern.
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
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This is required for PCI root complex legacy support and USB OHCI root
complex support. With this change tilegx now supports allocating memory
whose PA fits in 32 bits.
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
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The tilegx PCI root complex support (currently only in linux-next)
is limited to pages that are homed on cached in the default manner,
i.e. "hash-for-home". This change supports delivery of I/O data to
pages that are cached in other ways (locally on a particular core,
uncached, user-managed incoherent, etc.).
A large part of the change is supporting flushing pages from cache
on particular homes so that we can transition the data that we are
delivering to or from the device appropriately. The new homecache_finv*
routines handle this.
Some changes to page_table_range_init() were also required to make
the fixmap code work correctly on tilegx; it hadn't been used there
before.
We also remove some stub mark_caches_evicted_*() routines that
were just no-ops anyway.
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
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Nothing includes memprof.h. Nothing uses the macros it defines. It seems
it is just a remnant of the proposed memprof functionality, which got
dropped before the Tilera architecture got added to the tree. This
header can safely be removed.
Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
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This change implements PCIe root complex support for tilegx using
the kernel support layer for accessing the TRIO hardware shim.
Reviewed-by: Bjorn Helgaas <bhelgaas@google.com> [changes in 07487f3]
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
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Provide kernel support for the tilegx "Transaction I/O" (TRIO) on-chip
hardware. This hardware implements the PCIe interface for tilegx;
the driver changes to use TRIO for PCIe are in a subsequent commit.
The change is layered on top of the tilegx GXIO IORPC subsystem.
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
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This makes it available to the tilegx network driver.
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
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The TILE-Gx chip includes a packet-processing network engine called
mPIPE ("Multicore Programmable Intelligent Packet Engine"). This
change adds support for using the mPIPE engine from within the
kernel. The engine has more functionality than is exposed here,
but to keep the kernel code and binary simpler, this is a subset
of the full API designed to enable standard Linux networking only.
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
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The dma_queue support is used by both the mPipe (networking)
and Trio (PCI) hardware shims on tilegx. This common code is
selected when either of those drivers is built.
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
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Add support for MMIO read/write on tilegx to support GXIO IORPC access.
Similar to the asm-generic version, but we include memory fences on
the writes to be conservative.
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
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The GXIO I/O RPC subsystem handles exporting I/O hardware resources to
Linux and to applications running under Linux.
For instance, memory which is made available for I/O DMA must be mapped
by an I/O TLB; that means that such memory must be locked down by Linux,
so that it is not swapped or otherwise reused, as long as those I/O
TLB entries are active. Similarly, configuring direct hardware access
introduces new validation requirements. If a user application registers
memory, Linux must ensure that the supplied virtual addresses are valid,
and turn them into client physical addresses. Similarly, when Linux then
supplies those client physical addresses to the Tilera hypervisor, it
must in turn validate those before turning them into the real physical
addresses which are required by the hardware.
To the extent that these sorts of activities were required on previous
TILE architecture processors, they were implemented in a device-specific
fashion. This meant that every I/O device had its own Tilera hypervisor
driver, its own Linux driver, and in some cases its own user-level
library support. There was a large amount of more-or-less functionally
identical code in different places, particularly in the different Linux
drivers. For TILE-Gx, this support has been generalized into a common
framework, known as the I/O RPC framework or just IORPC.
The two "gxio" directories (one for headers, one for sources) start
with just a few files in each with this infrastructure commit, but
after adding support for the on-board I/O shims for networking, PCI,
USB, crypto, compression, I2CS, etc., there end up being about 20 files
in each directory.
More information on the IORPC framework is in the <hv/iorpc.h> header,
included in this commit.
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux
Pull misc Itanium fixes from Tony Luck.
* tag 'please-pull-misc-3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux:
debug: Do not permit CONFIG_DEBUG_STACK_USAGE=y on IA64 or PARISC
[IA64] Port OOM changes to ia64_do_page_fault
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The stack_not_used() function in <linux/sched.h> assumes that stacks
grow downwards. This is not true on IA64 or PARISC, so this function
would walk off in the wrong direction and into the weeds.
Found on IA64 because of a compilation failure with recursive dependencies
on IA64_TASKSIZE and IA64_THREAD_INFO_SIZE.
Fixing the code is possible, but should be combined with other
infrastructure additions to set up the "canary" at the end of the stack.
Reported-by: Fengguang Wu <fengguang.wu@intel.com> (failed allmodconfig build)
Signed-off-by: Tony Luck <tony.luck@intel.com>
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Commit d065bd810b6deb67d4897a14bfe21f8eb526ba99
(mm: retry page fault when blocking on disk transfer) and
commit 37b23e0525d393d48a7d59f870b3bc061a30ccdb
(x86,mm: make pagefault killable)
The above commits introduced changes into the x86 pagefault handler
for making the page fault handler retryable as well as killable.
These changes reduce the mmap_sem hold time, which is crucial
during OOM killer invocation.
Port these changes to ia64.
Signed-off-by: Kautuk Consul <consul.kautuk@gmail.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
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Pull SuperH updates from Paul Mundt:
- Migration off of old-style dynamic IRQ API.
- irqdomain and generic irq chip propagation.
- div4/6 clock consolidation, another step towards co-existing with the
common struct clk infrastructure.
- Extensive PFC rework
- Decoupling GPIO from pin state.
- Initial pinctrl support to facilitate incremental migration off of
legacy pinmux.
- gpiolib support made optional, and made pinctrl-backed.
* tag 'sh-for-linus' of git://github.com/pmundt/linux-sh: (38 commits)
sh: pfc: pin config get/set support.
sh: pfc: Prefer DRV_NAME over KBUILD_MODNAME.
sh: pfc: pinctrl legacy group support.
sh: pfc: Ignore pinmux GPIOs with invalid enum IDs.
sh: pfc: Export pinctrl binding init symbol.
sh: pfc: Error out on pinctrl init resolution failure.
sh: pfc: Make pr_fmt consistent across pfc drivers.
sh: pfc: pinctrl legacy function support.
sh: pfc: Rudimentary pinctrl-backed GPIO support.
sh: pfc: Dumb GPIO stringification.
sh: pfc: Shuffle PFC support core.
sh: pfc: Verify pin type encoding size at build time.
sh: pfc: Kill off unused pinmux bias flags.
sh: pfc: Make gpio chip support optional where possible.
sh: pfc: Split out gpio chip support.
sh64: Fix up section mismatch warnings.
sh64: Attempt to make reserved insn trap handler resemble C.
sh: Consolidate die definitions for trap handlers.
sh64: Kill off old exception debugging helpers.
sh64: Use generic unaligned access control/counters.
...
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This implements simple support for adjusting the pin config value via the
pinctrl API. The pinconf-generic code is abandoned for now until we've
got a chance to revamp the pinmux_type state tracking that's needed by
legacy code.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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While this code is still being shuffled around the KBUILD_MODNAME value
isn't particularly useful, switch to something a bit more useful.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This follows the function support by simply doing 1 pin per group
encapsulation in order to keep with legacy behaviour. This will be
built on incrementally as SoCs define their own pin groups.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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If we encounter invalid entries in the pinmux GPIO range, make sure we've
still got a dummy pin definition but don't otherwise map it.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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symbol_request() requires the registration symbol to be exported, make
sure it is.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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pinctrl support is required for correct operation, failure to locate
the init routine is fatal.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This maps out all of the function types to pinctrl function groups.
Presently this is restricted to one pin per function to maintain
compatability with legacy behaviour. This will be extended as groups
are introduced and exiting users migrated.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This begins the migration of the PFC core to the pinctrl subsystem.
Initial support is very basic, with the bulk of the implementation simply
being nopped out in such a way to allow registration with the pinctrl
core to succeed.
The gpio chip driver is stripped down considerably now relying purely on
pinctrl API calls to manage the bulk of its operations.
This provides a basis for further PFC refactoring, including decoupling
pin functions from the GPIO API, establishing pin groups, and so forth.
These will all be dealt with incrementally so as to introduce as few
growing and migratory pains to tree-wide PFC pinmux users today.
When the interfaces have been well established and in-tree users have
been migrated off of the legacy interfaces it will be possible to strip
down the core considerably, leading to eventual drivers/pinctrl rehoming.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This implements fairly simplistic stringification of existing pinmux
GPIOs for easy enum id -> string mapping, which will subsequently be used
by the pinctrl support code.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This follows the intc/clk changes and shuffles the PFC support code under
its own directory. This will facilitate better code sharing, and allow us
to trim down the exported interface by quite a margin.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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The encoding is tightly packed, and future changes (such as
pinconf-generic support) can easily lead to a situation where we violate
the encoding constraints and trample data bit/reg bits. This plugs in
some sanity checks by way of a BUILD_BUG_ON() to blow up if we fail to
fit.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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WANT_PULLUP/DOWN were never interfaced with anything, so just kill them
off.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This implements some Kconfig knobs for ensuring that the PFC gpio chip
can be disabled or built as a module in the cases where it's optional, or
forcibly enabled in cases where it's not.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This implements a bit of rework for the PFC code, making the core itself
slightly more pluggable and moving out the gpio chip handling completely.
The API is preserved in such a way that platforms that depend on it for
early configuration are still able to do so, while making it possible to
migrate to alternate interfaces going forward.
This is the first step of chainsawing necessary to support the pinctrl
API, with the eventual goal being able to decouple pin function state
from the gpio API while retaining gpio chip tie-in for gpio pin functions
only, relying on the pinctrl/pinmux API for non-gpio function demux.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This consolidates the div6/4 versions of the clk registration wrapper.
The existing wrappers with their own sh_clk_ops are maintained for API
compatability, though in the future it should be possible to be rid of
them entirely.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Everything with the exception of the _reparent ops are now shared, so
switch everything over to common types.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This introduces a new flag for clocks that need to have their divisor
ratio set back to their initial mask at disable time to prevent
interactivity problems with the clock stop bit (presently div6 only).
With this in place it's possible to handle the corner case on top of the
div4 op without any particular need for leaving things split out.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Follows the sh_clk_div_recalc() change.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This generalizes the div4 recalc routine for use by div6 and others, then
makes it the default.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This plugs in a div_mask for the clock and sets it up for the existing
div6/4 cases. This will make it possible to support other div types, as
well as share more div6/4 infrastructure.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This plugs in a generic clk_div_table, based on the div4 version. div6 is
then adopted to use it for encapsulating its div table, which permits us
to start div6/4 unification, as well as preparation for other div types.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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WARNING: vmlinux.o(.cpuinit.text+0x280): Section mismatch in reference from the function cpu_probe() to the function .init.text:sh64_tlb_init()
The function __cpuinit cpu_probe() references
a function __init sh64_tlb_init().
If sh64_tlb_init is only used by cpu_probe then
annotate sh64_tlb_init with a matching annotation.
sh64_tlb_init() simply needs to be __cpuinit annotated, so fix that up.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This has been long overdue. No functional changes.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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