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* ARM: dts: am335x-sancloud-bbe: Fix missing pinctrl refsPaul Barker2021-08-102-0/+6
| | | | | | | | pinctrl settings for the USB hub, barometer & accelerometer need to be referenced from the relevant nodes to work. Signed-off-by: Paul Barker <paul.barker@sancloud.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: am335x-bone: switch to new cpsw switch drvGrygorii Strashko2021-08-064-39/+12
| | | | | | | | | | | | | | | | The dual_mac mode has been preserved the same way between legacy and new driver, and one port devices works the same as 1 dual_mac port - it's safe to switch drivers. So, Switch BeagleBone boards to use new cpsw switch driver. Those boards have or 2 Ext. port wired and configured in dual_mac mode by default, or only 1 Ext. port. For am335x-sancloud-bbe-common.dtsi also removed duplicated davinci_mdio DT nodes which already defined in am335x-bone-common.dtsi. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: am33xx: update ethernet aliasesGrygorii Strashko2021-08-061-2/+2
| | | | | | | Update ethernet aliases to point at CPSW switchdev driver. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: am335x-sl50: switch to new cpsw switch drvGrygorii Strashko2021-08-061-4/+8
| | | | | | | | | | | | | The dual_mac mode has been preserved the same way between legacy and new driver, and one port devices works the same as 1 dual_mac port - it's safe to switch drivers. So, switch Toby Churchill SL50 Series to use new cpsw switch driver. Those boards have or 2 Ext. port wired and configured in dual_mac mode by default, or only 1 Ext. port. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: am335x-shc: switch to new cpsw switch drvGrygorii Strashko2021-08-061-17/+21
| | | | | | | | | | | | | The dual_mac mode has been preserved the same way between legacy and new driver, and one port devices works the same as 1 dual_mac port - it's safe to switch drivers. So, switch Bosch SHC to use new cpsw switch driver. Those boards have or 2 Ext. port wired and configured in dual_mac mode by default, or only 1 Ext. port. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: am335x-phycore: switch to new cpsw switch drvGrygorii Strashko2021-08-064-24/+22
| | | | | | | | | | | | | | The dual_mac mode has been preserved the same way between legacy and new driver, and one port devices works the same as 1 dual_mac port - it's safe to switch drivers. So, switch Phytec AM335x phyCORE SOM, phyBOARD-WEGA, phyBOARD-REGOR, PCM-953 to use new cpsw switch driver. Those boards have or 2 Ext. port wired and configured in dual_mac mode by default, or only 1 Ext. port. Cc: Teresa Remmet <t.remmet@phytec.de> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: am335x-pepper: switch to new cpsw switch drvGrygorii Strashko2021-08-061-8/+6
| | | | | | | | | | | | | The dual_mac mode has been preserved the same way between legacy and new driver, and one port devices works the same as 1 dual_mac port - it's safe to switch drivers. So, switch Gumstix Pepper to use new cpsw switch driver. Those boards have or 2 Ext. port wired and configured in dual_mac mode by default, or only 1 Ext. port. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: am335x-pdu001: switch to new cpsw switch drvGrygorii Strashko2021-08-061-8/+6
| | | | | | | | | | | | | The dual_mac mode has been preserved the same way between legacy and new driver, and one port devices works the same as 1 dual_mac port - it's safe to switch drivers. So, switch EETS,PDU001 to use new cpsw switch driver. Those boards have or 2 Ext. port wired and configured in dual_mac mode by default, or only 1 Ext. port. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: am335x-osd3358-sm-red: switch to new cpsw switch drvGrygorii Strashko2021-08-061-5/+8
| | | | | | | | | | | | | The dual_mac mode has been preserved the same way between legacy and new driver, and one port devices works the same as 1 dual_mac port - it's safe to switch drivers. So, switch Octavo Systems OSD3358-SM-RED to use new cpsw switch driver. Those boards have or 2 Ext. port wired and configured in dual_mac mode by default, or only 1 Ext. port. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: am335x-myirtech: switch to new cpsw switch drvGrygorii Strashko2021-08-062-19/+24
| | | | | | | | | | | | | | The dual_mac mode has been preserved the same way between legacy and new driver, and one port devices works the same as 1 dual_mac port - it's safe to switch drivers. So, switch MYIR MYC-AM335X/MYD-AM335X to use new cpsw switch driver. Those boards have or 2 Ext. port wired and configured in dual_mac mode by default, or only 1 Ext. port. Cc: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: am335x-moxa-uc: switch to new cpsw switch drvGrygorii Strashko2021-08-063-20/+15
| | | | | | | | | | | | | | The dual_mac mode has been preserved the same way between legacy and new driver, and one port devices works the same as 1 dual_mac port - it's safe to switch drivers. So, switch Moxa am335x-moxa-uc-210x/8100 to use new cpsw switch driver. Those boards have or 2 Ext. port wired and configured in dual_mac mode by default, or only 1 Ext. port. Cc: Johnson Chen <johnsonch.chen@moxa.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: am335x-lxm: switch to new cpsw switch drvGrygorii Strashko2021-08-061-8/+6
| | | | | | | | | | | | | The dual_mac mode has been preserved the same way between legacy and new driver, and one port devices works the same as 1 dual_mac port - it's safe to switch drivers. So, switch NovaTech OrionLXm to use new cpsw switch driver. Those boards have or 2 Ext. port wired and configured in dual_mac mode by default, or only 1 Ext. port Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: am335x-igep0033: switch to new cpsw switch drvGrygorii Strashko2021-08-061-6/+6
| | | | | | | | | | | | | The dual_mac mode has been preserved the same way between legacy and new driver, and one port devices works the same as 1 dual_mac port - it's safe to switch drivers. So, switch am335x-igep0033 to use new cpsw switch driver. Those boards have or 2 Ext. port wired and configured in dual_mac mode by default, or only 1 Ext. port. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: am335x-cm-t335: switch to new cpsw switch drvGrygorii Strashko2021-08-061-5/+8
| | | | | | | | | | | | | The dual_mac mode has been preserved the same way between legacy and new driver, and one port devices works the same as 1 dual_mac port - it's safe to switch drivers. So, switch CompuLab CM-T335 to use new cpsw switch driver. Those boards have or 2 Ext. port wired and configured in dual_mac mode by default, or only 1 Ext. port. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: am335x-chiliboard: switch to new cpsw switch drvGrygorii Strashko2021-08-061-5/+8
| | | | | | | | | | | | | The dual_mac mode has been preserved the same way between legacy and new driver, and one port devices works the same as 1 dual_mac port - it's safe to switch drivers. So, switch AM335x Chiliboard to use new cpsw switch driver. Those boards have or 2 Ext. port wired and configured in dual_mac mode by default, or only 1 Ext. port. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: am335x-nano: switch to new cpsw switch drvGrygorii Strashko2021-08-061-7/+6
| | | | | | | | | | | | | The dual_mac mode has been preserved the same way between legacy and new driver, and one port devices works the same as 1 dual_mac port - it's safe to switch drivers. So, switch Newflow AM335x NanoBone to use new cpsw switch driver. Those boards have or 2 Ext. port wired and configured in dual_mac mode by default, or only 1 Ext. port. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: am335x-baltos: switch to new cpsw switch drvGrygorii Strashko2021-08-067-31/+30
| | | | | | | | | | | | | | | The dual_mac mode has been preserved the same way between legacy and new driver, and one port devices works the same as 1 dual_mac port - it's safe to switch drivers. So, switch OnRISC Baltos and NetCom/Cam boards to use new cpsw switch driver. Those boards have or 2 Ext. port wired and configured in dual_mac mode by default, or only 1 Ext. port. Cc: Yegor Yefremov <yegorslists@googlemail.com> Cc: Christina Quast <cquast@hanoverdisplays.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: am57xx: Add PRUSS MDIO controller nodesSuman Anna2021-08-036-0/+60
| | | | | | | | | | | | | | | | | | | | The PRUSSs on AM57xx SoCs contain an MDIO controller that can be used to control external PHYs associated with the Industrial Ethernet peripherals within each PRUSS. The MDIO module used within the PRU-ICSS is an instance of the MDIO Controller used in TI Davinci SoCs. The same bus frequency of 1 MHz is chosen as the regular MDIO node. The nodes are added in the common am57-pruss.dtsi file and enabled by default, but are disabled in all the existing AM57xx board dts files. These nodes need pinctrl lines, and so should be enabled only on boards where they are actually wired and pinned out for PRUSS Ethernet. Any new board dts file should disable these if they are not sure. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: am57xx: Add PRU-ICSS nodesSuman Anna2021-08-031-1/+157
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the DT nodes for the PRU-ICSS1 and PRU-ICSS2 processor subsystems that are present on AM57xx family of SoCs. Each PRU-ICSS instance is represented by a pruss node and other child nodes. The two PRU-ICSSs are identical to each other. They are not supported on DRA7xx SoCs in general, so the nodes are added under the respective interconnect target module nodes in a common am57-pruss.dtsi file. The file is already included only in the AM57xx related board files. The PRU-ICSSs on AM57xx are very similar to the PRUSS in AM33xx and AM437x except for variations in the RAM sizes and the number of interrupts coming into the MPU INTC. The interrupt events into the PRU-ICSS also requires programming of the corresponding crossbars properly. The PRUSS subsystem node contains the entire address space. The various sub-modules of the PRU-ICSS are represented as individual child nodes (so platform devices themselves) of the PRUSS subsystem node. These include the two PRU cores and the interrupt controller. All the Data RAMs are represented within a child node of its own named 'memories' without any compatible. The Real Time Media Independent Interface controller (MII_RT), and the CFG sub-module are represented as syscon nodes. The PRUSS CFG module has a clock mux for IEP clock, this clk node is added under the CFG child node 'clocks'. The default source for this mux clock is the ICSS_IEP_CLK clock. The DT nodes use all standard properties. The regs property in the PRU nodes define the addresses for the Instruction RAM, the Debug and Control sub-modules for that PRU core. The firmware for each PRU core is defined through a 'firmware-name' property. The default names for the firmware images for each PRU core are defined as follows (these can be adjusted either in derivative board dts files or through sysfs at runtime if required): PRU-ICSS1 PRU0 Core: am57xx-pru1_0-fw PRU-ICSS1 PRU1 Core: am57xx-pru1_1-fw PRU-ICSS2 PRU0 Core: am57xx-pru2_0-fw PRU-ICSS2 PRU1 Core: am57xx-pru2_1-fw Note: 1. There are few more sub-modules like the Industrial Ethernet Peripheral (IEPs), MDIO, UART, eCAP that do not have bindings and so will be added in the future. 2. The PRUSS INTC on AM57xx SoCs also connect the host interrupts 6 and 7 as possible DMA events, so use the 'ti,irqs-reserved' property in derivative board dts files _if_ any of them should not be handled by the host OS. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: am4372: Add PRUSS MDIO controller nodeAndrew F. Davis2021-08-036-0/+30
| | | | | | | | | | | | | | | | | | | | | | The PRU-ICSS1 instance on AM437x SoCs has a MDIO sub-module that can be used to control external PHYs associated with the Industrial Ethernet peripherals within the PRUSS. The MDIO module used within this PRU-ICSS is an instance of the MDIO Controller used in TI Davinci SoCs. The same bus frequency of 1 MHz is chosen as the regular MDIO node. Note that there is no MDIO node added to the smaller PRU-ICSS0 instance as the MDIO pins are not pinned out. The node is added and enabled in the common am4372.dtsi file by default, and disabled in all the existing AM437x board dts files. This node needs pinctrl lines, and so should be enabled only on boards where they are actually wired and pinned out for PRUSS Ethernet. Any new board dts file should disable these if they are not sure. Signed-off-by: Andrew F. Davis <afd@ti.com> [s-anna@ti.com: fix reg address, add commit description] Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: am4372: Add the PRU-ICSS0 DT nodeSuman Anna2021-08-031-0/+77
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The AM4376+ SoCs have a second smaller PRU-ICSS subsystem (PRUSS0) in addition to the primary PRUSS1 instance. The PRUSS0 has less DRAM per PRU, and no Shared DRAM among other minor differences. The IEP and MII_RT modules even though present within the IP are not pinned out. This PRUSS0 instance has a weird SoC integration. It shares the same L3 OCP interconnect interface with PRUSS1, and also shares its reset line and clocks. Any external accesses from PRUSS0 requires the PRUSS1's PRUSS_SYSCFG register to be programmed properly. That said, it is its own IP instance (a cut-down version), and so it has been added as an independent node (sibling node to PRUSS1 node) and a child node of the corresponding PRUSS target module interconnect node. This allows the PRUSS0 instance to be enabled/disabled independently of the PRUSS1 instance. The nodes are added under the corresponding interconnect target module node in the common am4372 dtsi file. The PRU-ICSS instances are not supported on AM4372 SoC though in the AM437x family, so the interconnect target module node should be disabled in any derivative board dts file that uses AM4372 SoCs. The individual PRUSS node can be disabled in the corresponding board dts file if desired. The default names for the firmware images for each PRU core are defined as follows (these can be adjusted either in derivative board dts files or through sysfs at runtime if required): PRU-ICSS0 PRU0 Core: am437x-pru0_0-fw PRU-ICSS0 PRU1 Core: am437x-pru0_1-fw Note: 1. There are few more sub-modules like the Industrial Ethernet Peripheral (IEP), eCAP, UART, that do not have bindings and so will be added in the future. Only UART is pinned out, so others should be added in disabled state if added. 2. The PRUSS0 INTC on AM437x SoCs routes the host interrupt 5 to the other PRUSS1, so it is already marked reserved through the 'ti,irqs-reserved' property. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: am4372: Add the PRU-ICSS1 DT nodeSuman Anna2021-08-031-0/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the DT node for the PRU-ICSS1 instance on the AM437x family of SoCs. Each PRU-ICSS instance is represented by a pruss node and other child nodes. The nodes are added under the interconnect target module node in the common am4372 dtsi file. The PRU-ICSS instances are supported only on AM4376+ SoCs though in the AM437x family, so the interconnect target module node should be disabled in any derivative board dts file that uses AM4372 SoCs. The PRU-ICSS1 on AM437x is very similar to the PRUSS in AM33xx, except for variations in the RAM sizes, bus addresses and the number of interrupts coming into the MPU INTC (host interrupt 5 is routed to the other PRUSS instead of MPU). The PRUSS subsystem node contains the entire address space. The various sub-modules of the PRU-ICSS are represented as individual child nodes (so platform devices themselves) of the PRUSS subsystem node. These include the two PRU cores and the interrupt controller. All the Data RAMs are represented within a child node of its own named 'memories' without any compatible. The Real Time Media Independent Interface controller (MII_RT), and the CFG sub-module are represented as syscon nodes. The PRUSS CFG module has a clock mux for IEP clock, this clk node is added under the CFG child node 'clocks'. The default source for this mux clock is the PRU_ICSS_IEP_GCLK clock. The DT nodes use all standard properties. The regs property in the PRU nodes define the addresses for the Instruction RAM, the Debug and Control sub-modules for that PRU core. The firmware for each PRU core is defined through a 'firmware-name' property. The default names for the firmware images for each PRU core are defined as follows (these can be adjusted either in derivative board dts files or through sysfs at runtime if required): PRU-ICSS1 PRU0 Core: am437x-pru1_0-fw PRU-ICSS1 PRU1 Core: am437x-pru1_1-fw Note: 1. There are few more sub-modules like the Industrial Ethernet Peripheral (IEP), MDIO, UART, eCAP that do not have bindings and so will be added in the future. 2. The PRUSS INTC on AM437x SoCs also connect the host interrupt 0 to ADC0 and ADC1; 6 and 7 as possible DMA events, so use the 'ti,irqs-reserved' property in derivative board dts files _if_ any of them should not be handled by the host OS. Host interrupt 5 is already marked reserved as it is connected to the other PRUSS instance. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: am335x-icev2: Enable PRU-ICSS moduleSuman Anna2021-08-031-0/+4
| | | | | | | | | | | | | | | | The PRU-ICSS target module node was left in disabled state in the base am33xx-l4.dtsi file. PRU-ICSS is supported on the AM335x ICEv2 board, so enable this node to support PRUSS on this board. The PRUSS node and most of its child nodes are already enabled in the base dts file, and so become effective automatically with the enabling of this PRU-ICSS target module node. The corresponding PRU nodes can be disabled later on if there are no use-cases defined to use a particular PRU core or the whole PRU-ICSS subsystem itself if both its PRU cores are unused. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: am335x-evmsk: Enable PRU-ICSS moduleSuman Anna2021-08-031-0/+4
| | | | | | | | | | | | | | | | The PRU-ICSS target module node was left in disabled state in the base am33xx-l4.dtsi file. PRU-ICSS is supported on the AM335x SK EVM board, so enable this node to support PRUSS on this board. The PRUSS node and most of its child nodes are already enabled in the base dts file, and so become effective automatically with the enabling of this PRU-ICSS target module node. The corresponding PRU nodes can be disabled later on if there are no use-cases defined to use a particular PRU core or the whole PRU-ICSS subsystem itself if both its PRU cores are unused. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: am335x-evm: Enable PRU-ICSS moduleSuman Anna2021-08-031-0/+4
| | | | | | | | | | | | | | | | The PRU-ICSS target module node was left in disabled state in the base am33xx-l4.dtsi file. PRU-ICSS is supported on the AM335x EVM, so enable this node on the AM335x EVM. The PRUSS node and most of its child nodes are already enabled in the base dts file, and so become effective automatically with the enabling of this PRU-ICSS target module node. The corresponding PRU nodes can be disabled later on if there are no use-cases defined to use a particular PRU core or the whole PRU-ICSS subsystem itself if both its PRU cores are unused. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: am335x-bone-common: Enable PRU-ICSS nodeSuman Anna2021-08-031-0/+4
| | | | | | | | | | | | | | | | The PRU-ICSS target module node was left in disabled state in the base am33xx-l4.dtsi file. Enable this node on all the AM335x beaglebone boards as they mostly use a AM3358 or a AM3359 SoC which do contain the PRU-ICSS IP. The PRUSS node and most of its child nodes are already enabled in the base dts file, and so become effective automatically with the enabling of this PRU-ICSS target-module node. The corresponding PRU nodes can be disabled later on if there are no use-cases defined to use a particular PRU core or the whole PRU-ICSS subsystem itself if both its PRU cores are unused. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: am33xx-l4: Add PRUSS MDIO controller nodeSuman Anna2021-08-031-0/+11
| | | | | | | | | | | | | | | | | The PRUSS on AM335x SoCs has a MDIO sub-module that can be used to control external PHYs associated with the Industrial Ethernet peripherals within the PRUSS. The MDIO module used within the PRU-ICSS is an instance of the MDIO Controller used in TI Davinci SoCs. The same bus frequency of 1 MHz is chosen as the regular MDIO node. The node is added to the common am33xx-l4.dtsi file and is disabled. This needs to be enabled in the respective board files using the relevant AM335x SoCs supporting PRUSS and where the ethernet is pinned out and connected properly. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: am33xx-l4: Add PRUSS nodeSuman Anna2021-08-031-0/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the DT nodes for the PRU-ICSS on AM33xx family of SoCs. The AM33xx SoCs contain a single PRU-ICSS instance and is represented by a pruss node and other child nodes. PRU-ICSS is supported only on AM3356+ SoCs though in the AM33xx family, so the nodes are added under the corresponding disabled interconnect target module node in the common am33xx-l4 dtsi file. The target module node should be enabled in only those derivative board files that use a SoC containing PRU-ICSS. The PRUSS subsystem node contains the entire address space. The various sub-modules of the PRU-ICSS are represented as individual child nodes (so platform devices themselves) of the PRUSS subsystem node. These include the two PRU cores and the interrupt controller. All the Data RAMs are represented within a child node of its own named 'memories' without any compatible. The Real Time Media Independent Interface controller (MII_RT), and the CFG sub-module are represented as syscon nodes. The PRUSS CFG module has a clock mux for IEP clock, this clk node is added under the CFG child node 'clocks'. The default source for this mux clock is the PRU_ICSS_IEP_GCLK clock. The DT nodes use all standard properties. The regs property in the PRU nodes define the addresses for the Instruction RAM, the Debug and Control sub-modules for that PRU core. The firmware for each PRU core is defined through a 'firmware-name' property. The default names for the firmware images for each PRU core are defined as follows (these can be adjusted either in derivative board dts files or through sysfs at runtime if required): PRU-ICSS PRU0 Core: am335x-pru1_0-fw PRU-ICSS PRU1 Core: am335x-pru1_1-fw Note: 1. There are few more sub-modules like the Industrial Ethernet Peripheral (IEP), MDIO, UART, eCAP that do not have bindings and so will be added in the future. 2. The PRUSS INTC on AM335x SoCs also connect the host interrupts 0 to TSC_ADC; 6 and 7 as possible DMA events, so use the 'ti,irqs-reserved' property in derivative board dts files _if_ any of them should not be handled by the host OS. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: am335x-sancloud-bbe-lite: New devicetreePaul Barker2021-07-272-0/+51
| | | | | | | | This adds support for the Sancloud BBE Lite which shares a common hardware base with the non-Lite version of the BBE. Signed-off-by: Paul Barker <paul.barker@sancloud.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: am335x-sancloud-bbe: Extract common codePaul Barker2021-07-272-90/+97
| | | | | | | | The Sancloud BBE, BBE Lite and BBE Extended+WiFi share a common hardware base so we can avoid duplication via a dtsi file. Signed-off-by: Paul Barker <paul.barker@sancloud.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: am335x-boneblack: Extract HDMI configPaul Barker2021-07-275-135/+144
| | | | | | | | | | | | Move the HDMI hardware configuration for the BeagleBone Black out of the boneblack common dtsi file and into its own separate dtsi file. This allows the devicetree for BeagleBone Black derivatives which lack the hdmi encoding hardware to include the common dtsi file without needing to duplicate configuration or override the status of all hdmi-related nodes. Signed-off-by: Paul Barker <paul.barker@sancloud.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: omap4-l4-abe: Add McASP configurationPeter Ujfalusi2021-07-271-16/+19
| | | | | | | | | | | | | | OMAP4 has a single McASP instance with single serializer and locked for DIT mode. To be able to enable the support the following fixes needed: - Add the DAT port ranges to the target module's ranges We can already fill in the op-mode and serial-dir for McASP as it only supports this configuration, but keep the module disabled as there is no known device available where it is used. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: omap4-l4-abe: Correct sidle modes for McASPPeter Ujfalusi2021-07-271-2/+1
| | | | | | | McASP only supports Force-idle, No-idle and Smart-idle modes Signed-off-by: Peter Ujfalusi <peter.ujfalusi@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: Add support for dra762 abz packageLokesh Vutla2021-07-274-21/+28
| | | | | | | | | | | | dra762 abz package is pin compatible with dra742 and few peripherals like DDR with upgraded speed. Add dt support for this SoC. Reported-by: Praneeth Bajjuri <praneeth@ti.com> Tested-by: Praneeth Bajjuri <praneeth@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> [khilman: forward port from ti-linux-5.4.y] Signed-off-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: am335x-boneblue: add gpio-line-namesDavid Lechner2021-07-271-1/+142
| | | | | | | | This adds gpio-line-names to the BeagleBone Blue DTS. The line names are based on the BeagleBone Blue rev A2 schematic. Signed-off-by: David Lechner <david@lechnology.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* Linux 5.14-rc1v5.14-rc1Linus Torvalds2021-07-121-2/+2
|
* mm/rmap: try_to_migrate() skip zone_device !device_privateHugh Dickins2021-07-121-3/+3
| | | | | | | | | | | | | | | | | | I know nothing about zone_device pages and !device_private pages; but if try_to_migrate_one() will do nothing for them, then it's better that try_to_migrate() filter them first, than trawl through all their vmas. Signed-off-by: Hugh Dickins <hughd@google.com> Reviewed-by: Shakeel Butt <shakeelb@google.com> Reviewed-by: Alistair Popple <apopple@nvidia.com> Link: https://lore.kernel.org/lkml/1241d356-8ec9-f47b-a5ec-9b2bf66d242@google.com/ Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Jason Gunthorpe <jgg@nvidia.com> Cc: Ralph Campbell <rcampbell@nvidia.com> Cc: Christoph Hellwig <hch@lst.de> Cc: Yang Shi <shy828301@gmail.com> Cc: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* mm/rmap: fix new bug: premature return from page_mlock_one()Hugh Dickins2021-07-121-6/+5
| | | | | | | | | | | | | | | | | | | | | | In the unlikely race case that page_mlock_one() finds VM_LOCKED has been cleared by the time it got page table lock, page_vma_mapped_walk_done() must be called before returning, either explicitly, or by a final call to page_vma_mapped_walk() - otherwise the page table remains locked. Fixes: cd62734ca60d ("mm/rmap: split try_to_munlock from try_to_unmap") Signed-off-by: Hugh Dickins <hughd@google.com> Reviewed-by: Alistair Popple <apopple@nvidia.com> Reviewed-by: Shakeel Butt <shakeelb@google.com> Reported-by: kernel test robot <oliver.sang@intel.com> Link: https://lore.kernel.org/lkml/20210711151446.GB4070@xsang-OptiPlex-9020/ Link: https://lore.kernel.org/lkml/f71f8523-cba7-3342-40a7-114abc5d1f51@google.com/ Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Jason Gunthorpe <jgg@nvidia.com> Cc: Ralph Campbell <rcampbell@nvidia.com> Cc: Christoph Hellwig <hch@lst.de> Cc: Yang Shi <shy828301@gmail.com> Cc: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* mm/rmap: fix old bug: munlocking THP missed other mlocksHugh Dickins2021-07-121-5/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The kernel recovers in due course from missing Mlocked pages: but there was no point in calling page_mlock() (formerly known as try_to_munlock()) on a THP, because nothing got done even when it was found to be mapped in another VM_LOCKED vma. It's true that we need to be careful: Mlocked accounting of pte-mapped THPs is too difficult (so consistently avoided); but Mlocked accounting of only-pmd-mapped THPs is supposed to work, even when multiple mappings are mlocked and munlocked or munmapped. Refine the tests. There is already a VM_BUG_ON_PAGE(PageDoubleMap) in page_mlock(), so page_mlock_one() does not even have to worry about that complication. (I said the kernel recovers: but would page reclaim be likely to split THP before rediscovering that it's VM_LOCKED? I've not followed that up) Fixes: 9a73f61bdb8a ("thp, mlock: do not mlock PTE-mapped file huge pages") Signed-off-by: Hugh Dickins <hughd@google.com> Reviewed-by: Shakeel Butt <shakeelb@google.com> Acked-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Link: https://lore.kernel.org/lkml/cfa154c-d595-406-eb7d-eb9df730f944@google.com/ Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Alistair Popple <apopple@nvidia.com> Cc: Jason Gunthorpe <jgg@nvidia.com> Cc: Ralph Campbell <rcampbell@nvidia.com> Cc: Christoph Hellwig <hch@lst.de> Cc: Yang Shi <shy828301@gmail.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* mm/rmap: fix comments left over from recent changesHugh Dickins2021-07-122-7/+2
| | | | | | | | | | | | | | | | | | | | | | | | | Parallel developments in mm/rmap.c have left behind some out-of-date comments: try_to_migrate_one() also accepts TTU_SYNC (already commented in try_to_migrate() itself), and try_to_migrate() returns nothing at all. TTU_SPLIT_FREEZE has just been deleted, so reword the comment about it in mm/huge_memory.c; and TTU_IGNORE_ACCESS was removed in 5.11, so delete the "recently referenced" comment from try_to_unmap_one() (once upon a time the comment was near the removed codeblock, but they drifted apart). Signed-off-by: Hugh Dickins <hughd@google.com> Reviewed-by: Shakeel Butt <shakeelb@google.com> Reviewed-by: Alistair Popple <apopple@nvidia.com> Link: https://lore.kernel.org/lkml/563ce5b2-7a44-5b4d-1dfd-59a0e65932a9@google.com/ Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Jason Gunthorpe <jgg@nvidia.com> Cc: Ralph Campbell <rcampbell@nvidia.com> Cc: Christoph Hellwig <hch@lst.de> Cc: Yang Shi <shy828301@gmail.com> Cc: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge tag 'irq-urgent-2021-07-11' of ↵Linus Torvalds2021-07-116-12/+31
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull irq fixes from Ingo Molnar: "Two fixes: - Fix a MIPS IRQ handling RCU bug - Remove a DocBook annotation for a parameter that doesn't exist anymore" * tag 'irq-urgent-2021-07-11' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: irqchip/mips: Fix RCU violation when using irqdomain lookup on interrupt entry genirq/irqdesc: Drop excess kernel-doc entry @lookup
| * Merge tag 'irqchip-fixes-5.14-1' of ↵Thomas Gleixner2021-07-096-12/+31
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/urgent Pull irqchip fixes from Marc Zyngier: - Fix a MIPS bug where irqdomain loopkups could occur in a context where RCU is not allowed - Fix a documentation bug for handle_domain_irq
| | * irqchip/mips: Fix RCU violation when using irqdomain lookup on interrupt entryMarc Zyngier2021-07-095-11/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since d4a45c68dc81 ("irqdomain: Protect the linear revmap with RCU"), any irqdomain lookup requires the RCU read lock to be held. This assumes that the architecture code will be structured such as irq_enter() will be called *before* the interrupt is looked up in the irq domain. However, this isn't the case for MIPS, and a number of drivers are structured to do it the other way around when handling an interrupt in their root irqchip (secondary irqchips are OK by construction). This results in a RCU splat on a lockdep-enabled kernel when the kernel takes an interrupt from idle, as reported by Guenter Roeck. Note that this could have fired previously if any driver had used tree-based irqdomain, which always had the RCU requirement. To solve this, provide a MIPS-specific helper (do_domain_IRQ()) as the pendent of do_IRQ() that will do thing in the right order (and maybe save some cycles in the process). Ideally, MIPS would be moved over to using handle_domain_irq(), but that's much more ambitious. Reported-by: Guenter Roeck <linux@roeck-us.net> Tested-by: Guenter Roeck <linux@roeck-us.net> [maz: add dependency on CONFIG_IRQ_DOMAIN after report from the kernelci bot] Signed-off-by: Marc Zyngier <maz@kernel.org> Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Cc: Serge Semin <fancer.lancer@gmail.com> Link: https://lore.kernel.org/r/20210705172352.GA56304@roeck-us.net Link: https://lore.kernel.org/r/20210706110647.3979002-1-maz@kernel.org
| | * genirq/irqdesc: Drop excess kernel-doc entry @lookupRandy Dunlap2021-06-281-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix kernel-doc warning in irqdesc.c: ../kernel/irq/irqdesc.c:692: warning: Excess function parameter 'lookup' description in 'handle_domain_irq' Fixes: e1c054918c6c ("genirq: Move non-irqdomain handle_domain_irq() handling into ARM's handle_IRQ()") Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20210628004044.9011-1-rdunlap@infradead.org
* | | Merge tag 'sched-urgent-2021-07-11' of ↵Linus Torvalds2021-07-112-10/+18
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull scheduler fixes from Ingo Molnar: "Three fixes: - Fix load tracking bug/inconsistency - Fix a sporadic CFS bandwidth constraints enforcement bug - Fix a uclamp utilization tracking bug for newly woken tasks" * tag 'sched-urgent-2021-07-11' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: sched/uclamp: Ignore max aggregation if rq is idle sched/fair: Fix CFS bandwidth hrtimer expiry type sched/fair: Sync load_sum with load_avg after dequeue
| * | | sched/uclamp: Ignore max aggregation if rq is idleXuewen Yan2021-07-021-7/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When a task wakes up on an idle rq, uclamp_rq_util_with() would max aggregate with rq value. But since there is no task enqueued yet, the values are stale based on the last task that was running. When the new task actually wakes up and enqueued, then the rq uclamp values should reflect that of the newly woken up task effective uclamp values. This is a problem particularly for uclamp_max because it default to 1024. If a task p with uclamp_max = 512 wakes up, then max aggregation would ignore the capping that should apply when this task is enqueued, which is wrong. Fix that by ignoring max aggregation if the rq is idle since in that case the effective uclamp value of the rq will be the ones of the task that will wake up. Fixes: 9d20ad7dfc9a ("sched/uclamp: Add uclamp_util_with()") Signed-off-by: Xuewen Yan <xuewen.yan@unisoc.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Valentin Schneider <valentin.schneider@arm.com> [qias: Changelog] Reviewed-by: Qais Yousef <qais.yousef@arm.com> Link: https://lore.kernel.org/r/20210630141204.8197-1-xuewen.yan94@gmail.com
| * | | sched/fair: Fix CFS bandwidth hrtimer expiry typeOdin Ugedal2021-07-021-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The time remaining until expiry of the refresh_timer can be negative. Casting the type to an unsigned 64-bit value will cause integer underflow, making the runtime_refresh_within return false instead of true. These situations are rare, but they do happen. This does not cause user-facing issues or errors; other than possibly unthrottling cfs_rq's using runtime from the previous period(s), making the CFS bandwidth enforcement less strict in those (special) situations. Signed-off-by: Odin Ugedal <odin@uged.al> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Ben Segall <bsegall@google.com> Link: https://lore.kernel.org/r/20210629121452.18429-1-odin@uged.al
| * | | sched/fair: Sync load_sum with load_avg after dequeueVincent Guittot2021-07-021-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 9e077b52d86a ("sched/pelt: Check that *_avg are null when *_sum are") reported some inconsitencies between *_avg and *_sum. commit 1c35b07e6d39 ("sched/fair: Ensure _sum and _avg values stay consistent") fixed some but one remains when dequeuing load. sync the cfs's load_sum with its load_avg after dequeuing the load of a sched_entity. Fixes: 9e077b52d86a ("sched/pelt: Check that *_avg are null when *_sum are") Reported-by: Sachin Sant <sachinp@linux.vnet.ibm.com> Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Odin Ugedal <odin@uged.al> Tested-by: Sachin Sant <sachinp@linux.vnet.ibm.com> Link: https://lore.kernel.org/r/20210701171837.32156-1-vincent.guittot@linaro.org
* | | | Merge tag 'perf-urgent-2021-07-11' of ↵Linus Torvalds2021-07-112-8/+21
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull perf fixes from Ingo Molnar: "A fix and a hardware-enablement addition: - Robustify uncore_snbep's skx_iio_set_mapping()'s error cleanup - Add cstate event support for Intel ICELAKE_X and ICELAKE_D" * tag 'perf-urgent-2021-07-11' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: perf/x86/intel/uncore: Clean up error handling path of iio mapping perf/x86/cstate: Add ICELAKE_X and ICELAKE_D support
| * | | | perf/x86/intel/uncore: Clean up error handling path of iio mappingKan Liang2021-07-021-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The error handling path of iio mapping looks fragile. We already fixed one issue caused by it, commit f797f05d917f ("perf/x86/intel/uncore: Fix for iio mapping on Skylake Server"). Clean up the error handling path and make the code robust. Reported-by: gushengxian <gushengxian@yulong.com> Signed-off-by: Kan Liang <kan.liang@linux.intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lkml.kernel.org/r/40e66cf9-398b-20d7-ce4d-433be6e08921@linux.intel.com
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-27 07:37:34 +0100