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* Merge tag 'dmaengine-4.21-rc1' of git://git.infradead.org/users/vkoul/slave-dmaLinus Torvalds2019-01-0241-394/+2296
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull dmaengine updates from Vinod Koul: "This includes a new driver, removes R-Mobile APE6 as it is no longer used, sprd cyclic dma support, last batch of dma_slave_config direction removal and random updates to bunch of drivers. Summary: - New driver for UniPhier MIO DMA controller - Remove R-Mobile APE6 support - Sprd driver updates and support for cyclic link-list - Remove dma_slave_config direction usage from rest of drivers - Minor updates to dmatest, dw-dmac, zynqmp and bcm dma drivers" * tag 'dmaengine-4.21-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (48 commits) dmaengine: qcom_hidma: convert to DEFINE_SHOW_ATTRIBUTE dmaengine: pxa: remove DBGFS_FUNC_DECL() dmaengine: mic_x100_dma: convert to DEFINE_SHOW_ATTRIBUTE dmaengine: amba-pl08x: convert to DEFINE_SHOW_ATTRIBUTE dmaengine: Documentation: Add documentation for multi chan testing dmaengine: dmatest: Add transfer_size parameter dmaengine: dmatest: Add alignment parameter dmaengine: dmatest: Use fixed point div to calculate iops dmaengine: dmatest: Add support for multi channel testing dmaengine: rcar-dmac: Document R8A774C0 bindings dt-bindings: dmaengine: usb-dmac: Add binding for r8a774c0 dmaengine: zynqmp_dma: replace spin_lock_bh with spin_lock_irqsave dmaengine: sprd: Add me as one of the module authors dmaengine: sprd: Support DMA 2-stage transfer mode dmaengine: sprd: Support DMA link-list cyclic callback dmaengine: sprd: Set cur_desc as NULL when free or terminate one dma channel dmaengine: sprd: Fix the last link-list configuration dmaengine: sprd: Get transfer residue depending on the transfer direction dmaengine: sprd: Remove direction usage from struct dma_slave_config dmaengine: dmatest: fix a small memory leak in dmatest_func() ...
| * Merge branch 'topic/xilinx' into for-linusVinod Koul2018-12-312-21/+25
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| | * dmaengine: xilinx_dma: Remove __aligned attribute on zynqmp_dma_desc_llNathan Chancellor2018-11-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clang warns: drivers/dma/xilinx/zynqmp_dma.c:166:4: warning: attribute 'aligned' is ignored, place it after "struct" to apply attribute to type declaration [-Wignored-attributes] }; __aligned(64) ^ ./include/linux/compiler_types.h:200:38: note: expanded from macro '__aligned' ^ 1 warning generated. As Nick pointed out in the previous version of this patch, the author likely intended for this struct to be 8-byte (64-bit) aligned, not 64-byte, which is the default. Remove the hanging __aligned attribute. Fixes: b0cc417c1637 ("dmaengine: Add Xilinx zynqmp dma engine driver support") Reported-by: Nick Desaulniers <ndesaulniers@google.com> Suggested-by: Nick Desaulniers <ndesaulniers@google.com> Signed-off-by: Nathan Chancellor <natechancellor@gmail.com> Reviewed-by: Nick Desaulniers <ndesaulniers@google.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>
| | * dmaengine: xilinx_dma: Fix 64-bit simple CDMA transferRadhey Shyam Pandey2018-11-111-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In AXI CDMA simple mode also pass MSB bits of source and destination address to xilinx_write function. This fixes simple CDMA operation mode using 64-bit addressing. Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Appana Durga Kedareswara Rao <appana.durga.rao@xilinx.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>
| | * dmaengine: xilinx_dma: Introduce helper macro for preparing dma addressRadhey Shyam Pandey2018-11-111-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch introduces the xilinx_prep_dma_addr_t macro which prepares dma_addr_t from hardware buffer descriptor LSB and MSB fields. It will be used in simple dma 64-bit programming sequence. Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com> Reviewed-by: Appana Durga Kedareswara Rao <appana.durga.rao@xilinx.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>
| | * dmaengine: xilinx_dma: Refactor axidma channel allocationRadhey Shyam Pandey2018-11-111-18/+18
| | | | | | | | | | | | | | | | | | | | | | | | In axidma alloc_chan_resources merge BD and cyclic BD allocation. Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | Merge branch 'topic/uniphier' into for-linusVinod Koul2018-12-315-0/+544
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| | * | dmaengine: uniphier-mdmac: add UniPhier MIO DMAC driverMasahiro Yamada2018-11-244-0/+519
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MIO DMAC (Media IO DMA Controller) is used in UniPhier LD4, Pro4, and sLD8 SoCs. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>
| | * | dt-bindings: dmaengine: add DT binding for UniPhier MIO DMACMasahiro Yamada2018-11-241-0/+25
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | The MIO DMAC (Media IO DMA Controller) is used in UniPhier LD4, Pro4, and sLD8 SoCs. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | Merge branch 'topic/sprd' into for-linusVinod Koul2018-12-312-20/+194
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| | * | dmaengine: sprd: Add me as one of the module authorsEric Long2018-12-051-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add me as one of the module authors. Signed-off-by: Eric Long <eric.long@spreadtrum.com> Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org>
| | * | dmaengine: sprd: Support DMA 2-stage transfer modeEric Long2018-12-052-4/+156
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Spreadtrum DMA controller supports channel 2-stage tansfer mode, that means we can request 2 dma channels, one for source channel, and another one for destination channel. Once the source channel's transaction is done, it will trigger the destination channel's transaction automatically by hardware signal. Signed-off-by: Eric Long <eric.long@spreadtrum.com> Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org>
| | * | dmaengine: sprd: Support DMA link-list cyclic callbackEric Long2018-12-051-11/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Spreadtrum DMA link-list mode is always one cyclic transfer, so we should clear the SPRD_DMA_LLIST_END flag for the link-list configuration. Moreover add cyclic callback support for the cyclic transfer. Signed-off-by: Eric Long <eric.long@spreadtrum.com> Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org>
| | * | dmaengine: sprd: Set cur_desc as NULL when free or terminate one dma channelEric Long2018-12-051-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It will be failed to start one new transfer if the channel started one none interrupt transfer before, since we will only set the schan->cur_desc as NULL depending on the transfer interrupt now. Thus we should set schan->cur_desc as NULL when free or terminate one dma channel to avoid this issue. Signed-off-by: Eric Long <eric.long@spreadtrum.com> Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org>
| | * | dmaengine: sprd: Fix the last link-list configurationEric Long2018-12-051-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We will pass sglen as 0 configure the last link-list configuration when filling the descriptor, which will cause the incorrect link-list configuration. Thus we should check if the sglen is 0 to configure the correct link-list configuration. Signed-off-by: Eric Long <eric.long@spreadtrum.com> Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org>
| | * | dmaengine: sprd: Get transfer residue depending on the transfer directionEric Long2018-12-051-1/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add one field to save the transfer direction for struct sprd_dma_desc, which is used to get correct transfer residue depending on the transfer direction. [Baolin Wang adds one field to present the transfer direction] Signed-off-by: Eric Long <eric.long@spreadtrum.com> Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org>
| | * | dmaengine: sprd: Remove direction usage from struct dma_slave_configBaolin Wang2018-12-051-3/+0
| | |/ | | | | | | | | | | | | | | | | | | | | | The direction field of struct dma_slave_config was marked deprecated, thus remove the usage. Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | Merge branch 'topic/sh' into for-linusVinod Koul2018-12-318-105/+10
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| | * | dmaengine: rcar-dmac: Document R8A774C0 bindingsFabrizio Castro2018-12-171-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Renesas' RZ/G2E (R8A774C0) SoC has DMA controllers compatible with this driver, therefore document RZ/G2E specific bindings. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Vinod Koul <vkoul@kernel.org>
| | * | dt-bindings: dmaengine: usb-dmac: Add binding for r8a774c0Fabrizio Castro2018-12-171-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds bindings for the r8a774c0 (RZ/G2E). Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Vinod Koul <vkoul@kernel.org>
| | * | dmaengine: sh: Remove R-Mobile APE6 supportGeert Uytterhoeven2018-12-055-99/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Renesas R-Mobile APE6 support is currently unused: - DMA slaves were never enabled in r8a73a4.dtsi, - The driver relies on legacy filter matching and describing all slaves and MID/RIDs in a table, unlike modern DMA engine drivers for similar hardware like rcar-dmac, - The driver doesn't seem to work well. Remove the driver, it can be resurrected from git history when needed. As this was the last user of SH_DMAE_BASE on Renesas ARM SoCs, the sh-dma-engine driver core is now used on SuperH only. Note that the DT bindings are still present, as r8a73a4.dtsi uses them. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Vinod Koul <vkoul@kernel.org>
| | * | dt-bindings: dmaengine: usb-dmac: Add binding for r8a774a1Biju Das2018-11-241-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds binding for r8a774a1 (RZ/G2M). Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Vinod Koul <vkoul@kernel.org>
| | * | dmaengine: rcar-dmac: Document R8A774A1 bindingsFabrizio Castro2018-11-241-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Renesas' RZ/G2M (R8A774A1) SoC has DMA controllers compatible with this driver, therefore document RZ/G2M specific bindings. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Vinod Koul <vkoul@kernel.org>
| | * | dt-bindings: dmaengine: usb-dmac: Add binding for r8a77470Biju Das2018-11-111-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds usb high-speed dmac binding for r8a77470 (RZ/G1C) SoC. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Vinod Koul <vkoul@kernel.org>
| | * | dmaengine: sh: convert to SPDX identifiersKuninori Morimoto2018-11-112-5/+3
| | |/ | | | | | | | | | | | | | | | | | | | | | This patch updates license to use SPDX-License-Identifier instead of verbose license text. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | Merge branch 'topic/sa11x0' into for-linusVinod Koul2018-12-312-37/+8
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| | * | dmaengine: sa11x0: unexport sa11x0_dma_filter_fn and clean upRussell King2018-11-112-37/+8
| | |/ | | | | | | | | | | | | | | | | | | | | | As we now have no users of sa11x0_dma_filter_fn() in the tree, we can unexport this function, and remove the now unused header file. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | Merge branch 'topic/mtk' into for-linusVinod Koul2018-12-313-0/+965
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| | * | dmaengine: mediatek: Add MediaTek Command-Queue DMA controller for MT6765 SoCShun-Chih Yu2018-11-113-0/+965
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MediaTek Command-Queue DMA controller (CQDMA) on MT6765 SoC is dedicated to memory-to-memory transfer through queue based descriptor management. There are only 3 physical channels inside CQDMA, while the driver is extended to support 32 virtual channels for multiple dma users to issue dma requests onto the CQDMA simultaneously. Signed-off-by: Shun-Chih Yu <shun-chih.yu@mediatek.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | Merge branch 'topic/imx' into for-linusVinod Koul2018-12-311-3/+1
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| | * | dmaengine: imx-sdma: Use a single line for dma_alloc_coherent()Fabio Estevam2018-11-241-3/+1
| | |/ | | | | | | | | | | | | | | | | | | | | | Make the call to dma_alloc_coherent() to fit into a single line, which helps readability. Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | Merge branch 'topic/ep93xx' into for-linusVinod Koul2018-12-311-3/+3
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| | * | dmaengine: ep93xx: fix some typoYangtao Li2018-11-111-3/+3
| | |/ | | | | | | | | | | | | Signed-off-by: Yangtao Li <tiny.windzz@gmail.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | Merge branch 'topic/dw' into for-linusVinod Koul2018-12-317-1/+39
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| | * | dmaengine: dw-dmac: implement dma protection control settingChristian Lamparter2018-11-244-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a new device-tree property that allows to specify the dma protection control bits for the all of the DMA controller's channel uniformly. Setting the "correct" bits can have a huge impact on the PPC460EX and APM82181 that use this DMA engine in combination with a DesignWare' SATA-II core (sata_dwc_460ex driver). In the OpenWrt Forum, the user takimata reported that: |It seems your patch unleashed the full power of the SATA port. |Where I was previously hitting a really hard limit at around |82 MB/s for reading and 27 MB/s for writing, I am now getting this: | |root@OpenWrt:/mnt# time dd if=/dev/zero of=tempfile bs=1M count=1024 |1024+0 records in |1024+0 records out |real 0m 13.65s |user 0m 0.01s |sys 0m 11.89s | |root@OpenWrt:/mnt# time dd if=tempfile of=/dev/null bs=1M count=1024 |1024+0 records in |1024+0 records out |real 0m 8.41s |user 0m 0.01s |sys 0m 4.70s | |This means: 121 MB/s reading and 75 MB/s writing! | |The drive is a WD Green WD10EARX taken from an older MBL Single. |I repeated the test a few times with even larger files to rule out |any caching, I'm still seeing the same great performance. OpenWrt is |now completely on par with the original MBL firmware's performance. Another user And.short reported: |I can report that your fix worked! Boots up fine with two |drives even with more partitions, and no more reboot on |concurrent disk access! A closer look into the sata_dwc_460ex code revealed that the driver did initally set the correct protection control bits. However, this feature was lost when the sata_dwc_460ex driver was converted to the generic DMA driver framework. BugLink: https://forum.openwrt.org/t/wd-mybook-live-duo-two-disks/16195/55 BugLink: https://forum.openwrt.org/t/wd-mybook-live-duo-two-disks/16195/50 Fixes: 8b3444852a2b ("sata_dwc_460ex: move to generic DMA driver") Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Christian Lamparter <chunkeey@gmail.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>
| | * | dt-bindings: dmaengine: dw-dmac: add protection control propertyChristian Lamparter2018-11-243-1/+21
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch for the DesignWare AHB Central Direct Memory Access Controller adds the dma protection control property: "snps,dma-protection-control" as well as the properties specific values defines into a new include file: include/dt-bindings/dma/dw-dmac.h Note: The protection control signals are one-to-one mapped to the AHB HPROT[1:3] signals for this controller. The HPROT0 (Data Access) is always hardwired to 1. Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Christian Lamparter <chunkeey@gmail.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | Merge branch 'topic/dmatest' into for-linusVinod Koul2018-12-312-59/+349
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| | * | dmaengine: Documentation: Add documentation for multi chan testingSeraj Alijan2018-12-171-6/+103
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Modify documentation to add multi channel testing support. Signed-off-by: Seraj Alijan <seraj.alijan@sondrel.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>
| | * | dmaengine: dmatest: Add transfer_size parameterSeraj Alijan2018-12-171-6/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Existing transfer size "len" is either generated randomly or set to the size of test_buf_size. In some cases we need to explicitly specify a transfer size that is different from the buffer size and non aligned to test the target device's ability to handle unaligned transfers. This patch adds optional parameter "transfer_size" to allow setting explicit transfer size for dma transfers. Signed-off-by: Seraj Alijan <seraj.alijan@sondrel.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>
| | * | dmaengine: dmatest: Add alignment parameterSeraj Alijan2018-12-171-4/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add parameter "alignment" to allow setting the address alignment manually. Having the ability to configure address alignment from user space adds new testing capabilities where different alignments can be configured for testing without having to modify the dma device alignment properties. If configured, the alignment value will override the device alignment property of the target device. Signed-off-by: Seraj Alijan <seraj.alijan@sondrel.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>
| | * | dmaengine: dmatest: Use fixed point div to calculate iopsSeraj Alijan2018-12-171-3/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use fixed point division to calculate iops to prevent reporting 0 iops when operations last for longer than a second. Signed-off-by: Seraj Alijan <seraj.alijan@sondrel.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>
| | * | dmaengine: dmatest: Add support for multi channel testingSeraj Alijan2018-12-171-19/+177
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for running tests on multiple channels simultaneously as the driver currently limits to 1 channel per test run. This will add support for stress testing DMA controllers with multi channel capabilities. This is done by adding a callback function to the "channel" parameter that registers the requested channel prior to the "run" parameter being set to 1. Each time the "channel" parameter is populated with a new dma channel, a new test is appended to the thread queue. Once the "run" parameter is set to 1, the test will kick start all pending threads. Signed-off-by: Seraj Alijan <seraj.alijan@sondrel.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>
| | * | dmaengine: dmatest: fix a small memory leak in dmatest_func()Dan Carpenter2018-12-051-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We recently moved the test size tests around but it means we need to adjust the error handling as well or we leak the "pq_coefs" memory. I updated the label name to reflect that we're freeing coefs. Fixes: 787d3083caf8 ("dmaengine: dmatest: move size checks earlier in function") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>
| | * | dmaengine: dmatest: move size checks earlier in functionAlexandru Ardelean2018-11-241-13/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There's no need to allocate all that memory if these sizes are invalid anyway. Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>
| | * | dmaengine: dmatest: use dmaengine_terminate_sync() insteadAlexandru Ardelean2018-11-241-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The `dmaengine_terminate_all()` is marked as deprecated, so update the test with `dmaengine_terminate_sync()` which is the recommended alternative. Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>
| | * | dmaengine: dmatest: unmap data on a single code-path when xfer doneAlexandru Ardelean2018-11-241-4/+2
| | |/ | | | | | | | | | | | | | | | | | | | | | After the DMA transfer is done, we don't need to call the un-mapping code in 3 places. One is enough. Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | Merge branch 'topic/dirn_remove' into for-linusVinod Koul2018-12-314-32/+111
| |\ \
| | * | dmaengine: ste_dma40: remove dma_slave_config direction usageVinod Koul2018-11-241-6/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dma_slave_config direction was marked as deprecated quite some time back, remove the usage from this driver so that the field can be removed Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org>
| | * | dmaengine: pl330: remove dma_slave_config direction usageVinod Koul2018-11-241-4/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dma_slave_config direction was marked as deprecated quite some time back, remove the usage from this driver so that the field can be removed Signed-off-by: Vinod Koul <vkoul@kernel.org>
| | * | dmaengine: imx-sdma: remove dma_slave_config direction usage and leave ↵Vinod Koul2018-11-241-17/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | sdma_event_enable() dma_slave_config direction was marked as deprecated quite some time back, remove the usage from this driver so that the field can be removed ENBLn bit should be set before any dma request triggered, please refer to the below information from i.mx6sololite RM. Otherwise, spi/uart test will be fail because there is dma request from tx fifo always before dmaengine_prep_slave_sg() in where ENBLn set and violate the below rule. https://www.nxp.com/docs/en/reference-manual/IMX6SLRM.pdf: 40.8.28 Channel Enable RAM (SDMAARM_CHNENBLn) "It is thus essential for the Arm platform to program them before any DMA request is triggered to the SDMA, otherwise an unpredictable combination of channels may be started". Signed-off-by: Robin Gong <yibin.gong@nxp.com> [vkoul: sqashed patch from Robin into direction change] Signed-off-by: Vinod Koul <vkoul@kernel.org>
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