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*---------. Merge remote-tracking branches 'spi/topic/bus-num', 'spi/topic/cleanup', ↵Mark Brown2014-03-3020-289/+175
|\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | 'spi/topic/clps711x', 'spi/topic/coldfire', 'spi/topic/completion' and 'spi/topic/davinci' into spi-next
| | | | | | * spi: davinci: Use of_match_ptr at appropriate placeAxel Lin2014-02-061-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It's pointless to use of_match_ptr within CONFIG_OF guard. Use of_match_ptr around davinci_spi_of_match when setting .of_match_table. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | | | * spi: davinci: Remove unneeded NULL checking for dspi and dspi->bitbang.masterAxel Lin2014-02-061-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | spi_master_get_devdata() never returns NULL when spi_alloc_master() success, so remove NULL test for dspi. We have ensured master is not NULL before assigning it to dspi->bitbang.master. So also remove NULL test for dspi->bitbang.master. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | | * | spi: Use reinit_completion at appropriate placesAxel Lin2014-02-104-4/+7
| | | | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Calling init_completion() once is enough. For the rest of the iterations, call reinit_completion() instead. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | * | spi: coldfire-qspi: Simplify the code to set register bits for transfer speedAxel Lin2014-03-251-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | spi core will use spi->max_speed_hz as transfer speed if the transfer speed was not set. So we don't need to test t->speed_hz in mcfqspi_transfer_one(). Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | * | spi: coldfire-qspi: Prevent NULL pointer dereferenceAxel Lin2014-03-101-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If pdata->cs_control is NULL, we will hit NULL pointer dereference in mcfqspi_cs_select() and mcfqspi_cs_deselect(). Thus add NULL test for pdata->cs_control in probe(). Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | * | spi: coldfire-qspi: Enable clock before calling spi_master_resumeAxel Lin2014-03-101-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This ensures clock has been enabled before calling spi_master_resume(). while at it, also add checking return value of spi_master_suspend and spi_master_resume because they may fail. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | * | spi: coldfire-qspi: Use core message handlingAxel Lin2014-03-051-47/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert to use default implementation of transfer_one_message(). Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | * | spi: coldfire-qspi: Remove unused dev field from struct mcfqspiAxel Lin2014-03-051-6/+2
| | | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Also remove unused *res variable in mcfqspi_remove(). Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | * | spi: clps711x: Convert to use master->max_speed_hzAxel Lin2014-03-271-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set highest transfer speed to master->max_speed_hz and then we can remove hw->max_speed. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | * | spi: clps711x: Enable driver compilation with COMPILE_TESTAxel Lin2014-03-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This helps increasing build testing coverage. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | * | spi: clps711x: Remove <mach/hardware.h> dependencyAlexander Shiyan2014-03-251-29/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes <mach/hardware.h> dependency. This is performed by replace hard coded used memory regions and interrupt to getting these values from resources passed to the driver. For the system-wide registers we now able to use SYSCON driver. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | * | spi: clps711x: Remove duplicate code to set default bits_per_word and max speedAxel Lin2014-03-131-5/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the implementation of __spi_validate(), spi core will set transfer bits_per_word and max speed as spi device default if it is not set for this transfer. So we can remove the same logic in spi_clps711x_setup_xfer() and spi_clps711x_transfer_one(). Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | * | spi: clps711x: Provide label argument for devm_gpio_requestAxel Lin2014-03-101-7/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The label argument was removed by commit 989847967cd762 spi: clps711x: Use devm_gpio_request(), add it back. This makes it easier to know the gpio usage in /sys/kernel/debug/gpio. Also remove unnecessary gpio_is_valid() checking, devm_gpio_request() returns error if the requested gpio is invalid. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | * | spi: clps711x: Refactor to use core message parsingAxel Lin2014-02-201-52/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert to use default implementation of transfer_one_message() which provides standard handling of delays and chip select management. Signed-off-by: Axel Lin <axel.lin@ingics.com> Tested-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | * | spi: clps711x: Use SPI-core "cs_gpios" property for storing GPIOsAlexander Shiyan2014-02-031-17/+14
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | * | spi: clps711x: Add support for 1-8 BPW transfersAlexander Shiyan2014-02-031-23/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for 1 to 8 BPW to driver and removes excess BPW validation since this is already checked by SPI core. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | * | spi: clps711x: Simplify handling of RX & TX buffersAlexander Shiyan2014-02-031-10/+7
| | | |/ | | | | | | | | | | | | | | | | Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Mark Brown <broonie@linaro.org>
| | * | spi: Remove duplicate code to check chip_selectAxel Lin2014-02-127-29/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In spi_add_device(), we have the code to validate spi->chip_select. So remove the duplicate code in various drivers. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | * | spi: tegra20-slink: Convert to use master->max_speed_hzAxel Lin2014-02-111-13/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use master->max_speed_hz instead of tspi->spi_max_frequency, so spi core will handle checking transfer speed. In additional, since commit 052eb2d49006 'spi: core: Set max_speed_hz of spi_device default to max_speed_hz of controller', spi core will also set default spi->max_speed_hz if it is not set. So remove the duplicate code in tegra_slink_setup. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | * | spi: tegra20-sflash: Convert to use master->max_speed_hzAxel Lin2014-02-111-21/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use master->max_speed_hz instead of tspi->spi_max_frequency, so spi core will handle checking transfer speed. In additional, since commit 052eb2d49006 'spi: core: Set max_speed_hz of spi_device default to max_speed_hz of controller', spi core will also set default spi->max_speed_hz if it is not set. So remove tegra_sflash_setup(). Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | * | spi: tegra114: Convert to use master->max_speed_hzAxel Lin2014-02-111-16/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use master->max_speed_hz instead of tspi->spi_max_frequency, so spi core will handle checking transfer speed. In additional, since commit 052eb2d49006 'spi: core: Set max_speed_hz of spi_device default to max_speed_hz of controller', spi core will also set default spi->max_speed_hz if it is not set. So remove the duplicate code in tegra_spi_setup. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | * | spi: core: Set max_speed_hz of spi_device default to max_speed_hz of controllerAxel Lin2014-02-101-0/+3
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In __spi_validate(), xfer->speed_hz is set to be spi->max_speed_hz if it is not set for this transfer. However, if spi->max_speed_hz is also not set, xfer->speed_hz is 0. Some drivers (e.g. au1550, tegra114, tegra20-sflash, tegra20-slink, etc.) then use below code to avoid setting xfer->speed_hz to 0. /* Set speed to the spi max fequency if spi device has not set */ spi->max_speed_hz = spi->max_speed_hz ? : tspi->spi_max_frequency; Let's handle it in spi core. If spi->max_speed_hz is not set, make it default to spi->master->max_speed_hz. So In __spi_validate() if both xfer->speed_hz and spi->max_speed_hz are not set, xfer->speed_hz will be set to spi->master->max_speed_hz. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| * / spi: Remove explictly set bus_num and num_chipselect to default settingAxel Lin2014-02-169-14/+0
| |/ | | | | | | | | | | | | | | | | | | | | | | | | The purpose of commit 1e8a52e18cfb "spi: By default setup spi_masters with 1 chipselect and dynamics bus number" is to avoid setting default value for bus_num and num_chipselect in spi master drivers. So let's remove the duplicate code. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-By: David Daney <david.daney@cavium.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@linaro.org>
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*-------------. \ Merge remote-tracking branches 'spi/topic/altera', 'spi/topic/atmel', ↵Mark Brown2014-03-3013-71/+31
|\ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'spi/topic/au1550', 'spi/topic/bcm63xx', 'spi/topic/bcm63xx-hsspi', 'spi/topic/bfin5xx', 'spi/topic/bitbang' and 'spi/topic/bpw' into spi-next
| | | | | | | | * | spi: Use SPI_BPW_MASK macro at appropriate placesAxel Lin2014-02-072-2/+4
| | | | | | | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | | | | * / spi: bitbang: Make spi_bitbang_stop() return voidAxel Lin2014-03-295-12/+7
| | | | | | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | spi_bitbang_stop() never fails, so make it return void. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | | | * | spi: bfin5xx: Remove unused last_transfer pointer in bfin_spi_giveback()Axel Lin2014-02-141-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | | | * | spi: bfin5xx: Remove duplicate code to check spi->modeAxel Lin2014-02-141-4/+0
| | | | | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This checking is already done in the implementation of spi_setup(). Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | | * / spi: bcm63xx-hsspi: Use SIMPLE_DEV_PM_OPS macroJingoo Han2014-03-051-3/+2
| | | | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use SIMPLE_DEV_PM_OPS macro in order to make the code simpler. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | * / spi: bcm63xx: Remove unused define for PFXAxel Lin2014-03-251-2/+0
| | | | |/ | | | | | | | | | | | | | | | | | | | | Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | * / spi: au1550: Convert to let spi core handle checking transfer speedAxel Lin2014-02-141-26/+4
| | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | By setting master->max_speed_hz and master->min_speed_hz, spi core will handle checking transfer speed. So we can remove the same checking in this driver. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | * | spi: atmel: fix printk format warningsRandy Dunlap2014-03-211-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix printk format warning by using %p extension 'ad' for dma_addr_t. drivers/spi/spi-atmel.c:1228:3: warning: format '%x' expects argument of type 'unsigned int', but argument 7 has type 'dma_addr_t' [-Wformat] drivers/spi/spi-atmel.c:1228:3: warning: format '%x' expects argument of type 'unsigned int', but argument 9 has type 'dma_addr_t' [-Wformat] Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | * | spi: atmel: adopt pinctrl supportWenyou Yang2014-03-051-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Amend the spi atmel pin controller to optionally take a pin control handle and set the state of the pins to: - "default" on boot, resume and before performing an spitransfer - "sleep" on suspend() This should make it possible to optimize energy usage for the pins both for the suspend/resume cycle Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | * | spi: atmel: Let spi core handle validating transfer lengthAxel Lin2014-03-031-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | spi core will handle validating transfer length since commit 4d94bd21b333 "spi: core: Validate length of the transfers in message". So remove the same checking in this driver. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | * | spi: atmel: Remove redundant list_empty checkingAxel Lin2014-03-031-3/+0
| | |/ | | | | | | | | | | | | | | | | | | This checking is already done in __spi_validate(). Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| * | spi: altera: Remove the code to get unused platform_dataAxel Lin2014-03-211-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | The definition of struct altera_spi_platform_data does not exist in current tree. So remove the code to get platform_data which is never used. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| * | spi: altera: Use bits_per_word_maskAxel Lin2014-03-131-0/+1
| |/ | | | | | | | | | | | | | | | | This driver does not work for bits_per_word greater than 16. Set bits_per_word_mask so spi core will reject transfers that attempt to use an unsupported bits_per_word value. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
* | Merge remote-tracking branch 'spi/topic/dma' into spi-nextMark Brown2014-03-303-108/+310
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| * | spi: Make max_tx and max_rx the same typeMark Brown2014-02-121-1/+1
| | | | | | | | | | | | | | | | | | Prevents spurious compiler warnings. Signed-off-by: Mark Brown <broonie@linaro.org>
| * | spi: Make core DMA mapping functions generate scatterlistsMark Brown2014-02-043-28/+94
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We cannot unconditionally use dma_map_single() to map data for use with SPI since transfers may exceed a page and virtual addresses may not be provided with physically contiguous pages. Further, addresses allocated using vmalloc() need to be mapped differently to other addresses. Currently only the MXS driver handles all this, a few drivers do handle the possibility that buffers may not be physically contiguous which is the main potential problem but many don't even do that. Factoring this out into the core will make it easier for drivers to do a good job so if the driver is using the core DMA code then generate a scatterlist instead of mapping to a single address so do that. This code is mainly based on a combination of the existing code in the MXS and PXA2xx drivers. In future we should be able to extend it to allow the core to concatenate adjacent transfers if they are compatible, improving performance. Currently for simplicity clients are not allowed to use the scatterlist when they do DMA mapping, in the future the existing single address mappings will be replaced with use of the scatterlist most likely as part of pre-verifying transfers. This change makes it mandatory to use scatterlists when using the core DMA mapping so update the s3c64xx driver to do this when used with dmaengine. Doing so makes the code more ugly but it is expected that the old s3c-dma code can be removed very soon. Signed-off-by: Mark Brown <broonie@linaro.org>
| * | spi: Provide core support for full duplex devicesMark Brown2014-02-042-0/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is fairly common for SPI devices to require that one or both transfer directions is always active. Currently drivers open code this in various ways with varying degrees of efficiency. Start factoring this out by providing flags SPI_MASTER_MUST_TX and SPI_MASTER_MUST_RX. These will cause the core to provide buffers for the requested direction if none are specified in the underlying transfer. Currently this is fairly inefficient since we actually allocate a data buffer which may get large, support for mapping transfers using a scatterlist will allow us to avoid this for DMA based transfers. Signed-off-by: Mark Brown <broonie@linaro.org>
| * | spi/s3c64xx: Split wait_for_xfer() into PIO and DMA versionsMark Brown2014-02-041-77/+89
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no meaningful code sharing between the PIO and DMA variants (just the timeout calculation) so in order to make the code easier to work with split the two cases. Looking at the code it is not clear how the PIO version works for large transmits, greater than FIFO size is only handled for RX. Signed-off-by: Mark Brown <broonie@linaro.org>
| * | spi/s3c64xx: Remove unused /CS GPIO managementMark Brown2014-02-041-29/+0
| | | | | | | | | | | | | | | | | | | | | | | | The GPIO enable and disable is done in the core so does not need to be replicated in the driver, delete the unneeded code. enable_cs() was not referenced at all. Signed-off-by: Mark Brown <broonie@linaro.org>
| * | spi: Provide core support for DMA mapping transfersMark Brown2014-02-032-0/+100
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The process of DMA mapping buffers for SPI transfers does not vary between devices so in order to save duplication of code in drivers this can be factored out into the core, allowing it to be integrated with the work that is being done on factoring out the common elements from the data path including more sharing of dmaengine code. In order to use this masters need to provide a can_dma() operation and while the hardware is prepared they should ensure that DMA channels are provided in tx_dma and rx_dma. The core will then ensure that the buffers are mapped for DMA prior to calling transfer_one_message(). Currently the cleanup on error is not complete, this needs to be improved. Signed-off-by: Mark Brown <broonie@linaro.org>
* | Merge remote-tracking branch 'spi/topic/core' into spi-nextMark Brown2014-03-301-18/+28
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| * | spi: Do not require a completionMark Brown2014-03-251-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | There is no real reason why we require transfers to have a completion and the only user of the completion now checks to see if one has been provided before using it so stop enforcing this. This makes it more convenient for drivers to chain multiple asynchronous transfers together. Signed-off-by: Mark Brown <broonie@linaro.org>
| * | spi: core: Use master->max_speed_hz as transfer speed when xfer->speed_hz > ↵Axel Lin2014-03-171-8/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | master->max_speed_hz When xfer->speed_hz is greater than master->max_speed_hz, it's generally safe to use master->max_speed_hz as transfer speed. Thus use master->max_speed_hz as transfer speed rather than return error when xfer->speed_hz > master->max_speed_hz. Signed-off-by: Axel Lin <axel.lin@ingics.com> Tested-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Mark Brown <broonie@linaro.org>
| * | spi: core: make zero length transfer valid againAtsushi Nemoto2014-03-041-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Zero length transfer becomes invalid since "spi: core: Validate length of the transfers in message" commit, but it should be valid to support an odd device, for example, which requires long delay between chipselect and the first transfer, etc. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| * | spi: core: Replace msleep with usleep_range to get more accurate sleep timeAxel Lin2014-02-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes below checkpatch warning: WARNING: msleep < 20ms can sleep for up to 20ms; see Documentation/timers/timers-howto.txt + msleep(10); Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
generated by cgit v1.2.3 (git 2.39.1) at 2025-01-20 18:47:39 +0100