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* drivers: clk: st: Correct the pll-type for A9 for stih418Gabriel Fernandez2015-10-091-0/+1
* ARM: STi: DT: Rename st_pll3200c32_407_c0_x into st_pll3200c32_cx_xGabriel Fernandez2015-07-221-2/+2
* clk: st: Spelling s/stucture/structure/Geert Uytterhoeven2014-10-291-1/+1
* clk: st: Adds Flexgen clock bindingGabriel FERNANDEZ2014-07-292-0/+124
* clk: st: Update ST clock binding documentationGabriel FERNANDEZ2014-07-297-68/+94
* clk: st: Adds quadfs clock bindingGabriel FERNANDEZ2014-03-251-0/+45
* clk: st: Adds clockgen-vcc and clockgen-mux clock bindingGabriel FERNANDEZ2014-03-252-0/+89
* clk: st: Adds clockgen clock bindingGabriel FERNANDEZ2014-03-251-0/+48
* clk: st: Adds divmux and prediv clock bindingGabriel FERNANDEZ2014-03-253-0/+168