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* dt-bindings: cpufreq: cpufreq-qcom-hw: Add SM4450 compatiblesTengfei Fan2024-04-261-0/+2
| | | | | | | | | Add compatible for EPSS CPUFREQ-HW on SM4450. Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com> Reviewed-by: Bjorn Andersson <quic_bjorande@quicinc.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
* dt-bindings: cpufreq: qcom-hw: document SM8650 CPUFREQ HardwareNeil Armstrong2023-10-251-0/+1
| | | | | | | Document the CPUFREQ Hardware on the SM8650 Platform. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
* dt-bindings: cpufreq: cpufreq-qcom-hw: Add SDX75 compatibleRohit Agarwal2023-10-161-0/+1
| | | | | | | | | Add compatible for EPSS CPUFREQ-HW on SDX75. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Manivannan Sadhasivam <mani@kernel.org> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
* dt-bindings: cpufreq: cpufreq-qcom-hw: add SDM670 compatibleRichard Acayan2023-09-281-0/+2
| | | | | | | | | | The bindings for Qualcomm CPU frequency have a compatible for each SoC. Add the compatible for SDM670. Fixes: 0c665213d126 ("arm64: dts: qcom: sdm670: add cpu frequency scaling") Signed-off-by: Richard Acayan <mailingradian@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
* dt-bindings: cpufreq: qcom-hw: add a 4th frequency domainNeil Armstrong2023-08-231-1/+4
| | | | | | | | | On new platforms, a 4th frequency domain is used, document it. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Acked-by: Manivannan Sadhasivam <mani@kernel.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
* dt-bindings: cpufreq: cpufreq-qcom-hw: Add QCM2290Konrad Dybcio2023-03-301-0/+24
| | | | | | | | | Document the OSM CPUFREQ_HW present on QCM2290, featuring just one lonely frequency domain. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
* dt-bindings: cpufreq: cpufreq-qcom-hw: Sanitize data per compatibleKonrad Dybcio2023-03-301-1/+89
| | | | | | | | | Introduce per-SoC compatibles for OSM targets (read: pre-sm8250) and sanitize the number of interrupt{s,-names} and reg/-names per-compatible. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
* dt-bindings: cpufreq: cpufreq-qcom-hw: Allow just 1 frequency domainKonrad Dybcio2023-03-301-2/+2
| | | | | | | | | Some SoCs implementing CPUFREQ-HW only have a single frequency domain. Allow such case. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
* dt-bindings: cpufreq: qcom-hw: add a compatible for sa8775pBartosz Golaszewski2023-03-131-0/+1
| | | | | | | | Add the compatible for the cpufreq engine present on sa8775p platforms. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
* Merge tag 'cpufreq-arm-updates-6.3' of ↵Rafael J. Wysocki2023-02-141-0/+5
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm Pull cpufreq ARM updates for 6.3 from Viresh Kumar: "- Enable thermal cooling for Tegra194 (Yi-Wei Wang). - Register module device table and add missing compatibles for cpufreq-qcom-hw (Nícolas F. R. A. Prado, Abel Vesa and Luca Weiss). - Various dt binding updates for qcom-cpufreq-nvmem and opp-v2-kryo-cpu (Christian Marangi)." * tag 'cpufreq-arm-updates-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm: dt-bindings: opp: opp-v2-kryo-cpu: enlarge opp-supported-hw maximum dt-bindings: cpufreq: qcom-cpufreq-nvmem: make cpr bindings optional dt-bindings: cpufreq: qcom-cpufreq-nvmem: specify supported opp tables dt-bindings: cpufreq: cpufreq-qcom-hw: Add SM8550 compatible dt-bindings: cpufreq: cpufreq-qcom-hw: Add missing compatibles cpufreq: mediatek-hw: Register to module device table cpufreq: tegra194: Enable CPUFREQ thermal cooling
| * dt-bindings: cpufreq: cpufreq-qcom-hw: Add SM8550 compatibleAbel Vesa2023-02-061-0/+1
| | | | | | | | | | | | | | | | | | Add compatible for EPSS CPUFREQ-HW on SM8550. Also document the interrupts. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
| * dt-bindings: cpufreq: cpufreq-qcom-hw: Add missing compatiblesLuca Weiss2023-02-061-0/+4
| | | | | | | | | | | | | | | | Document the cpufreq-epss compatibles currently used in the tree, plus the sc7280 which will be added in a separate commit. Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
* | dt-bindings: cpufreq: cpufreq-qcom-hw: document interruptsKrzysztof Kozlowski2023-01-041-0/+11
|/ | | | | | | | | | | | The Qualcomm Soc cpufreq hardware engine has LMh/thermal throttling interrupts (already present in SM8250 and SM8450 DTS) and Linux driver uses them: sm8250-hdk.dtb: cpufreq@18591000: 'interrupt-names', 'interrupts' do not match any of the regexes: 'pinctrl-[0-9]+' sm8450-qrd.dtb: cpufreq@17d91000: 'interrupt-names', 'interrupts' do not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
* dt-bindings: cpufreq: cpufreq-qcom-hw: Add QDU1000/QRU1000 cpufreqMelody Olvera2022-12-011-0/+1
| | | | | | | | Add cpufreq epss for QDU1000 and QRU1000 SoCs. Signed-off-by: Melody Olvera <quic_molvera@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
* dt-bindings: cpufreq: cpufreq-qcom-hw: Add cpufreq clock providerManivannan Sadhasivam2022-11-211-0/+12
| | | | | | | | | | | | | | | Qualcomm platforms making use of CPUFreq HW Engine (EPSS/OSM) supply clocks to the CPU cores. Document the same in the binding to reflect the actual implementation. CPUFreq HW will become the clock provider and CPU cores will become the clock consumers. The clock index for each CPU core is based on the frequency domain index. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
* dt-bindings: cpufreq: qcom: Add missing cache related propertiesRob Herring2022-11-071-0/+18
| | | | | | | | | The examples' cache nodes are incomplete as 'cache-unified' and 'cache-level' are required cache properties. Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
* dt-bindings: cpufreq: cpufreq-qcom-hw: Add SM6375 compatibleKonrad Dybcio2022-07-181-0/+1
| | | | | | | Add compatible for EPSS CPUFREQ-HW on SM6375. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
* dt-bindings: cpufreq: cpufreq-qcom-hw: Convert to YAML bindingsManivannan Sadhasivam2022-03-111-0/+201
Convert Qualcomm cpufreq devicetree binding to YAML. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
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