summaryrefslogtreecommitdiffstats
path: root/Documentation/devicetree/bindings/mtd (follow)
Commit message (Collapse)AuthorAgeFilesLines
* Merge tag 'for-linus-20170713' of git://git.infradead.org/linux-mtdLinus Torvalds2017-07-1310-15/+79
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MTD updates from Brian Norris: "General updates: - Cleanups and additional flash support for "dataflash" driver - new driver for mchp23k256 SPI SRAM device - improve handling of MTDs without eraseblocks (i.e., MTD_NO_ERASE) - refactor and improve "sub-partition" handling with TRX partition parser; partitions can now be created as sub-partitions of another partition SPINOR updates, from Cyrille Pitchen and Marek Vasut: - introduce support to the SPI 1-2-2 and 1-4-4 protocols. - introduce support to the Double Data Rate (DDR) mode. - introduce support to the Octo SPI protocols. - add support to new memory parts for Spansion, Macronix and Winbond. - add fixes for the Aspeed, STM32 and Cadence QSPI controler drivers. - clean up the st_spi_fsm driver. NAND updates, from Boris Brezillon: - addition of on-die ECC support to Micron driver - addition of helpers to help drivers choose most appropriate ECC settings - deletion of dead-code (cached programming and ->errstat() hook) - make sure drivers that do not support the SET/GET FEATURES command return ENOTSUPP use a dummy ->set/get_features implementation returning -ENOTSUPP (required for Micron on-die ECC) - change the semantic of ecc->write_page() for drivers setting the NAND_ECC_CUSTOM_PAGE_ACCESS flag - support exiting 'GET STATUS' command in default ->cmdfunc() implementations - change the prototype of ->setup_data_interface() A bunch of driver related changes: - various cleanup, fixes and improvements of the MTK driver - OMAP DT bindings fixes - support for ->setup_data_interface() in the fsmc driver - support for imx7 in the gpmi driver - finalization of the denali driver rework (thanks to Masahiro for the work he's done on this driver) - fix "bitflips in erased pages" handling in the ifc driver - addition of PM ops and dynamic timing configuration to the atmel driver" * tag 'for-linus-20170713' of git://git.infradead.org/linux-mtd: (118 commits) Documentation: ABI: mtd: describe "offset" more precisely mtd: Fix check in mtd_unpoint() mtd: nand: mtk: release lock on error path mtd: st_spi_fsm: remove SPINOR_OP_RDSR2 and use SPINOR_OP_RDCR instead mtd: spi-nor: cqspi: remove duplicate const mtd: spi-nor: Add support for Spansion S25FL064L mtd: spi-nor: Add support for mx66u51235f mtd: nand: mtk: add ->setup_data_interface() hook mtd: nand: mtk: remove unneeded mtk_ecc_hw_init from mtk_ecc_resume mtd: nand: mtk: remove unneeded mtk_nfc_hw_init from mtk_nfc_resume mtd: nand: mtk: disable ecc irq when writing page with hwecc mtd: nand: mtk: fix incorrect register setting order about ecc irq mtd: partitions: fixup some allocate_partition() whitespace mtd: parsers: trx: fix pr_err format for printing offset MAINTAINERS: Update SPI NOR subsystem git repositories mtd: extract TRX parser out of bcm47xxpart into a separated module mtd: partitions: add support for partition parsers mtd: partitions: add support for subpartitions mtd: partitions: rename "master" to the "parent" where appropriate mtd: partitions: remove sysfs files when deleting all master's partitions ...
| * Merge tag 'nand/for-4.13' into MTDBrian Norris2017-07-088-9/+35
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From Boris: """ This pull request contains the following core changes: * addition of on-ecc support to Micron driver * addition of helpers to help drivers choose most appropriate ECC settings * deletion of dead-code (cached programming and ->errstat() hook) * make sure drivers that do not support the SET/GET FEATURES command return ENOTSUPP use a dummy ->set/get_features implementation returning -ENOTSUPP (required for Micron on-die ECC) * change the semantic of ecc->write_page() for drivers setting the NAND_ECC_CUSTOM_PAGE_ACCESS flag * support exiting 'GET STATUS' command in default ->cmdfunc() implementations * change the prototype of ->setup_data_interface() A bunch of driver related changes: * various cleanup, fixes and improvements of the MTK driver * OMAP DT bindings fixes * support for ->setup_data_interface() in the fsmc driver * support for imx7 in the gpmi driver * finalization of the denali driver rework (thanks to Masahiro for the work he's done on this driver) * fix "bitflips in erased pages" handling in the ifc driver * addition of PM ops and dynamic timing configuration to the atmel driver And as usual we also have a few minor cleanup/fixes/improvements patches across the subsystem. """
| | * dt-bindings: gpmc: Correct location of generic gpmc bindingTom Rini2017-06-223-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The binding bus/ti-gpmc.txt has been moved to memory-controllers/omap-gpmc.txt. Update all references to this in order to make reading and understanding a given binding easier. Cc: David Woodhouse <dwmw2@infradead.org> Cc: Brian Norris <computersforpeace@gmail.com> Cc:Boris Brezillon <boris.brezillon@free-electrons.com> Cc: Marek Vasut <marek.vasut@gmail.com> Cc: Richard Weinberger <richard@nod.at> Cc: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * dt-bindings: mtd: elm: Correct compatible string requirementTom Rini2017-06-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The binding says that the compatible string must be "ti,am33xx-elm" but the code checks only for, and all functioning users set, this as "ti,am3352-elm" so correct the binding. Cc: David Woodhouse <dwmw2@infradead.org> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Boris Brezillon <boris.brezillon@free-electrons.com> Cc: Marek Vasut <marek.vasut@gmail.com> Cc: Richard Weinberger <richard@nod.at> Cc: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * mtd: nand: denali_dt: add compatible strings for UniPhier SoC variantsMasahiro Yamada2017-06-101-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add two compatible strings for UniPhier SoC family. "socionext,uniphier-denali-nand-v5a" is used on UniPhier sLD3, LD4, Pro4, sLD8. "socionext,uniphier-denali-nand-v5b" is used on UniPhier Pro5, PXs2, LD6b, LD11, LD20. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * mtd: nand: denali: avoid hard-coding ECC step, strength, bytesMasahiro Yamada2017-06-101-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This driver was originally written for the Intel MRST platform with several platform-specific parameters hard-coded. Currently, the ECC settings are hard-coded as follows: #define ECC_SECTOR_SIZE 512 #define ECC_8BITS 14 #define ECC_15BITS 26 Therefore, the driver can only support two cases. - ecc.size = 512, ecc.strength = 8 --> ecc.bytes = 14 - ecc.size = 512, ecc.strength = 15 --> ecc.bytes = 26 However, these are actually customizable parameters, for example, UniPhier platform supports the following: - ecc.size = 1024, ecc.strength = 8 --> ecc.bytes = 14 - ecc.size = 1024, ecc.strength = 16 --> ecc.bytes = 28 - ecc.size = 1024, ecc.strength = 24 --> ecc.bytes = 42 So, we need to handle the ECC parameters in a more generic manner. Fortunately, the Denali User's Guide explains how to calculate the ecc.bytes. The formula is: ecc.bytes = 2 * CEIL(13 * ecc.strength / 16) (for ecc.size = 512) ecc.bytes = 2 * CEIL(14 * ecc.strength / 16) (for ecc.size = 1024) For DT platforms, it would be reasonable to allow DT to specify ECC strength by either "nand-ecc-strength" or "nand-ecc-maximize". If none of them is specified, the driver will try to meet the chip's ECC requirement. For PCI platforms, the max ECC strength is used to keep the original behavior. Newer versions of this IP need ecc.size and ecc.steps explicitly set up via the following registers: CFG_DATA_BLOCK_SIZE (0x6b0) CFG_LAST_DATA_BLOCK_SIZE (0x6c0) CFG_NUM_DATA_BLOCKS (0x6d0) For older IP versions, write accesses to these registers are just ignored. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * mtd: nand: mediatek: update DT bindingsXiaolei Li2017-06-011-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | Add MT2712 NAND Flash Controller dt bindings documentation. Signed-off-by: Xiaolei Li <xiaolei.li@mediatek.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * mtd: gpmi: document current clock requirementsStefan Agner2017-06-011-1/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | The clock requirements are completely missing, add the clocks currently required by the driver. Signed-off-by: Stefan Agner <stefan@agner.ch> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * dt-bindings: mtd: document new "on-die" nand-ecc-modeThomas Petazzoni2017-05-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A number of NAND chips support a feature called on-die ECC, where the NAND chip itself is capable of doing error detection and correction. The new "on-die" value for nand-ecc-mode indicates that we want this functionality to be used. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Richard Weinberger <richard@nod.at> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| * | dt-bindings: mtd: make partitions doc a bit more genericBrian Norris2017-06-201-6/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the only documented partitioning is "fixed-partitions" but there are more methods in use that we may want to support in the future. Mention them and make it clear Fixed Partitions are just a single case. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Acked-by: Rob Herring <robh@kernel.org>
| * | mtd: mchp23k256: Add support for mchp23lcv1024Chris Packham2017-06-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The mchp23lcv1024 is similar to the mchp23k256, the differences (from a software point of view) are the capacity of the chip and the size of the addresses used. There is no way to detect the specific chip so we must be told via a Device Tree or default to mchp23k256 when device tree is not used. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | mtd: mchp23k256: Add OF device ID tableChris Packham2017-06-011-0/+18
| |/ | | | | | | | | | | | | | | | | | | | | This allows registering of this device via a Device Tree. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* / dt-bindings: mtd: atmel-nand: Document the nfc-io bindingsBoris Brezillon2017-05-311-0/+14
|/ | | | | | | | | | | SAMA5 SoCs embed an advanced NAND controller logic to automate READ/WRITE page accesses. This advanced logic is exposed through a separate I/O mem range and is thus represented in a different node with its own compatible. Document the bindings of this nfc-io block. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
* Merge tag 'for-linus-20170510' of git://git.infradead.org/linux-mtdLinus Torvalds2017-05-114-7/+154
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MTD updates from Brian Norris: "NAND, from Boris: - some minor fixes/improvements on existing drivers (fsmc, gpio, ifc, davinci, brcmnand, omap) - a huge cleanup/rework of the denali driver accompanied with core fixes/improvements to simplify the driver code - a complete rewrite of the atmel driver to support new DT bindings make future evolution easier - the addition of per-vendor detection/initialization steps to avoid extending the nand_ids table with more extended-id entries SPI NOR, from Cyrille: - fixes in the hisi, intel and Mediatek SPI controller drivers - fixes to some SPI flash memories not supporting the Chip Erase command. - add support to some new memory parts (Winbond, Macronix, Micron, ESMT). - add new driver for the STM32 QSPI controller And a few fixes for Gemini and Versatile platforms on physmap-of" * tag 'for-linus-20170510' of git://git.infradead.org/linux-mtd: (100 commits) MAINTAINERS: Update NAND subsystem git repositories mtd: nand: gpio: update binding mtd: nand: add ooblayout for old hamming layout mtd: oxnas_nand: Allocating more than necessary in probe() dt-bindings: mtd: Document the STM32 QSPI bindings mtd: mtk-nor: set controller's address width according to nor flash mtd: spi-nor: add driver for STM32 quad spi flash controller mtd: nand: brcmnand: Check flash #WP pin status before nand erase/program mtd: nand: davinci: add comment on NAND subpage write status on keystone mtd: nand: omap2: Fix partition creation via cmdline mtdparts mtd: nand: NULL terminate a of_device_id table mtd: nand: Fix a couple error codes mtd: nand: allow drivers to request minimum alignment for passed buffer mtd: nand: allocate aligned buffers if NAND_OWN_BUFFERS is unset mtd: nand: denali: allow to override revision number mtd: nand: denali_dt: use pdev instead of ofdev for platform_device mtd: nand: denali_dt: remove dma-mask DT property mtd: nand: denali: support 64bit capable DMA engine mtd: nand: denali_dt: enable HW_ECC_FIXUP for Altera SOCFPGA variant mtd: nand: denali: support HW_ECC_FIXUP capability ...
| * mtd: nand: gpio: update bindingChristophe Leroy2017-05-111-2/+2
| | | | | | | | | | | | | | | | | | | | This patch updates the binding documentation in accordance with commit 44dd182861f99 ("mtd: nand: gpio: make nCE GPIO optional") Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Reported-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * dt-bindings: mtd: Document the STM32 QSPI bindingsLudovic Barre2017-05-021-0/+43
| | | | | | | | | | | | | | | | | | This patch adds documentation of device tree bindings for the STM32 QSPI controller. Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: nand: denali_dt: remove dma-mask DT propertyMasahiro Yamada2017-04-251-2/+0
| | | | | | | | | | | | | | | | | | | | | | The driver sets appropriate DMA mask. Delete the "dma-mask" DT property. See [1] for negative comments for this binding. [1] https://lkml.org/lkml/2016/2/8/57 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| * mtd: nand: denali_dt: enable HW_ECC_FIXUP for Altera SOCFPGA variantMasahiro Yamada2017-04-251-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are various customizable parameters, so several variants for this IP. A generic compatible like "denali,denali-nand-dt" is useless. Moreover, there are multiple things wrong with this string. (Refer to Rob's comment [1]) The "denali,denali-nand-dt" was added by Altera for the SOCFPGA port. Replace it with a more specific string "altr,socfpga-denali-nand". There are no users (in upstream) of the old compatible string. The Denali IP on SOCFPGA incorporates the hardware ECC fixup engine. So, this capability should be associated with the compatible. [1] https://lkml.org/lkml/2016/12/1/450 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| * mtd: nand: atmel: Document the new DT bindingsBoris Brezillon2017-04-251-1/+106
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The old NAND bindings were not exactly describing the hardware topology and were preventing definitions of several NAND chips under the same NAND controller. New bindings address these limitations and should be preferred over the old ones for new SoCs/boards. Old bindings are still supported for backward compatibility but are marked deprecated in the doc. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Reviewed-by: Nicolas Ferre <nicolas.ferre@microchip.com> Acked-by: Rob Herring <robh@kernel.org>
* | Documentation: devicetree: mtd: add w25q64 to list of supported SPI flashesSekhar Nori2017-03-231-0/+1
|/ | | | | | | | | | W25Q64 is found on TI's AM335x ICEv2 board. Add it to list for supported SPI flash devices. This flash can be identified using JEDEC READ ID opcode. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
* dt-bindings: mtd: add a common label property to all mtd devicesCédric Le Goater2017-02-101-0/+15
| | | | | | | | | | | This can be used to easily identify a specific chip on a system with multiple chips. Signed-off-by: Cédric Le Goater <clg@kaod.org> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* Merge tag 'spi-nor/for-4.11-v2' of git://github.com/spi-nor/linuxBrian Norris2017-02-103-1/+60
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From Cyrille: """ This pull request contains the following notable changes: - add support to the 4-byte address instruction set. - add support to new memory parts. - add support to S3AN memories. - add support to the Intel SPI controller. - add support to the Aspeed AST2400 and AST2550 controllers. - fix max SPI transfer and message sizes in m25p80_read(). - fix the Candence QSPI driver. - fix the Freescale QSPI driver. """
| * Documentation: mtk-quadspi: update DT bindingsGuochun Mao2017-02-101-1/+7
| | | | | | | | | | | | | | | | | | Add "mediatek,mt2701-nor" for nor flash node's compatible. Signed-off-by: Guochun Mao <guochun.mao@mediatek.com> Acked-by: John Crispin <john@phrozen.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
| * mtd: spi-nor: add dt support for Everspin MRAMsUwe Kleine-König2017-02-101-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MR25 family doesn't support JEDEC, so they need explicit mentioning in the list of supported spi IDs. This makes it possible to add these using for example: compatible = "everspin,mr25h40"; There was already an entry for mr25h256. Move that one out of the "keep for compatibility" section and put in a new group for Everspin MRAMs. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
| * mtd: spi-nor: bindings for the Aspeed memory controllersCédric Le Goater2017-02-101-0/+51
| | | | | | | | | | | | Signed-off-by: Cédric Le Goater <clg@kaod.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
* | mtd: add DT bindings for the Cortina Systems Gemini FlashLinus Walleij2017-02-081-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds device tree bindings for the Cortina systems Gemini flash controller, a simple physmap which however need a few syscon bits to be poked to operate properly. Cc: Janos Laube <janos.dev@gmail.com> Cc: Paulius Zaleckas <paulius.zaleckas@gmail.com> Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: devicetree@vger.kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Marek Vasut <marek.vasut@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | mtd: nand: tango: Update DT binding descriptionMarc Gonzalez2017-01-031-3/+3
|/ | | | | | | | Visually separate register ranges (address/size pairs) in reg prop. Change DMA channel name, for consistency with other drivers. Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* mtd: nand: add tango NFC dt bindings docMarc Gonzalez2016-11-071-0/+38
| | | | | | | | Add the tango NAND Flash Controller dt bindings documentation. Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* dt-bindings: mtd: add DT binding for s3c2410 flash controllerSergio Prado2016-11-071-0/+56
| | | | | | | | | | Adds the device tree bindings description for Samsung S3C2410 and compatible NAND flash controller. Acked-by: Rob Herring <robh@kernel.org> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Sergio Prado <sergio.prado@e-labworks.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* mtd: nand: Add OX820 NAND SupportNeil Armstrong2016-10-221-0/+41
| | | | | | | | | | Add NAND driver to support the Oxford Semiconductor OX820 NAND Controller. This is a simple memory mapped NAND controller with single chip select and software ECC. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* mtd: nand: Add an option to maximize the ECC strengthBoris Brezillon2016-09-231-0/+9
| | | | | | | | | | | | | | | | | | | The generic NAND DT bindings allows one to tweak the ECC strength and step size to their need. It can be used to lower the ECC strength to match a bootloader/firmware config, but might also be used to get a better reliability. In the latter case, the user might want to use the maximum ECC strength without having to explicitly calculate the exact value (this value not only depends on the OOB size, but also on the NAND controller, and can be tricky to extract). Add a generic 'nand-ecc-maximize' DT property and the associated NAND_ECC_MAXIMIZE flag, to let ECC controller drivers select the best ECC strength and step-size on their own. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Rob Herring <robh@kernel.org>
* mtd: spi-nor: Bindings for Cadence Quad SPI Flash Controller driverGraham Moore2016-07-181-0/+56
| | | | | | | | | | | | | | | | | Add binding document for the Cadence QSPI controller. Signed-off-by: Graham Moore <grmoore@opensource.altera.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alan Tull <atull@opensource.altera.com> Cc: Brian Norris <computersforpeace@gmail.com> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Graham Moore <grmoore@opensource.altera.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Yves Vandervennet <yvanderv@opensource.altera.com> Cc: devicetree@vger.kernel.org Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* Merge tag 'nand/for-4.8' of github.com:linux-nand/linux into mtdBrian Norris2016-07-164-1/+168
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull NAND changes from Boris Brezillon: """ This pull request contains only one notable change: * Addition of the MTK NAND controller driver And a bunch of specific NAND driver improvements/fixes. Here are the changes that are worth mentioning: * A few fixes/improvements for the xway NAND controller driver * A few fixes for the sunxi NAND controller driver * Support for DMA in the sunxi NAND driver * Support for the sunxi NAND controller IP embedded in A23/A33 SoCs * Addition for bitflips detection in erased pages to the brcmnand driver * Support for new brcmnand IPs * Update of the OMAP-GPMC binding to support DMA channel description """
| * mtd: nand: sunxi: update DT bindingsIcenowy Zheng2016-07-111-0/+2
| | | | | | | | | | | | | | | | Document the reset lines Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| * mtd: mediatek: device tree bindings for MTKJorge Ramirez-Ortiz2016-07-111-0/+160
| | | | | | | | | | | | | | Documentation support for Smart Device Gen1 type of NAND controllers Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| * mtd: nand: sunxi: update DT bindingsBoris Brezillon2016-06-061-0/+4
| | | | | | | | | | | | | | | | | | Document dmas and dma-names properties. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| * mtd: brcmnand: Add v7.2 controller supportFlorian Fainelli2016-06-031-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 7.2 controller differs in a few area compared to its predecssor (7.1): - NAND scrambler, which we are not using just yet - higher ECC levels (up to 120 bits) per 1KB data blocks, also not supported yet - up to 128B OOB This patch adds the necessary code to support such a controller generation and updates the Device Tree binding. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Kamal Dasu <kdasu.kdev@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| * ARM: OMAP2+: Update GPMC and NAND DT binding documentationCooper Jr., Franklin2016-05-301-1/+1
| | | | | | | | | | | | | | | | | | Add additional details to the GPMC NAND documentation to clarify what is needed to enable NAND DMA prefetch. Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* | Documentation: atmel-quadspi: add binding file for Atmel QSPI driverCyrille Pitchen2016-07-141-0/+32
| | | | | | | | | | | | | | | | | | | | This patch documents the DT bindings for the driver of the Atmel QSPI controller embedded inside sama5d2x SoCs. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | mtd: spi-nor: add hisilicon spi-nor flash controller driverJiancheng Xue2016-07-141-0/+24
|/ | | | | | | | | | | | Add hisilicon spi-nor flash controller driver Signed-off-by: Binquan Peng <pengbinquan@hisilicon.com> Signed-off-by: Jiancheng Xue <xuejiancheng@hisilicon.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Reviewed-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* Merge tag 'for-linus-20160527' of git://git.infradead.org/linux-mtdLinus Torvalds2016-05-272-2/+3
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MTD fixes from Brian Norris: "We've already noticed a few flaws in the MTD work for v4.7-rc1: - The Atmel folks got ahead of themselves on trying to support their latest hardware and were working off incorrect documentation. Fix up the NAND driver to get this correct. - Fix up device tree example documentation to use the latest recommendations for describing NAND ECC algorithms" * tag 'for-linus-20160527' of git://git.infradead.org/linux-mtd: Documentation: dt: mtd: drop "soft_bch" from example Revert "mtd: atmel_nand: Support variable RB_EDGE interrupts"
| * Documentation: dt: mtd: drop "soft_bch" from exampleBaruch Siach2016-05-271-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | Commit 32698aafc9f0 (Documentation: devicetree: deprecate "soft_bch" nand-ecc-mode value, 2016-04-22) deprecated "soft_bch". Update the example to match. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Acked-by: Rafał Miłecki <zajec5@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * Revert "mtd: atmel_nand: Support variable RB_EDGE interrupts"Wenyou Yang2016-05-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 5ddc7bd43ccc ("mtd: atmel_nand: Support variable RB_EDGE interrupts") Because for current SoCs, the RB_EDGE3(i.e. bit 27) of HSMC_SR register does not exist, the RB_EDGE0 (i.e. bit 24) is the ready/busy line edge status bit. It is a datasheet bug. Cc: <stable@vger.kernel.org> Fixes: commit 5ddc7bd43ccc ("mtd: atmel_nand: Support variable RB_EDGE interrupts") Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | Merge tag 'for-linus-20160523' of git://git.infradead.org/linux-mtdLinus Torvalds2016-05-243-7/+58
|\| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MTD updates from Brian Norris: "First cycle with Boris as NAND maintainer! Many (most) bullets stolen from him. Generic: - Migrated NAND LED trigger to be a generic MTD trigger NAND: - Introduction of the "ECC algorithm" concept, to avoid overloading the ECC mode field too much more - Replaced the nand_ecclayout infrastructure with something a little more flexible (finally!) and future proof - Rework of the OMAP GPMC and NAND drivers; the TI folks pulled some of this into their own tree as well - Prepare the sunxi NAND driver to receive DMA support - Handle bitflips in erased pages on GPMI revisions that do not support this in hardware. SPI NOR: - Start using the spi_flash_read() API for SPI drivers that support it (i.e., SPI drivers with special memory-mapped flash modes) And other small scattered improvments" * tag 'for-linus-20160523' of git://git.infradead.org/linux-mtd: (155 commits) mtd: spi-nor: support GigaDevice gd25lq64c mtd: nand_bch: fix spelling of "probably" mtd: brcmnand: respect ECC algorithm set by NAND subsystem gpmi-nand: Handle ECC Errors in erased pages Documentation: devicetree: deprecate "soft_bch" nand-ecc-mode value mtd: nand: add support for "nand-ecc-algo" DT property mtd: mtd: drop NAND_ECC_SOFT_BCH enum value mtd: drop support for NAND_ECC_SOFT_BCH as "soft_bch" mapping mtd: nand: read ECC algorithm from the new field mtd: nand: fsmc: validate ECC setup by checking algorithm directly mtd: nand: set ECC algorithm to Hamming on fallback staging: mt29f_spinand: set ECC algorithm explicitly CRIS v32: nand: set ECC algorithm explicitly mtd: nand: atmel: set ECC algorithm explicitly mtd: nand: davinci: set ECC algorithm explicitly mtd: nand: bf5xx: set ECC algorithm explicitly mtd: nand: omap2: Fix high memory dma prefetch transfer mtd: nand: omap2: Start dma request before enabling prefetch mtd: nandsim: add __init attribute mtd: nand: move of_get_nand_xxx() helpers into nand_base.c ...
| * Documentation: devicetree: deprecate "soft_bch" nand-ecc-mode valueRafał Miłecki2016-05-051-2/+4
| | | | | | | | | | | | | | | | | | Now that we support nand-ecc-algo property it should be used together with "soft" to specify software BCH ECC. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| * mtd: nand: add support for "nand-ecc-algo" DT propertyRafał Miłecki2016-05-051-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | So far it was only possible to specify ECC algorithm using "soft" and "soft_bch" values of nand-ecc-mode prop. There wasn't a way to specify it for a hardware ECC mode. Now that we have independent field in NAND subsystem for storing info about ECC algorithm we may also add support for this new DT property. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| * mtd: brcmnand: Add support for v6.2 controllersFlorian Fainelli2016-04-191-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Document and match the brcm,brcmnand-v6.2 compatible string, the controller has a register layout identical to the v6.0 version and supports prefetch. Update the command shift logic to account for v6.2 controller which are the first ones to use a shift of 0 (6.1 used a shift of 24). Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| * mtd: nand: document the NAND controller/NAND chip DT representationBoris Brezillon2016-04-191-1/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Standardize the NAND controller/NAND chip DT representation. Now, all new NAND controller drivers should comply with this representation, even if they are only supporting a single NAND chip. Existing drivers can keep support for the old representation (where only the NAND chip was described), but are encouraged to also support the new one. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Rob Herring <robh@kernel.org>
| * mtd: nand: omap2: Implement NAND ready using gpiolibRoger Quadros2016-04-151-0/+2
| | | | | | | | | | | | | | | | | | | | | | The GPMC WAIT pin status are now available over gpiolib. Update the omap_dev_ready() function to use gpio instead of directly accessing GPMC register space. Signed-off-by: Roger Quadros <rogerq@ti.com> Acked-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Tony Lindgren <tony@atomide.com>
| * mtd: nand: omap: Update DT binding documentationRoger Quadros2016-04-151-4/+13
| | | | | | | | | | | | | | | | | | | | Add compatible id and interrupts. The NAND interrupts are provided by the GPMC controller node. Signed-off-by: Roger Quadros <rogerq@ti.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Tony Lindgren <tony@atomide.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-27 09:56:51 +0100