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* Merge tag 'spi-fix-v5.3-rc3' of ↵Linus Torvalds2019-08-051-1/+0
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi Pull spi fixes from Mark Brown: "A bunch of small, device specific things here plus a DT bindings fix for the new validatable YAML binding format. The most notable thing is the fix for GPIO chip selects which fixes a corner case in updates of that code to modern APIs, unfortunately due to a historical mess the code around GPIO support is obscure, fragile and an ABI which makes and attempt to improve the situation painful" * tag 'spi-fix-v5.3-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: spi: pxa2xx: Add support for Intel Tiger Lake spi: bcm2835: Fix 3-wire mode if DMA is enabled spi: pxa2xx: Balance runtime PM enable/disable on error spi: gpio: Add SPI_MASTER_GPIO_SS flag spi: spi-fsl-qspi: change i.MX7D RX FIFO size spi: dt-bindings: spi-controller: remove unnecessary 'maxItems: 1' from reg
| * spi: dt-bindings: spi-controller: remove unnecessary 'maxItems: 1' from regRob Herring2019-07-101-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | Mixing array constraints like 'maxItems' and string or integer value constraints like 'minimum' don't make sense. Also, with only value constraints, it is implied we have a single value. So lets remove 'maxItems: 1'. Cc: Mark Brown <broonie@kernel.org> Cc: linux-spi@vger.kernel.org Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20190709192631.16394-1-robh@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
* | dt-bindings: Ensure child nodes are of type 'object'Rob Herring2019-07-212-0/+2
|/ | | | | | | | | | | | | | | | | | | | | | | | | Properties which are child node definitions need to have an explict type. Otherwise, a matching (DT) property can silently match when an error is desired. Fix this up tree-wide. Once this is fixed, the meta-schema will enforce this on any child node definitions. Cc: Chen-Yu Tsai <wens@csie.org> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Marek Vasut <marek.vasut@gmail.com> Cc: Richard Weinberger <richard@nod.at> Cc: Vignesh Raghavendra <vigneshr@ti.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: linux-mtd@lists.infradead.org Cc: linux-gpio@vger.kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com Cc: linux-spi@vger.kernel.org Acked-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Alexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: Rob Herring <robh@kernel.org>
* dt-bindings: spi: stm32-qspi: add dma propertiesLudovic Barre2019-06-281-1/+4
| | | | | | | This patch adds description of dma properties (optional). Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: Add DT bindings for SynquacerMasahisa Kojima2019-06-041-0/+27
| | | | | | | | | | This patch adds documentation for Device-Tree bindings for the Socionext Synquacer spi driver. Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: dt-bindings: Convert Arm pl022 to json-schemaRob Herring2019-05-232-70/+165
| | | | | | | | | | | | | | Convert the Arm pl022 binding to DT schema format. The clock binding was missing, so it is added to the schema. It really should be required as well, but there are some platforms (spear) not yet using DT clock binding. Cc: Mark Brown <broonie@kernel.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: linux-spi@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: dt-bindings: Convert spi-gpio binding to json-schemaRob Herring2019-05-222-43/+72
| | | | | | | | | | Convert the spi-gpio binding to DT schema format. Cc: Mark Brown <broonie@kernel.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: linux-spi@vger.kernel.org Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: sun6i: Add YAML schemasMaxime Ripard2019-05-212-44/+106
| | | | | | | | Switch the DT binding to a YAML schema to enable the DT validation. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: sun4i: Add YAML schemasMaxime Ripard2019-05-212-23/+86
| | | | | | | | Switch the DT binding to a YAML schema to enable the DT validation. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: Add YAML schemas for the generic SPI optionsMaxime Ripard2019-05-212-111/+162
| | | | | | | | | The SPI controllers have a bunch of generic options that are needed in a device tree. Add a YAML schemas for those. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
* dt-bindings: spi: spi-mt65xx: add support for MT8516Leilk Liu2019-05-021-0/+1
| | | | | | | | Add binding documentation of spi-mt65xx for MT8516 SOC. Signed-off-by: Leilk Liu <leilk.liu@mediatek.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: sh-msiof: Document r8a77470 bindingsCao Van Dong2019-05-021-0/+1
| | | | | | | Document SoC specific bindings for R-Car RZ/G1C(r8a77470) SoC. Signed-off-by: Cao Van Dong <cv-dong@jinso.co.jp> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: document tx/rx clock delay propertiesSowjanya Komatineni2019-04-081-0/+20
| | | | | | | | | | | | Tegra SPI controller has TX and RX trimmers to tuning the delay of SPI master clock with respect to the data. TX and RX tap values are based on the platform validation across the PVT and the trimmer values vary based on the trace lengths to the corresponding SPI devices. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* dt-bindings: spi: Add device tree binding documentation for Zynq QSPI controllerNaga Sureshkumar Relli2019-04-051-0/+25
| | | | | | | | This patch adds the dts binding document for Zynq SOC QSPI controller. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: mt7621: Move SPI driver out of stagingStefan Roese2019-03-251-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | This patch moves the MT7621 SPI driver, which is used on some Ralink / MediaTek MT76xx MIPS SoC's, out of the staging directory. No changes to the source code are done in this patch. This driver version was tested successfully on an MT7688 based platform with an SPI NOR on CS0 and an SPI NAND on CS1 without any issues (so far). This patch also documents the devicetree bindings for the MT7621 SPI device driver. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Rob Herring <robh@kernel.org> Cc: Mark Brown <broonie@kernel.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: NeilBrown <neil@brown.name> Cc: Sankalp Negi <sankalpnegi2310@gmail.com> Cc: Chuanhong Guo <gch981213@gmail.com> Cc: John Crispin <john@phrozen.org> Cc: Armando Miraglia <arma2ff0@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* dt-bindings: snps,dw-apb-ssi: Add optional clock bindings documentationGareth Williams2019-03-201-1/+7
| | | | | | | | | Add documentation to the Synopsys SPI dt-bindings to support an optional interface clock that may be used for register access. Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Signed-off-by: Gareth Williams <gareth.williams.jx@renesas.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* dt-bindings: snps,dw-apb-ssi: Add mandatory clock bindings documentationPhil Edworthy2019-03-201-1/+3
| | | | | | | | | | The Synopsys SSI driver uses a mandatory clock that is not documented, so detail it in the device tree bindings. Also correct the spelling of "pins" in the "Optional Properties" section for the driver. Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Signed-off-by: Gareth Williams <gareth.williams.jx@renesas.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: spi-fsl-spi: support use of the SPISEL_BOOT signal on MPC8309Rasmus Villemoes2019-03-181-0/+4
| | | | | | | | | | | | | | | | | | | | | | | The MPC8309 has a dedicated signal, SPISEL_BOOT, usually used as chip select for the flash device from which the bootloader is loaded. It is not an ordinary gpio, but is simply controlled via the SPI_CS register in the system configuration. To allow accessing such a spi slave, we need to teach fsl_spi_cs_control() how to control the SPISEL_BOOT signal. To distinguish the gpio-controlled slaves, continue to have those use chip_select values of 0..ngpios-1, and use chip_select == ngpios for the boot flash. I'm not too happy with all the ifdeffery, but it seems to be necessary for guarding the sysdev/fsl_soc.h and use of get_immrbase() (spi-fsl-lib.c already contains similar ifdeffery). Googling suggests that the MPC8306 is similar, with the SPI_CS register at the same offset. Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by: Mark Brown <broonie@kernel.org>
* doc: lpspi: Document DT bindings for LPSPI clocksClark Wang2019-03-181-2/+8
| | | | | | | Add introductions of clocks and clock-names strings. Signed-off-by: Clark Wang <xiaoning.wang@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: sifive: Add DT documentation for SiFive SPI controllerYash Shah2019-02-191-0/+37
| | | | | | | | | DT documentation for SPI controller added. Signed-off-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Signed-off-by: Yash Shah <yash.shah@sifive.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* dt-bindings: spi: Add the DMA properties for the SPI dma modeLanqing Liu2019-02-131-0/+7
| | | | | | | | Add the DMA properties for the SPI dma mode. Signed-off-by: Lanqing Liu <lanqing.liu@unisoc.com> Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Signed-off-by: Mark Brown <broonie@kernel.org>
* dt-bindings: spi: imx: Add an entry for the i.MX8QM compatibleFabio Estevam2019-02-121-0/+1
| | | | | | | | Add an entry for the "fsl,imx8mq-ecspi" compatible to describe the ECSPI version present on i.MX8M. Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* dt-bindings: spi: atmel-quadspi: QuadSPI driver for Microchip SAM9X60Tudor Ambarus2019-02-061-3/+7
| | | | | | | | | The sam9x60 qspi controller uses 2 clocks, one for the peripheral register access, the other for the qspi core and phy. Both are mandatory. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
* dt-bindings: spi: atmel-quadspi: make "pclk" mandatoryTudor Ambarus2019-02-061-0/+2
| | | | | | | | | | | Naming clocks is a good practice. Make "pclk" madatory even if we support unnamed clock in the driver, to be backward compatible with old DTs. Suggested-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
* dt-bindings: spi: atmel-quadspi: update example to new clock bindingTudor Ambarus2019-02-061-1/+1
| | | | | | | | | Introduced in: commit b60557876849 ("ARM: dts: at91: sama5d2: switch to new clock binding") Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
* dt-bindings: spi: add binding file for NXP FlexSPI controllerYogesh Narayan Gaur2019-01-281-0/+39
| | | | | | | | Add binding file for NXP FlexSPI controller Signed-off-by: Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: stm32: add description about STM32F4 bindingsCezary Gapinski2019-01-071-3/+6
| | | | | | | | Add description that STM32F4 can be used in compatible property. Master Inter-Data Idleness optional property cannot be used in STM32F4. Signed-off-by: Cezary Gapinski <cezary.gapinski@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* dt-bindings: spi: Adjust the bindings for the FSL QSPI driverFrieder Schrempf2019-01-071-10/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adjust the documentation of the new SPI memory interface based driver to reflect the new drivers settings. The "old" driver was using the "fsl,qspi-has-second-chip" property to select one of two dual chip setups (two chips on one bus or two chips on separate buses). And it used the order in which the subnodes are defined in the dt to select the CS, the chip is connected to. Both methods are wrong and in fact the "reg" property should be used to determine which bus and CS a chip is connected to. This also enables us to use different setups than just single chip, or symmetric dual chip. So the porting of the driver from the MTD to the SPI framework actually enforces the use of the "reg" properties and makes "fsl,qspi-has-second-chip" superfluous. As all boards that have "fsl,qspi-has-second-chip" set, also have correct "reg" properties, the removal of this property shouldn't lead to any incompatibilities. The only compatibility issues I can see are with imx6sx-sdb.dts and imx6sx-sdb-reva.dts, which have their reg properties set incorrectly (see explanation here: [2]), all other boards should stay compatible. Also the "big-endian" flag was removed, as this setting is now selected by the driver, depending on which SoC is in use. [2] https://patchwork.ozlabs.org/patch/922817/#1925445 Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
* dt-bindings: spi: Move the bindings for the FSL QSPI driverFrieder Schrempf2019-01-071-0/+65
| | | | | | | | | Move the documentation of the old SPI NOR driver to the place of the new SPI memory interface based driver. Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
*-. Merge remote-tracking branches 'spi/topic/mem' and 'spi/topic/mtd' into spi-nextMark Brown2018-12-201-0/+31
|\ \
| | * dt-bindings: spi: QuadSPI driver for Atmel SAMA5D2Piotr Bugalski2018-11-071-0/+31
| |/ | | | | | | | | | | | | | | | | | | Atmel SAMA5D2 QuadSPI driver was moved from mtd to spi subsystem, this change is just moving DT-binding documentation. Suggested-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Piotr Bugalski <bugalski.piotr@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: sh-msiof: Add r8a774c0 supportFabrizio Castro2018-12-141-0/+1
| | | | | | | | | | | | | | | | Document RZ/G2E (R8A774C0) SoC bindings. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@kernel.org>
* | doc: lpspi: Document DT bindings for LPSPI slave modeClark Wang2018-12-131-0/+4
| | | | | | | | | | | | | | Add introductions of interrupt-parent and spi-slave. Signed-off-by: Clark Wang <xiaoning.wang@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: Update NPCM PSPI controller documentationTomer Maimon2018-12-061-0/+8
| | | | | | | | | | | | | | | | Update the PSPI NPCM binding document of the spi aliases use to define the spi ID number. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: mediatek: Add bindings for mediatek MT7629 soc platformLeilk Liu2018-11-271-0/+1
| | | | | | | | | | | | | | This patch adds a DT binding documentation for the MT7629 soc. Signed-off-by: Leilk Liu <leilk.liu@mediatek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* | dt-binding: spi: add NPCM PSPI controller documentationTomer Maimon2018-11-131-0/+35
| | | | | | | | | | | | | | | | Added device tree binding documentation for Nuvoton BMC NPCM Peripheral SPI controller. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: pxa2xx: dt-bindings: Add ready GPIO signalLubomir Rintel2018-11-131-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | This this is used to let the SPI master know that our FIFO is filled and we're ready to service a transfer. Only useful in slave mode. A signal like this is used by an embedded controller on a OLPC XO 1.75 machine, that happens to be a SPI master. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Acked-by: Pavel Machek <pavel@ucw.cz> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: pxa2xx: dt-bindings: Add spi-slave propertyLubomir Rintel2018-11-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | This is used to indicate that the chip attached to this controller is a SPI master. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Pavel Machek <pavel@ucw.cz> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: rspi: Add r8a77470 to the compatible listFabrizio Castro2018-11-071-0/+1
| | | | | | | | | | | | | | | | | | Add r8a77470 to the list of examples with soctypes. No driver change is needed as "renesas,qspi" will activate the right code within the corresponding driver. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: omap-spi: Add compatible for AM654 SoCVignesh R2018-11-071-0/+1
| | | | | | | | | | | | | | | | AM654 SoC has same McSPI IP as OMAP2+ platforms. Add new compatible to support McSPI on AM654 SoC. Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* | dt-binding: spi: Document Macronix controller bindingsMason Yang2018-11-051-0/+34
| | | | | | | | | | | | | | | | Document the bindings used by the Macronix controller. Signed-off-by: Mason Yang <masonccyang@mxic.com.tw> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: uniphier: re-add addressing propertiesKeiji Hayashibara2018-11-051-0/+4
| | | | | | | | | | | | | | | | | | | | In commit 7662d1dc17d4 ("spi: uniphier: fix incorrect property items") addressing properties of #address-cells and #size-cells were removed. Since it is not necessary to remove them, they are back again. Signed-off-by: Keiji Hayashibara <hayashibara.keiji@socionext.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: uniphier: fix incorrect property itemsKeiji Hayashibara2018-11-051-6/+8
| | | | | | | | | | | | | | | | | | | | | | This commit fixes incorrect property because it was different from the actual. The parameters of '#address-cells' and '#size-cells' were removed, and 'interrupts', 'pinctrl-names' and 'pinctrl-0' were added. Fixes: 4dcd5c2781f3 ("spi: add DT bindings for UniPhier SPI controller") Signed-off-by: Keiji Hayashibara <hayashibara.keiji@socionext.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: mediatek: Add bindings for mediatek MT8183 soc platformLeilk Liu2018-11-051-0/+1
|/ | | | | | | This patch adds a DT binding documentation for the MT8183 soc. Signed-off-by: Leilk Liu <leilk.liu@mediatek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: lpspi: add imx8qxp compatible stringA.s. Dong2018-10-211-0/+1
| | | | | | | | Add imx8qxp compatible string Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
* dt-bindings: spi: add stm32 qspi controllerLudovic Barre2018-10-191-0/+44
| | | | | | | | | | This patch adds the documentation of device tree bindings for the STM32 QSPI controller. It is a specialized communication interface targeting single, dual or quad SPI Flash memories (NOR/NAND). Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: sh-msiof: document R8A779{7|8}0 bindingsSergei Shtylyov2018-10-171-0/+2
| | | | | | | | | Document the R-Car V3{M|H} (R8A779{7|8}0) SoCs in the Renesas MSIOF bindings. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi/spi-pxa2xx: add PXA2xx SSP SPI ControllerLubomir Rintel2018-10-111-0/+24
| | | | | | | | | This is the SPI controller found on Marvel MMP2 and perhaps more platforms. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: soc: qcom: GENI SE SPI controller device tree bindingDilip Kota2018-10-111-0/+39
| | | | | | | | | | | | | Move GENI SE SPI controller device-tree bindings from devicetree/bindings/soc/qcom/qcom,geni-se.txt to devicetree/bindings/spi/qcom,spi-geni-qcom.txt. Signed-off-by: Dilip Kota <dkota@codeaurora.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Alok Chauhan <alokc@codeaurora.org> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: Qualcomm Quad SPI(QSPI) documentationGirish Mahadevan2018-10-111-0/+36
| | | | | | | | | | | Bindings for Qualcomm Quad SPI used on SoCs such as sdm845. Signed-off-by: Girish Mahadevan <girishm@codeaurora.org> Signed-off-by: Ryan Case <ryandcase@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Mark Brown <broonie@kernel.org>
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