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git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux
Pull thermal management updates from Zhang Rui:
- Introduce generic ADC thermal driver, based on OF thermal (Laxman
Dewangan)
- Introduce new thermal driver for Tango chips (Marc Gonzalez)
- Rockchip driver support for RK3399, RK3366, and some fixes (Caesar
Wang, Elaine Zhang and Shawn Lin)
- Add CPU power cooling model to Mediatek thermal driver (Dawei Chien)
- Wider usage of dev_thermal_zone_of_sensor_register (Eduardo Valentin)
- TI thermal driver gained a new maintainer (Keerthy).
- Enabled powerclamp driver by checking CPU feature and package cstate
counter instead of CPU whitelist (Jacob Pan)
- Various fixes on thermal governor, OF thermal, Tegra, and RCAR
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux: (50 commits)
thermal: tango: initialize TEMPSI_CFG
thermal: rockchip: use the usleep_range instead of udelay
thermal: rockchip: add the notes for better reading
thermal: rockchip: Support RK3366 SoCs in the thermal driver
thermal: rockchip: handle the power sequence for tsadc controller
thermal: rockchip: update the tsadc table for rk3399
thermal: rockchip: fixes the code_to_temp for tsadc driver
thermal: rockchip: disable thermal->clk in err case
thermal: tegra: add Tegra132 specific SOC_THERM driver
thermal: fix ptr_ret.cocci warnings
thermal: mediatek: Add cpu dynamic power cooling model.
thermal: generic-adc: Add ADC based thermal sensor driver
thermal: generic-adc: Add DT binding for ADC based thermal sensor
thermal: tegra: fix static checker warning
thermal: tegra: mark PM functions __maybe_unused
thermal: add temperature sensor support for tango SoC
thermal: hisilicon: fix IRQ imbalance enabling
thermal: hisilicon: support to use any sensor
thermal: rcar: Remove binding docs for r8a7794
thermal: tegra: add PM support
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Sometimes, thermal sensors like NCT thermistors are connected to
the ADC channel. The temperature is read by reading the voltage
across the sensor resistance via ADC and referring the lookup
table for ADC value to temperature.
Add DT binding doc for the ADC based thermal sensor driver to
detail the DT property and provide the example for how to use it.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Acked-by: Rob Herring <rob@kernel.org>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
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The Tango thermal driver provides support for the primitive temperature
sensor embedded in Tango chips since the SMP8758.
This sensor only generates a 1-bit signal to indicate whether the die
temperature exceeds a programmable threshold.
Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
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The latest information that I have is that there is no thermal IP
block present on the r8a7794 SoC so remove the corresponding binding.
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
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The "critical" type trip in thermal zone can be
set to SOC_THERM hardware, it can trigger shut down
or reset event from hardware.
Signed-off-by: Wei Ni <wni@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
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Pull watchdog updates from Wim Van Sebroeck:
- add support for Fintek F81865 Super-IO chip
- add support for watchdogs (RWDT and SWDT) found on RCar Gen3 based
SoCs from Renesas
- octeon: Handle the FROZEN hot plug notifier actions
- f71808e_wdt fixes and cleanups
- some small improvements in code and documentation
* git://www.linux-watchdog.org/linux-watchdog:
MAINTAINERS: Add file patterns for watchdog device tree bindings
Documentation: Add ebc-c384_wdt watchdog-parameters.txt entry
watchdog: shwdt: Use setup_timer()
watchdog: cpwd: Use setup_timer()
arm64: defconfig: enable Renesas Watchdog Timer
watchdog: renesas-wdt: add driver
watchdog: remove error message when unable to allocate watchdog device
watchdog: f71808e_wdt: Fix WDTMOUT_STS register read
watchdog: f71808e_wdt: Fix typo
watchdog: f71808e_wdt: Add F81865 support
watchdog: sp5100_tco: properly check for new register layouts
watchdog: core: Fix circular locking dependency
watchdog: core: fix trivial typo in a comment
watchdog: hpwdt: Adjust documentation to match latest kernel module parameters.
watchdog: imx2_wdt: add external reset support via dt prop
watchdog: octeon: Handle the FROZEN hot plug notifier actions.
watchdog: qcom: Report reboot reason
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Add support for watchdogs (RWDT and SWDT) found on RCar Gen3 based SoCs
from Renesas.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
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The IMX6 watchdog supports assertion of a signal (WDOG_B) which
can be pinmux'd to an external pin. This is typically used for boards that
have PMIC's in control of the IMX6 power rails. In fact, failure to use
such an external reset on boards with external PMIC's can result in various
hangs due to the IMX6 not being fully reset [1] as well as the board failing
to reset because its PMIC has not been reset to provide adequate voltage for
the CPU when coming out of reset at 800Mhz.
This uses a new device-tree property 'fsl,ext-reset-output' to indicate the
board has such a reset and to cause the watchdog to be configured to assert
WDOG_B instead of an internal reset both on a watchdog timeout and in
system_restart.
[1] http://lists.infradead.org/pipermail/linux-arm-kernel/2015-March/333689.html
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Iain Paton <ipaton0@gmail.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Akshay Bhat <akshay.bhat@timesys.com>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
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git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi updates from Mark Brown:
"Another quiet release for SPI, almost entirely driver specific changes
with the diffstat dominated by two new drivers which are about two
thirds of it in terms of lines of code:
- new drivers for PIC32 standard and SQI controllers
- the Cadence driver has had runtime PM support added and quite a few
fixes and cleanups
- flash-specific accelerated path support now has a feature query
interface
- the pxa2xx driver has been moved to use the core DMA mapping support"
* tag 'spi-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (48 commits)
spi: pic32-sqi: Fix linker error, undefined reference to `bad_dma_ops'
spi: dw-pci: Spelling s/paltforms/platforms/g
spi: pic32-sqi: Remove pic32_sqi_setup and pic32_sqi_cleanup
spi: Fix simple typo s/impelment/implement
spi: rockchip: potential NULL dereference on error
spi: zynqmp: disable clocks in error paths
spi: Drop unnecessary dependencies on relaxed I/O accessors
spi: qup: Add spi_master_put in remove function
spi: qup: Handle clocks in pm_runtime suspend and resume
spi: st-ssc4: Fix missing spi_master_put in spi_st_probe error paths
spi: st-ssc4: Allow compile test build
spi: omap2-mcspi: Use dma_request_chan() for requesting DMA channel
spi: davinci: Use dma_request_chan() for requesting DMA channel
spi: pic32: Fix checking return value of devm_ioremap_resource
spi: spi-fsl-dspi: Update DT binding documentation
spi: Drop duplicate code to set master->dev.parent
spi: pic32: Set proper bits_per_word_mask
spi: return error if kmap'd buffers passed to spi_map_buf()
spi: core: add hook flash_read_supported to spi_master
spi: pic32-sqi: silence array overflow warning
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'spi/topic/orion', 'spi/topic/pic32' and 'spi/topic/pic32-qspi' into spi-next
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Document Device tree bindings for the quad SPI peripheral
found on Microchip PIC32 class devices.
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
Acked-by: Rob Herring <rob@kernel.org>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mark Brown <broonie@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
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Document the devicetree bindings for the SPI peripheral found
on Microchip PIC32 class devices.
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
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'spi/topic/fsl-dspi', 'spi/topic/fsl-espi' and 'spi/topic/kconfig' into spi-next
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DSPI driver support the register on the controller with big endian
mode R/W. But not use the regmap API.
So update the binding documentation for "big-endian".
Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
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Pull MTD updates from Brian Norris:
"First cycle with Boris as NAND maintainer! Many (most) bullets stolen
from him.
Generic:
- Migrated NAND LED trigger to be a generic MTD trigger
NAND:
- Introduction of the "ECC algorithm" concept, to avoid overloading
the ECC mode field too much more
- Replaced the nand_ecclayout infrastructure with something a little
more flexible (finally!) and future proof
- Rework of the OMAP GPMC and NAND drivers; the TI folks pulled some
of this into their own tree as well
- Prepare the sunxi NAND driver to receive DMA support
- Handle bitflips in erased pages on GPMI revisions that do not
support this in hardware.
SPI NOR:
- Start using the spi_flash_read() API for SPI drivers that support
it (i.e., SPI drivers with special memory-mapped flash modes)
And other small scattered improvments"
* tag 'for-linus-20160523' of git://git.infradead.org/linux-mtd: (155 commits)
mtd: spi-nor: support GigaDevice gd25lq64c
mtd: nand_bch: fix spelling of "probably"
mtd: brcmnand: respect ECC algorithm set by NAND subsystem
gpmi-nand: Handle ECC Errors in erased pages
Documentation: devicetree: deprecate "soft_bch" nand-ecc-mode value
mtd: nand: add support for "nand-ecc-algo" DT property
mtd: mtd: drop NAND_ECC_SOFT_BCH enum value
mtd: drop support for NAND_ECC_SOFT_BCH as "soft_bch" mapping
mtd: nand: read ECC algorithm from the new field
mtd: nand: fsmc: validate ECC setup by checking algorithm directly
mtd: nand: set ECC algorithm to Hamming on fallback
staging: mt29f_spinand: set ECC algorithm explicitly
CRIS v32: nand: set ECC algorithm explicitly
mtd: nand: atmel: set ECC algorithm explicitly
mtd: nand: davinci: set ECC algorithm explicitly
mtd: nand: bf5xx: set ECC algorithm explicitly
mtd: nand: omap2: Fix high memory dma prefetch transfer
mtd: nand: omap2: Start dma request before enabling prefetch
mtd: nandsim: add __init attribute
mtd: nand: move of_get_nand_xxx() helpers into nand_base.c
...
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Now that we support nand-ecc-algo property it should be used together
with "soft" to specify software BCH ECC.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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So far it was only possible to specify ECC algorithm using "soft" and
"soft_bch" values of nand-ecc-mode prop. There wasn't a way to specify
it for a hardware ECC mode.
Now that we have independent field in NAND subsystem for storing info
about ECC algorithm we may also add support for this new DT property.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Document and match the brcm,brcmnand-v6.2 compatible string, the controller has
a register layout identical to the v6.0 version and supports prefetch. Update the
command shift logic to account for v6.2 controller which are the first ones to
use a shift of 0 (6.1 used a shift of 24).
Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Standardize the NAND controller/NAND chip DT representation. Now, all new
NAND controller drivers should comply with this representation, even if
they are only supporting a single NAND chip.
Existing drivers can keep support for the old representation (where only
the NAND chip was described), but are encouraged to also support the new
one.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Brian Norris <computersforpeace@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
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The GPMC WAIT pin status are now available over gpiolib.
Update the omap_dev_ready() function to use gpio instead of
directly accessing GPMC register space.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Acked-by: Brian Norris <computersforpeace@gmail.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Tony Lindgren <tony@atomide.com>
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OMAPs can have 2 to 4 WAITPINs that can be used as edge triggered
interrupts if not used for memory wait state insertion.
Support these interrupts via the gpmc IRQ domain.
The gpmc IRQ domain interrupt map is:
0 - NAND_fifoevent
1 - NAND_termcount
2 - GPMC_WAIT0 edge
3 - GPMC_WAIT1 edge, and so on
Signed-off-by: Roger Quadros <rogerq@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Tony Lindgren <tony@atomide.com>
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OMAPs can have 2 to 4 WAITPINs that can be used as general purpose
input if not used for memory wait state insertion.
The first user will be the OMAP NAND chip to get the NAND
read/busy status using gpiolib.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Tony Lindgren <tony@atomide.com>
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omap-gpmc.c is a memory controller so move the binding to the
right place.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Tony Lindgren <tony@atomide.com>
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Add compatible id and interrupts. The NAND interrupts are
provided by the GPMC controller node.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Brian Norris <computersforpeace@gmail.com>
Acked-by: Tony Lindgren <tony@atomide.com>
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GPMC provides 2 interrupts for NAND use. i.e. fifoevent and termcount.
Use IRQ domain for this. NAND device tree node can then
get the necessary interrupts by using gpmc as the interrupt parent.
Legacy boot uses gpmc_get_client_irq to get the
NAND interrupts from the GPMC IRQ domain.
Get rid of custom bitmasks and use IRQ domain for that
as well.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Tony Lindgren <tony@atomide.com>
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Pull drm updates from Dave Airlie:
"Here's the main drm pull request for 4.7, it's been a busy one, and
I've been a bit more distracted in real life this merge window. Lots
more ARM drivers, not sure if it'll ever end. I think I've at least
one more coming the next merge window.
But changes are all over the place, support for AMD Polaris GPUs is in
here, some missing GM108 support for nouveau (found in some Lenovos),
a bunch of MST and skylake fixes.
I've also noticed a few fixes from Arnd in my inbox, that I'll try and
get in asap, but I didn't think they should hold this up.
New drivers:
- Hisilicon kirin display driver
- Mediatek MT8173 display driver
- ARC PGU - bitstreamer on Synopsys ARC SDP boards
- Allwinner A13 initial RGB output driver
- Analogix driver for DisplayPort IP found in exynos and rockchip
DRM Core:
- UAPI headers fixes and C++ safety
- DRM connector reference counting
- DisplayID mode parsing for Dell 5K monitors
- Removal of struct_mutex from drivers
- Connector registration cleanups
- MST robustness fixes
- MAINTAINERS updates
- Lockless GEM object freeing
- Generic fbdev deferred IO support
panel:
- Support for a bunch of new panels
i915:
- VBT refactoring
- PLL computation cleanups
- DSI support for BXT
- Color manager support
- More atomic patches
- GEM improvements
- GuC fw loading fixes
- DP detection fixes
- SKL GPU hang fixes
- Lots of BXT fixes
radeon/amdgpu:
- Initial Polaris support
- GPUVM/Scheduler/Clock/Power improvements
- ASYNC pageflip support
- New mesa feature support
nouveau:
- GM108 support
- Power sensor support improvements
- GR init + ucode fixes.
- Use GPU provided topology information
vmwgfx:
- Add host messaging support
gma500:
- Some cleanups and fixes
atmel:
- Bridge support
- Async atomic commit support
fsl-dcu:
- Timing controller for LCD support
- Pixel clock polarity support
rcar-du:
- Misc fixes
exynos:
- Pipeline clock support
- Exynoss4533 SoC support
- HW trigger mode support
- export HDMI_PHY clock
- DECON5433 fixes
- Use generic prime functions
- use DMA mapping APIs
rockchip:
- Lots of little fixes
vc4:
- Render node support
- Gamma ramp support
- DPI output support
msm:
- Mostly cleanups and fixes
- Conversion to generic struct fence
etnaviv:
- Fix for prime buffer handling
- Allow hangcheck to be coalesced with other wakeups
tegra:
- Gamme table size fix"
* 'drm-next' of git://people.freedesktop.org/~airlied/linux: (1050 commits)
drm/edid: add displayid detailed 1 timings to the modelist. (v1.1)
drm/edid: move displayid validation to it's own function.
drm/displayid: Iterate over all DisplayID blocks
drm/edid: move displayid tiled block parsing into separate function.
drm: Nuke ->vblank_disable_allowed
drm/vmwgfx: Report vmwgfx version to vmware.log
drm/vmwgfx: Add VMWare host messaging capability
drm/vmwgfx: Kill some lockdep warnings
drm/nouveau/gr/gf100-: fix race condition in fecs/gpccs ucode
drm/nouveau/core: recognise GM108 chipsets
drm/nouveau/gr/gm107-: fix touching non-existent ppcs in attrib cb setup
drm/nouveau/gr/gk104-: share implementation of ppc exception init
drm/nouveau/gr/gk104-: move rop_active_fbps init to nonctx
drm/nouveau/bios/pll: check BIT table version before trying to parse it
drm/nouveau/bios/pll: prevent oops when limits table can't be parsed
drm/nouveau/volt/gk104: round up in gk104_volt_set
drm/nouveau/fb/gm200: setup mmu debug buffer registers at init()
drm/nouveau/fb/gk20a,gm20b: setup mmu debug buffer registers at init()
drm/nouveau/fb/gf100-: allocate mmu debug buffers
drm/nouveau/fb: allow chipset-specific actions for oneinit()
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Add support for TPK U.S.A. LLC Fusion 7", 10.1" panels to the DRM simple
panel driver.
Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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The ANX7814 is an ultra-low power Full-HD (1080p60) SlimPort transmitter
designed for portable devices.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Analogix Semiconductor Inc. develops analog and mixed-signal devices for
digital media and communications interconnect applications.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Add support for the Innolux AT070TN92 panel.
Signed-off-by: Riccardo Bortolato <bortolato@navaltechitalia.it>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Add support for the Olimex LCD-OLinuXino-4.3TS panel to the DRM simple
panel driver.
It is a 480x272 panel connected through a 24-bits RGB interface.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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This is a basic TFT panel with a 40-pin FPC connector on it. The
specification doesn't define timings, but the Adafruit instructions
were setting up 800x480 CVT.
v2: Add .bus_format and vsync/hsync flags.
Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Rob Herring <robh@kernel.org>
[treding@nvidia.com: keep entries properly sorted]
Signed-off-by: Thierry Reding <treding@nvidia.com>
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This is the vendor for a 7" DPI panel sold by Adafruit which I'd like
to describe in DT.
Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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git://git.pengutronix.de/git/pza/linux into drm-next
MT8173 DRM support
- device tree binding documentation for all MT8173 display
subsystem components
- basic mediatek-drm driver for MT8173 with two optional,
currently fixed output paths:
- DSI encoder support for DSI and (via bridge) eDP panels
- DPI encoder support for output to HDMI bridge
- necessary clock tree changes for the DPI->HDMI path
- export mtk-smi functions used by mediatek-drm
* tag 'mediatek-drm-2016-05-09' of git://git.pengutronix.de/git/pza/linux:
clk: mediatek: remove hdmitx_dig_cts from TOP clocks
clk: mediatek: Add hdmi_ref HDMI PHY PLL reference clock output
clk: mediatek: make dpi0_sel propagate rate changes
drm/mediatek: Add DPI sub driver
drm/mediatek: Add DSI sub driver
drm/mediatek: Add DRM Driver for Mediatek SoC MT8173.
dt-bindings: drm/mediatek: Add Mediatek display subsystem dts binding
memory: mtk-smi: export mtk_smi_larb_get/put
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Add device tree binding documentation for the display subsystem in
Mediatek MT8173 SoCs.
Signed-off-by: CK Hu <ck.hu@mediatek.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
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Merge this back as we've built up a fair few conflicts, and I have
some newer trees to pull in.
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drm-next
drm-hisilicon-next for 4.7
Add new hisilicon kirin drm driver:
- Add maintainer for hisilicon DRM driver
- Add support for external bridge
- Add designware dsi host driver
- Add designware dsi encoder driver
- Add cma fbdev and hotplug
- Add vblank driver for ADE
- Add plane driver for ADE
- Add crtc driver for ADE
- Add hisilicon kirin drm master driver
- Add device tree binding for hi6220 display subsystem
* tag 'drm-hisilicon-next-2016-04-29' of github.com:xin3liang/linux:
MAINTAINERS: Add maintainer for hisilicon DRM driver
drm/hisilicon: Add support for external bridge
drm/hisilicon: Add designware dsi host driver
drm/hisilicon: Add designware dsi encoder driver
drm/hisilicon: Add cma fbdev and hotplug
drm/hisilicon: Add vblank driver for ADE
drm/hisilicon: Add plane driver for ADE
drm/hisilicon: Add crtc driver for ADE
drm/hisilicon: Add hisilicon kirin drm master driver
drm/hisilicon: Add device tree binding for hi6220 display subsystem
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Add ADE display controller binding doc.
Add DesignWare DSI Host Controller v1.20a binding doc.
v8: None.
v7: Acked by Rob Herring.
v6:
- Cleanup values part of reg and clocks properties.
- Change "pclk_dsi" clock name to "pclk".
v5:
- Remove endpoint unit address of dsi output port.
- Add "hisilicon,noc-syscon" property for ADE NOC QoS syscon.
- Add "resets" property for ADE reset.
v4:
- Describe more specific of clocks and ports.
- Fix indentation.
v3:
- Make ade as the drm master node.
- Use assigned-clocks to set clock rate.
- Use ports to connect display relavant nodes.
v2:
- Move dt binding docs to bindings/display/hisilicon directory.
Signed-off-by: Xinliang Liu <xinliang.liu@linaro.org>
Signed-off-by: Xinwei Kong <kong.kongxinwei@hisilicon.com>
Acked-by: Rob Herring <robh@kernel.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-next
Summary:
- Support for pipeline clock between KMS drivers.
. Exynos SoC is required to control clocks across KMS drivers
according to Exynos SoC version. So this patch refactos
some relevant codes and provides generic solution for it.
- Add Exynos5433 SoC support to HDMI parts - HDMI and DECON-TV.
- Add HW trigger mode support to CRTC drivers.
. In case of using i80 Panel, some Exynos SoC supports HW trigger
mode so this patch makes trigger mode - HW or SW trigger - to be
set according to SoC version properly.
- And some cleanups and regression fixups.
* 'exynos-drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos: (39 commits)
drm/exynos: clean up register definions for fimd and decon
drm/exynos: decon: clean up interface type
drm/exynos: fimd: add HW trigger support
drm/exynos: clean up wait_for_vblank
drm/exynos: mixer: use generic of_device_get_match_data helper
drm/exynos: mixer: remove support for non-dt platforms
drm/exynos: hdmi: use generic of_device_get_match_data helper
drm/exynos: rotator: use generic of_device_get_match_data helper
drm/exynos: fimd: use generic of_device_get_match_data helper
drm/exynos: dsi: use generic of_device_get_match_data helper
drm/exynos: exynos5433_decon: use generic of_device_get_match_data helper
drm/exynos: convert clock_enable crtc callback to pipeline clock
drm/exynos/mixer: enable HDMI-PHY before configuring MIXER
drm/exynos/decon5433: enable HDMI-PHY before configuring DECON
drm/exynos: add support for pipeline clock to the framework
drm/exynos: add helper to get crtc from pipe
drm/exynos/decon5433: do not protect window in plane disable
drm/exynos/decon5433: reset decon on start
drm/exynos/decon5433: fix DECON standalone update
drm/exynos/hdmi: remove registry dump
...
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DECON-TV(Display and Enhancement Controller for TV) is a variation
of DECON IP. Its main purpose is to produce video stream for HDMI IP.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
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DECON IP requires this clock to access configuration registers.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
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Exynos5433 variant of HDMI requires different set of clocks and sysreg
phandle to system registers.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
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drm-next
This pull request brings in DPI panel support, gamma ramp support, and
render nodes for vc4.
* tag 'drm-vc4-next-2016-05-02' of https://github.com/anholt/linux:
drm/vc4: Add missing render node support
drm/vc4: Add support for gamma ramps.
drm/vc4: Fix NULL deref in HDMI init error path
drm/vc4: Add DPI driver
drm: Add an encoder and connector type enum for DPI.
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The DPI interface involves taking a ton of our GPIOs to be used as
outputs, and routing display signals over them in parallel.
v2: Use display_info.bus_formats[] to replace our custom DT
properties.
v3: Rebase on V3D documentation changes.
v4: Fix rebase detritus from V3D documentation changes.
Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Rob Herring <robh@kernel.org>
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drm-next
This adds very rudimentary TCON (timing controller for raw LCD displays)
support to enable the bypass mode in order to use the DCU controller on
Freescale/NXP Vybrid SoC's.
Additionally the register clock and pixel clock has been separated, but
are currently still enabled and disabled pairwise.
Other than that, fixes and cleanups accross the driver.
* 'for-next' of http://git.agner.ch/git/linux-drm-fsl-dcu:
drm/fsl-dcu: increment version and date
drm/fsl-dcu: implement lastclose callback
drm/fsl-dcu: disable output polling on driver unload
drm/fsl-dcu: deallocate fbdev CMA on unload
drm/fsl-dcu: use variable name dev for struct drm_device
drm/fsl-dcu: handle missing panel gracefully
drm/fsl-dcu: detach panel on destroy
drm/layerscape: reduce excessive stack usage
drm/fsl-dcu: add TCON driver
drm/fsl-dcu: use common clock framework for pixel clock divider
drm/fsl-dcu: add extra clock for pixel clock
drm/fsl-dcu: disable clock on initialization failure and remove
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Add driver for the TCON (timing controller) module. The TCON module
is a separate module attached after the DCU (display controller
unit). Each DCU instance has its own, directly connected TCON
instance. The DCU's RGB and timing signals are passing through
the TCON module. TCON can provide timing signals for raw TFT panels
or operate in a bypass mode which leaves all signals unaltered.
The driver currently only supports the bypass mode.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stefan Agner <stefan@agner.ch>
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The Vybrid DCU variant has two independent clock inputs, one
for the registers (IPG bus clock) and one for the pixel clock.
Support this distinction in the DCU DRM driver while staying
backward compatible for old device trees.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stefan Agner <stefan@agner.ch>
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The display pipeline of the Allwinner A10 is involving several loosely
coupled components.
Add a documentation for the bindings.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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This add DT bindings documentation for ARC PGU display controller.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: devicetree@vger.kernel.org
Cc: linux-snps-arc@lists.infradead.org
Acked-by: Rob Herring <robh@kernel.org>
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Backmerge 4.6-rc3 for i915.
Linux 4.6-rc3
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