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git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"We have a couple patches in the framework core this time around but
they're mostly minor cleanups and some debugfs stuff. The real work
that's in here is the typical pile of clk driver updates and new SoC
support.
Per usual (or maybe just recent trends), Qualcomm gains a handful of
SoC drivers additions and has the largest diffstat. After that there
are quite a few updates to the Allwinner (sunxi) drivers to support
modular drivers and Renesas is heavily updated to add more support for
various clks.
Overall it looks pretty normal.
New Drivers:
- Add MDMA and BDMA clks to Ingenic JZ4760 and JZ4770
- MediaTek mt7986 SoC basic support
- Clock and reset driver for Toshiba Visconti SoCs
- Initial clock driver for the Exynos7885 SoC (Samsung Galaxy A8)
- Allwinner D1 clks
- Lan966x Generic Clock Controller driver and associated DT bindings
- Qualcomm SDX65, SM8450, and MSM8976 GCC clks
- Qualcomm SDX65 and SM8450 RPMh clks
Updates:
- Set suppress_bind_attrs to true for i.MX8ULP driver
- Switch from do_div to div64_ul for throughout all i.MX drivers
- Fix imx8mn_clko1_sels for i.MX8MN
- Remove unused IPG_AUDIO_ROOT from i.MX8MP
- Switch parent for audio_root_clk to audio ahb in i.MX8MP driver
- Removal of all remaining uses of __clk_lookup() in
drivers/clk/samsung
- Refactoring of the CPU clocks registration to use common interface
- An update of the Exynos850 driver (support for more clock domains)
required by the E850-96 development board
- Prep for runtime PM and generic power domains on Tegra
- Support modular Allwinner clk drivers via platform bus
- Lan966x clock driver extended to support clock gating
- Add serial (SCI1), watchdog (WDT), timer (OSTM), SPI (RSPI), and
thermal (TSU) clocks and resets on Renesas RZ/G2L
- Rework SDHI clock handling in the Renesas R-Car Gen3 and RZ/G2
clock drivers, and in the Renesas SDHI driver
- Make the Cortex-A55 (I) clock on Renesas RZ/G2L programmable
- Document support for the new Renesas R-Car S4-8 (R8A779F0) SoC
- Add support for the new Renesas R-Car S4-8 (R8A779F0) SoC
- Add GPU clock and resets on Renesas RZ/G2L
- Add clk-provider.h to various Qualcomm clk drivers
- devm version of clk_hw_register_gate()
- kerneldoc fixes in a couple drivers"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (131 commits)
clk: visconti: Remove pointless NULL check in visconti_pll_add_lookup()
clk: mediatek: add mt7986 clock support
clk: mediatek: add mt7986 clock IDs
dt-bindings: clock: mediatek: document clk bindings for mediatek mt7986 SoC
clk: mediatek: clk-gate: Use regmap_{set/clear}_bits helpers
clk: mediatek: clk-gate: Shrink by adding clockgating bit check helper
clk: x86: Fix clk_gate_flags for RV_CLK_GATE
clk: x86: Use dynamic con_id string during clk registration
ACPI: APD: Add a fmw property clk-name
drivers: acpi: acpi_apd: Remove unused device property "is-rv"
x86: clk: clk-fch: Add support for newer family of AMD's SOC
clk: ingenic: Add MDMA and BDMA clocks
dt-bindings: clk/ingenic: Add MDMA and BDMA clocks
clk: bm1880: remove kfrees on static allocations
clk: Drop unused COMMON_CLK_STM32MP157_SCMI config
clk: st: clkgen-mux: search reg within node or parent
clk: st: clkgen-fsyn: search reg within node or parent
clk: Enable/Disable runtime PM for clk_summary
MAINTAINERS: Add entries for Toshiba Visconti PLL and clock controller
clk: visconti: Add support common clock driver and reset driver
...
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- Add MDMA and BDMA clks to Ingenic JZ4760 and JZ4770
- MediaTek mt7986 SoC basic support
* clk-ingenic:
clk: ingenic: Add MDMA and BDMA clocks
dt-bindings: clk/ingenic: Add MDMA and BDMA clocks
* clk-mediatek:
clk: mediatek: add mt7986 clock support
clk: mediatek: add mt7986 clock IDs
dt-bindings: clock: mediatek: document clk bindings for mediatek mt7986 SoC
clk: mediatek: clk-gate: Use regmap_{set/clear}_bits helpers
clk: mediatek: clk-gate: Shrink by adding clockgating bit check helper
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This patch adds the binding documentation for topckgen, apmixedsys,
infracfg, and ethernet subsystem clocks.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211217121148.6753-2-sam.shih@mediatek.com
Reviewed-by: Ryder Lee <ryder.lee@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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clk-next
- Clock and reset driver for Toshiba Visconti SoCs
* clk-socfpga:
clk: socfpga: s10: Make use of the helper function devm_platform_ioremap_resource()
clk: socfpga: agilex: Make use of the helper function devm_platform_ioremap_resource()
clk: socfpga: remove redundant assignment after a mask operation
clk: socfpga: remove redundant assignment on division
* clk-toshiba:
clk: visconti: Remove pointless NULL check in visconti_pll_add_lookup()
MAINTAINERS: Add entries for Toshiba Visconti PLL and clock controller
clk: visconti: Add support common clock driver and reset driver
dt-bindings: clock: Add DT bindings for SMU of Toshiba Visconti TMPV770x SoC
dt-bindings: clock: Add DT bindings for PLL of Toshiba Visconti TMPV770x SoC
* clk-st:
clk: Drop unused COMMON_CLK_STM32MP157_SCMI config
clk: st: clkgen-mux: search reg within node or parent
clk: st: clkgen-fsyn: search reg within node or parent
* clk-bitmain:
clk: bm1880: remove kfrees on static allocations
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Add device tree bindings for SMU (System Management Unit) controller of
Toshiba Visconti TMPV770x SoC series.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211025031038.4180686-3-nobuhiro1.iwamatsu@toshiba.co.jp
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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Add device tree bindings for PLL of Toshiba Visconti TMPV770x SoC series.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211025031038.4180686-2-nobuhiro1.iwamatsu@toshiba.co.jp
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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clk-next
* clk-nvidia:
clk: tegra: Support runtime PM and power domain
clk: tegra: Make vde a child of pll_p on tegra114
* clk-imx:
clk: imx8mp: Fix the parent clk of the audio_root_clk
clk: imx8mp: Remove IPG_AUDIO_ROOT from imx8mp-clock.h
clk: imx8mn: Fix imx8mn_clko1_sels
clk: imx: Use div64_ul instead of do_div
clk: imx: imx8ulp: set suppress_bind_attrs to true
* clk-samsung:
clk: samsung: Add initial Exynos7885 clock driver
clk: samsung: clk-pll: Add support for pll1417x
clk: samsung: Make exynos850_register_cmu shared
dt-bindings: clock: Document Exynos7885 CMU bindings
dt-bindings: clock: Add bindings definitions for Exynos7885 CMU
clk: samsung: exynos850: Add missing sysreg clocks
dt-bindings: clock: Add bindings for Exynos850 sysreg clocks
clk: samsung: exynos850: Register clocks early
clk: samsung: exynos850: Keep some crucial clocks running
clk: samsung: exynos850: Implement CMU_CMGP domain
dt-bindings: clock: Add bindings for Exynos850 CMU_CMGP
clk: samsung: exynos850: Implement CMU_APM domain
dt-bindings: clock: Add bindings for Exynos850 CMU_APM
clk: samsung: Update CPU clk registration
clk: samsung: Remove meaningless __init and extern from header files
clk: samsung: remove __clk_lookup() usage
dt-bindings: clock: samsung: add IDs for some core clocks
* clk-qcom: (25 commits)
clk: qcom: gcc-sc7280: Mark gcc_cfg_noc_lpass_clk always enabled
clk: qcom: clk-alpha-pll: Increase PLL lock detect poll time
clk: qcom: turingcc-qcs404: explicitly include clk-provider.h
clk: qcom: q6sstop-qcs404: explicitly include clk-provider.h
clk: qcom: mmcc-apq8084: explicitly include clk-provider.h
clk: qcom: lpasscc-sdm845: explicitly include clk-provider.h
clk: qcom: lpasscc-sc7280: explicitly include clk-provider.h
clk: qcom: gcc-sm6350: explicitly include clk-provider.h
clk: qcom: gcc-msm8994: explicitly include clk-provider.h
clk: qcom: gcc-sm8350: explicitly include clk-provider.h
clk: qcom: Add MSM8976/56 Global Clock Controller (GCC) driver
dt-bindings: clk: qcom: Document MSM8976 Global Clock Controller
clk: qcom: Add clock driver for SM8450
clk: qcom: Add SDX65 GCC support
clk: qcom: Add LUCID_EVO PLL type for SDX65
dt-bindings: clock: Add SM8450 GCC clock bindings
dt-bindings: clock: Add SDX65 GCC clock bindings
clk: qcom: rpmh: add support for SM8450 rpmh clocks
dt-bindings: clock: Add RPMHCC bindings for SM8450
clk: qcom: smd-rpm: Drop binary value handling for buffered clock
...
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Document the required properties and firmware clocks for gcc-msm8976 to
operate nominally, and add header definitions for referencing the clocks
from firmware.
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211208091036.132334-2-marijn.suijten@somainline.org
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v5.16-rc1 + 20211207114003.100693-2-vkoul@kernel.org
The immutable branch contains the DT binding and clock defines as need
for the Qualcomm SM8450 global clock controller driver.
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'e15509b2b7c9b600ab38c5269d4fac609c077b5b.1638861860.git.quic_vamslank@quicinc.com' into clk-for-5.17
v5.16-rc1 + e15509b2b7c9b600ab38c5269d4fac609c077b5b.1638861860.git.quic_vamslank@quicinc.com
Merge the immutable branch containing the DT binding and clock
definitions needed for the SDX65 global clock controller driver.
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Add bindings and update documentation for clock rpmh driver on SM8450.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211201072310.3968679-3-vkoul@kernel.org
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Add compatible for SDX65 RPMHCC.
Signed-off-by: Vamsi Krishna Lanka <quic_vamslank@quicinc.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/91c10dde568098027833dfcc310748a92a90387e.1638402361.git.quic_vamslank@quicinc.com
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Provide dt-schema documentation for Exynos7885 SoC clock controller.
Description is modified from Exynos850 clock controller documentation as
I couldn't describe it any better, that was written by Sam Protsenko.
Signed-off-by: David Virag <virag.david003@gmail.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211206153124.427102-3-virag.david003@gmail.com
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CMU_CMGP generates USI and ADC clocks for BLK_ALIVE. In particular USI
clocks are needed for HSI2C_3 and HSI2C_4 instances.
Add clock indices and bindings documentation for CMU_CMGP domain.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Link: https://lore.kernel.org/r/20211121232741.6967-4-semen.protsenko@linaro.org
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CMU_APM generates clocks for APM IP-core (Active Power Management). In
particular it generates RTC clocks, which are needed to enable rtc-s3c
driver on Exynos850 SoC.
Add clock indices and binding documentation for CMU_APM.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Link: https://lore.kernel.org/r/20211121232741.6967-2-semen.protsenko@linaro.org
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clk-next
* clk-x86:
clk: x86: Fix clk_gate_flags for RV_CLK_GATE
clk: x86: Use dynamic con_id string during clk registration
ACPI: APD: Add a fmw property clk-name
drivers: acpi: acpi_apd: Remove unused device property "is-rv"
x86: clk: clk-fch: Add support for newer family of AMD's SOC
clk: Introduce clk-tps68470 driver
platform/x86: int3472: Deal with probe ordering issues
platform/x86: int3472: Pass tps68470_regulator_platform_data to the tps68470-regulator MFD-cell
platform/x86: int3472: Pass tps68470_clk_platform_data to the tps68470-regulator MFD-cell
platform/x86: int3472: Add get_sensor_adev_and_name() helper
platform/x86: int3472: Split into 2 drivers
platform_data: Add linux/platform_data/tps68470.h file
i2c: acpi: Add i2c_acpi_new_device_by_fwnode() function
i2c: acpi: Use acpi_dev_ready_for_enumeration() helper
ACPI: delay enumeration of devices with a _DEP pointing to an INT3472 device
* clk-stm:
clk: stm32: Fix ltdc's clock turn off by clk_disable_unused() after system enter shell
* clk-amlogic:
clk: meson: gxbb: Fix the SDM_EN bit for MPLL0 on GXBB
* clk-allwinner:
clk: sunxi-ng: Add support for the D1 SoC clocks
clk: sunxi-ng: gate: Add macros for gates with fixed dividers
clk: sunxi-ng: mux: Add macros using clk_parent_data and clk_hw
clk: sunxi-ng: mp: Add macros using clk_parent_data and clk_hw
clk: sunxi-ng: div: Add macros using clk_parent_data and clk_hw
dt-bindings: clk: Add compatibles for D1 CCUs
clk: sunxi-ng: Allow the CCU core to be built as a module
clk: sunxi-ng: Convert early providers to platform drivers
clk: sunxi-ng: Allow drivers to be built as modules
clk: sunxi-ng: Export symbols used by CCU drivers
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The D1 has a CCU and a R_CCU (PRCM CCU) like most other sunxi SoCs, with
3 and 4 clock inputs, respectively. Add the compatibles and bindings.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20211119043545.4010-2-samuel@sholland.org
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'clk-debugfs' into clk-next
* clk-doc:
clk: Gemini: fix struct name in kernel-doc
clk: zynq: pll: Fix kernel-doc warnings
clk: imx: pllv1: fix kernel-doc notation for struct clk_pllv1
* clk-renesas: (31 commits)
clk: renesas: r9a07g044: Add GPU clock and reset entries
clk: renesas: r9a07g044: Add mux and divider for G clock
clk: renesas: r9a07g044: Rename CLK_PLL3_DIV4 macro
clk: renesas: cpg-mssr: Add support for R-Car S4-8
clk: renesas: rcar-gen4: Introduce R-Car Gen4 CPG driver
dt-bindings: clock: Add r8a779f0 CPG Core Clock Definitions
dt-bindings: power: Add r8a779f0 SYSC power domain definitions
clk: renesas: r9a07g044: Add TSU clock and reset entry
mmc: renesas_sdhi: Simplify an expression
mmc: renesas_sdhi: Use devm_clk_get_optional() to obtain CD clock
dt-bindings: clock: renesas,cpg-mssr: Document r8a779f0
clk: renesas: cpg-mssr: propagate return value of_genpd_add_provider_simple()
clk: renesas: cpg-mssr: Check return value of pm_genpd_init()
clk: renesas: rzg2l: propagate return value of_genpd_add_provider_simple()
clk: renesas: rzg2l: Check return value of pm_genpd_init()
clk: renesas: r9a07g044: Add RSPI clock and reset entries
clk: renesas: r9a07g044: Change core clock "I" from DEF_FIXED->DEF_DIV
clk: renesas: rzg2l: Add CPG_PL1_DDIV macro
mmc: renesas_sdhi: Parse DT for SDnH
mmc: renesas_sdhi: Use dev_err_probe when getting clock fails
...
* clk-at91:
clk: lan966x: Extend lan966x clock driver for clock gating support
dt-bindings: clock: lan966x: Extend includes with clock gates
dt-bindings: clock: lan966x: Extend for clock gate support
clk: gate: Add devm_clk_hw_register_gate()
clk: lan966x: Add lan966x SoC clock driver
dt-bindings: clock: lan966x: Add LAN966X Clock Controller
dt-bindings: clock: lan966x: Add binding includes for lan966x SoC clock IDs
* clk-cleanup:
clk: stm32mp1: remove redundant assignment to pointer data
clk: __clk_core_init() never takes NULL
clk: clk_core_get() can also return NULL
clk/ti/adpll: Make const pointer error a static const array
* clk-debugfs:
clk: Enable/Disable runtime PM for clk_summary
clk: Emit a stern warning with writable debugfs enabled
clk: Add write operation for clk_parent debugfs node
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Allow to add an optional resource to be able to access the clock gate
registers.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20211103085102.1656081-3-horatiu.vultur@microchip.com
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This adds the DT bindings documentation for lan966x SoC
generic clock controller.
Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20211103061935.25677-3-kavyasree.kotagiri@microchip.com
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Add binding documentation for the R-Car S4-8 (R8A779F0) Clock Pulse
Generator.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20211116074130.107554-7-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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git://git.kernel.org/pub/scm/linux/kernel/git/pavel/linux-leds
Pull LED updates from Pavel Machek:
"Nothing major is happening here"
* tag 'leds-5.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/pavel/linux-leds:
leds: lp55xx: initialise output direction from dts
ARM: dts: omap3-n900: Fix lp5523 for multi color
leds: ktd2692: Drop calling dev_of_node() in ktd2692_parse_dt
leds: lgm-sso: Get rid of duplicate of_node assignment
leds: tca6507: Get rid of duplicate of_node assignment
leds: leds-fsg: Drop FSG3 LED driver
leds: lp50xx: remove unused variable
dt-bindings: leds: Replace moonlight with indicator in mt6360 example
leds: led-core: Update fwnode with device_set_node
leds: tca6507: use swap() to make code cleaner
leds: Add mt6360 driver
dt-bindings: leds: Add bindings for MT6360 LED
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Replace moonlight with indicator in mt6360 example to prevent the below
build error:
Error: Documentation/devicetree/bindings/leds/leds-mt6360.example.dts:114.24-25
syntax error
FATAL ERROR: Unable to parse input tree
make[1]: *** [scripts/Makefile.lib:385:
Documentation/devicetree/bindings/leds/leds-mt6360.example.dt.yaml]
Error 1
Link: https://lore.kernel.org/lkml/CAL_JsqJRMVE163LaHTbtFARc4f_qg33bfQx+sD3ukce_xQF+gA@mail.gmail.com/
Signed-off-by: ChiYuan Huang <cy_huang@richtek.com>
Reviewed-by: Gene Chen <gene_chen@richtek.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Pavel Machek <pavel@ucw.cz>
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Add bindings document for LED support on MT6360 PMIC
Signed-off-by: Gene Chen <gene_chen@richtek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Pavel Machek <pavel@ucw.cz>
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git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree updates from Rob Herring:
"Bindings:
- DT schema conversions for Samsung clocks, RNG bindings, Qcom
Command DB and rmtfs, gpio-restart, i2c-mux-gpio, i2c-mux-pinctl,
Tegra I2C and BPMP, pwm-vibrator, Arm DSU, and Cadence macb
- DT schema conversions for Broadcom platforms: interrupt
controllers, STB GPIO, STB waketimer, STB reset, iProc MDIO mux,
iProc PCIe, Cygnus PCIe PHY, PWM, USB BDC, BCM6328 LEDs, TMON,
SYSTEMPORT, AMAC, Northstar 2 PCIe PHY, GENET, moca PHY, GISB
arbiter, and SATA
- Add binding schemas for Tegra210 EMC table, TI DC-DC converters,
- Clean-ups of MDIO bus schemas to fix 'unevaluatedProperties' issues
- More fixes due to 'unevaluatedProperties' enabling
- Data type fixes and clean-ups of binding examples found in
preparation to move to validating DTB files directly (instead of
intermediate YAML representation.
- Vendor prefixes for T-Head Semiconductor, OnePlus, and Sunplus
- Add various new compatible strings
DT core:
- Silence a warning for overlapping reserved memory regions
- Reimplement unittest overlay tracking
- Fix stack frame size warning in unittest
- Clean-ups of early FDT scanning functions
- Fix handling of "linux,usable-memory-range" on EFI booted systems
- Add support for 'fail' status on CPU nodes
- Improve error message in of_phandle_iterator_next()
- kbuild: Disable duplicate unit-address warnings for disabled nodes"
* tag 'devicetree-for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (114 commits)
dt-bindings: net: mdio: Drop resets/reset-names child properties
dt-bindings: clock: samsung: convert S5Pv210 to dtschema
dt-bindings: clock: samsung: convert Exynos5410 to dtschema
dt-bindings: clock: samsung: convert Exynos5260 to dtschema
dt-bindings: clock: samsung: extend Exynos7 bindings with UFS
dt-bindings: clock: samsung: convert Exynos7 to dtschema
dt-bindings: clock: samsung: convert Exynos5433 to dtschema
dt-bindings: i2c: maxim,max96712: Add bindings for Maxim Integrated MAX96712
dt-bindings: iio: adi,ltc2983: Fix 64-bit property sizes
dt-bindings: power: maxim,max17040: Fix incorrect type for 'maxim,rcomp'
dt-bindings: interrupt-controller: arm,gic-v3: Fix 'interrupts' cell size in example
dt-bindings: iio/magnetometer: yamaha,yas530: Fix invalid 'interrupts' in example
dt-bindings: clock: imx5: Drop clock consumer node from example
dt-bindings: Drop required 'interrupt-parent'
dt-bindings: net: ti,dp83869: Drop value on boolean 'ti,max-output-impedance'
dt-bindings: net: wireless: mt76: Fix 8-bit property sizes
dt-bindings: PCI: snps,dw-pcie-ep: Drop conflicting 'max-functions' schema
dt-bindings: i2c: st,stm32-i2c: Make each example a separate entry
dt-bindings: net: stm32-dwmac: Make each example a separate entry
dt-bindings: net: Cleanup MDIO node schemas
...
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Pick a fix which didn't make it into v5.16.
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resets/reset-names are device specific and don't belong in the MDIO bus
schema. For example, it doesn't match what is defined for the
"qca,ar9331-switch" binding which defines "reset-names" to be "switch"
rather than "phy". Neither name is that useful IMO.
Other child properties are also device specific, but those won't conflict
with device schemas.
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220111170248.3160841-1-robh@kernel.org
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Convert Samsung S5Pv210 SoC clock controller bindings to DT schema
format.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220102115356.75796-8-krzysztof.kozlowski@canonical.com
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Convert Samsung Exynos5410 SoC clock controller bindings to DT schema
format.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220102115356.75796-7-krzysztof.kozlowski@canonical.com
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Convert Samsung Exynos5260 SoC clock controller bindings to DT schema
format.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220102115356.75796-6-krzysztof.kozlowski@canonical.com
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The UFS for Exynos7 SoC clock controller requires additional input
clocks for the FSYS1 clock controller. Update the bindings to reflect
this, at least in theory. In practice, these input clocks are ignored,
so it is rather adjusting of bindings to existing DTS, without affecting
any real users. I understand that is not how it should be done,
though...
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220102115356.75796-5-krzysztof.kozlowski@canonical.com
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Convert Samsung Exynos7 SoC clock controller bindings to DT schema
format.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220102115356.75796-4-krzysztof.kozlowski@canonical.com
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Convert Samsung Exynos5433 SoC clock controller bindings to DT schema
format.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220102115356.75796-3-krzysztof.kozlowski@canonical.com
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Add bindings for Maxim Integrated MAX96712 deserializer. The MAX96712
deserializer converts GMSL2 or GMSL1 serial inputs into MIPI CSI-2 D-PHY
or C-PHY formatted outputs.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211230123354.623876-1-niklas.soderlund+renesas@ragnatech.se
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The '/bits/ 64' notation applies the next <> list of values. Another <> list
is encoded as 32-bits by default. IOW, each <> list needs to be preceeded
with '/bits/ 64'.
While the dts format allows this, as a rule we don't mix sizes for DT
properties since all size information is lost in the dtb file.
Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220107032026.2408196-1-robh@kernel.org
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The 'maxim,rcomp' is defined as a uint32, but the description and users all
say it is uint8-array with 1 or 2 elements. The tools missed checking this
case.
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20220107030433.2381616-1-robh@kernel.org
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example
The 2nd example has an interrupts cells size of 4, but the 'interrupts'
property has 3 cells. The example should also be separate since the cell
size differs in each example.
Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20220106182518.1435497-5-robh@kernel.org
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example
'interrupts' does not take a phandle, so remove it in the example.
Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20220106182518.1435497-4-robh@kernel.org
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The example nodes have different sized interrupt cells which is not valid
given no interrupt-parent is specified. As provider examples don't need to
show the consumer side in the first place, just drop the consumer node.
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20220106182518.1435497-1-robh@kernel.org
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'interrupt-parent' is never required as it can be in a parent node or a
parent node itself can be an interrupt provider. Where exactly it lives is
outside the scope of a binding schema.
Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Bartosz Golaszewski <brgl@bgdev.pl>
Link: https://lore.kernel.org/r/20220107031905.2406176-1-robh@kernel.org
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DT booleans don't have a value and 'ti,max-output-impedance' is defined and
used as a boolean. So drop the bogus value in the example.
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220107030513.2385482-1-robh@kernel.org
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The '/bits/ 8' notation applies the next <> list of values. Another <> list
is encoded as 32-bits by default. IOW, each <> list needs to be preceeded
with '/bits/ 8'.
While the dts format allows this, as a rule we don't mix sizes for DT
properties since all size information is lost in the dtb file.
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220107030419.2380198-1-robh@kernel.org
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'max-functions' is already defined in pci-ep.yaml schema as a uint8 and all
users of it expect an uint8. Drop the conflicting schema.
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220107030358.2378221-1-robh@kernel.org
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Each independent example should be a separate entry. This allows for
'interrupts' to have different cell sizes.
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220106183037.1443931-1-robh@kernel.org
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Each independent example should be a separate entry. This allows for
'interrupts' to have different cell sizes.
The first example also has a phandle in 'interrupts', so drop the phandle.
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220106182518.1435497-8-robh@kernel.org
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The schemas for MDIO bus nodes range from missing to duplicating
everything in mdio.yaml. The MDIO bus node schemas only need to
reference mdio.yaml, define any binding specific properties, and define
'unevaluatedProperties: false'. This ensures that MDIO nodes only
contain defined properties. With this, any duplicated properties can
be removed.
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Jakub Kicinski <kuba@kernel.org>
Cc: Maxime Ripard <mripard@kernel.org>
Cc: Chen-Yu Tsai <wens@csie.org>
Cc: Vivien Didelot <vivien.didelot@gmail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Vladimir Oltean <olteanv@gmail.com>
Cc: Joakim Zhang <qiangqing.zhang@nxp.com>
Cc: Heiner Kallweit <hkallweit1@gmail.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Cc: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Cc: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
Cc: "Fernández Rojas" <noltari@gmail.com>
Cc: John Crispin <john@phrozen.org>
Cc: "G. Jaya Kumaran" <vineetha.g.jaya.kumaran@intel.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Joel Stanley <joel@jms.id.au>
Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Cc: Oleksij Rempel <o.rempel@pengutronix.de>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Cc: Jose Abreu <joabreu@synopsys.com>
Cc: netdev@vger.kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/20220105151009.3093506-1-robh@kernel.org
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With 'unevaluatedProperties' support implemented, the following warnings
are generated in the net bindings:
Documentation/devicetree/bindings/net/qca,ar71xx.example.dt.yaml: ethernet@19000000: Unevaluated properties are not allowed ('qca,ethcfg' was unexpected)
Documentation/devicetree/bindings/net/stm32-dwmac.example.dt.yaml: ethernet@40028000: Unevaluated properties are not allowed ('reg-names', 'snps,pbl' were unexpected)
Documentation/devicetree/bindings/net/ti,cpsw-switch.example.dt.yaml: mdio@1000: Unevaluated properties are not allowed ('clocks', 'clock-names' were unexpected)
Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.example.dt.yaml: mdio@f00: Unevaluated properties are not allowed ('clocks', 'clock-names' were unexpected)
Add the missing properties/nodes as necessary.
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Jakub Kicinski <kuba@kernel.org>
Cc: "Andreas Färber" <afaerber@suse.de>
Cc: Manivannan Sadhasivam <mani@kernel.org>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Cc: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
Cc: "G. Jaya Kumaran" <vineetha.g.jaya.kumaran@intel.com>
Cc: Oleksij Rempel <o.rempel@pengutronix.de>
Cc: Christophe Roullier <christophe.roullier@foss.st.com>
Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: netdev@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-actions@lists.infradead.org
Cc: linux-stm32@st-md-mailman.stormreply.com
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211206174153.2296977-1-robh@kernel.org
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compatibles
With 'unevaluatedProperties' support implemented, the properties
'snps,pbl', 'snps,txpbl', and 'snps,rxpbl' are not allowed in the
examples for some of the DWMAC versions:
Documentation/devicetree/bindings/net/intel,dwmac-plat.example.dt.yaml: ethernet@3a000000: Unevaluated properties are not allowed ('snps,pbl', 'mdio0' were unexpected)
Documentation/devicetree/bindings/net/stm32-dwmac.example.dt.yaml: ethernet@5800a000: Unevaluated properties are not allowed ('reg-names', 'snps,pbl' were unexpected)
Documentation/devicetree/bindings/net/stm32-dwmac.example.dt.yaml: ethernet@40028000: Unevaluated properties are not allowed ('reg-names', 'snps,pbl' were unexpected)
Documentation/devicetree/bindings/net/stm32-dwmac.example.dt.yaml: ethernet@40027000: Unevaluated properties are not allowed ('reg-names', 'snps,pbl' were unexpected)
Documentation/devicetree/bindings/net/toshiba,visconti-dwmac.example.dt.yaml: ethernet@28000000: Unevaluated properties are not allowed ('snps,txpbl', 'snps,rxpbl', 'mdio0' were unexpected)
This appears to be an oversight, so fix it by allowing the properties
on the v3.50a, v4.10a, and v4.20a versions of the DWMAC.
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Jakub Kicinski <kuba@kernel.org>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Cc: Jose Abreu <joabreu@synopsys.com>
Cc: netdev@vger.kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20211206174147.2296770-1-robh@kernel.org
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An MDIO bus can have devices other than ethernet PHYs on it, so it
should allow for any node name rather than just 'ethernet-phy'.
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Heiner Kallweit <hkallweit1@gmail.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Jakub Kicinski <kuba@kernel.org>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: netdev@vger.kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Link: https://lore.kernel.org/r/20211206174139.2296497-1-robh@kernel.org
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Add vendor prefix for Sunplus Technology Co., Ltd. (http://www.sunplus.com)
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Qin Jian <qinjian@cqplus1.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/2e74a1339a5ea54d92fdc4d1998a2b169e23b82b.1640154492.git.qinjian@cqplus1.com
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