summaryrefslogtreecommitdiffstats
path: root/Documentation/devicetree (follow)
Commit message (Collapse)AuthorAgeFilesLines
* ir-rx51: add DT support to driverIvaylo Dimitrov2016-06-301-0/+20
| | | | | | | | | | | With the upcoming removal of legacy boot, lets add support to one of the last N900 drivers remaining without it. As the driver still uses omap dmtimer, add auxdata as well. Signed-off-by: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Pali Rohár <pali.rohar@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* pwm: omap-dmtimer: Allow for setting dmtimer clock sourceIvaylo Dimitrov2016-06-301-0/+4
| | | | | | | | | | | | | | | | OMAP GP timers can have different input clocks that allow different PWM frequencies. However, there is no other way of setting the clock source but through clocks or clock-names properties of the timer itself. This limits PWM functionality to only the frequencies allowed by the particular clock source. Allowing setting the clock source by PWM rather than by timer allows different PWMs to have different ranges by not hard-wiring the clock source to the timer. Signed-off-by: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Pali Rohár <pali.rohar@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2016-05-297-9/+9
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull more MIPS updates from Ralf Baechle: "This is the secondnd batch of MIPS patches for 4.7. Summary: CPS: - Copy EVA configuration when starting secondary VPs. EIC: - Clear Status IPL. Lasat: - Fix a few off by one bugs. lib: - Mark intrinsics notrace. Not only are the intrinsics uninteresting, it would cause infinite recursion. MAINTAINERS: - Add file patterns for MIPS BRCM device tree bindings. - Add file patterns for mips device tree bindings. MT7628: - Fix MT7628 pinmux typos. - wled_an pinmux gpio. - EPHY LEDs pinmux support. Pistachio: - Enable KASLR VDSO: - Build microMIPS VDSO for microMIPS kernels. - Fix aliasing warning by building with `-fno-strict-aliasing' for debugging but also tracing them might result in recursion. Misc: - Add missing FROZEN hotplug notifier transitions. - Fix clk binding example for varioius PIC32 devices. - Fix cpu interrupt controller node-names in the DT files. - Fix XPA CPU feature separation. - Fix write_gc0_* macros when writing zero. - Add inline asm encoding helpers. - Add missing VZ accessor microMIPS encodings. - Fix little endian microMIPS MSA encodings. - Add 64-bit HTW fields and fix its configuration. - Fix sigreturn via VDSO on microMIPS kernel. - Lots of typo fixes. - Add definitions of SegCtl registers and use them" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (49 commits) MIPS: Add missing FROZEN hotplug notifier transitions MIPS: Build microMIPS VDSO for microMIPS kernels MIPS: Fix sigreturn via VDSO on microMIPS kernel MIPS: devicetree: fix cpu interrupt controller node-names MIPS: VDSO: Build with `-fno-strict-aliasing' MIPS: Pistachio: Enable KASLR MIPS: lib: Mark intrinsics notrace MIPS: Fix 64-bit HTW configuration MIPS: Add 64-bit HTW fields MAINTAINERS: Add file patterns for mips device tree bindings MAINTAINERS: Add file patterns for mips brcm device tree bindings MIPS: Simplify DSP instruction encoding macros MIPS: Add missing tlbinvf/XPA microMIPS encodings MIPS: Fix little endian microMIPS MSA encodings MIPS: Add missing VZ accessor microMIPS encodings MIPS: Add inline asm encoding helpers MIPS: Spelling fix lets -> let's MIPS: VR41xx: Fix typo MIPS: oprofile: Fix typo MIPS: math-emu: Fix typo ...
| * MIPS: devicetree: fix cpu interrupt controller node-namesAntony Pavlov2016-05-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Here is the quote from [1]: The unit-address must match the first address specified in the reg property of the node. If the node has no reg property, the @ and unit-address must be omitted and the node-name alone differentiates the node from other nodes at the same level This patch adjusts MIPS dts-files and devicetree binding documentation in accordance with [1]. [1] Power.org(tm) Standard for Embedded Power Architecture(tm) Platform Requirements (ePAPR). Version 1.1 – 08 April 2011. Chapter 2.2.1.1 Node Name Requirements Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13345/ Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * dt/bindings: Correct clk binding example for PIC32 gpio.Purna Chandra Mandal2016-05-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update binding example based on new clock binding scheme. [1] Documentation/devicetree/bindings/clock/microchip,pic32.txt Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Acked-by: Rob Herring <robh@kernel.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Kumar Gala <galak@codeaurora.org> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: linux-gpio@vger.kernel.org Cc: Mark Rutland <mark.rutland@arm.com> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13270/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * dt/bindings: Correct clk binding example for PIC32 WDT.Purna Chandra Mandal2016-05-281-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update binding example based on new clock binding scheme. [1] Documentation/devicetree/bindings/clock/microchip,pic32.txt Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Acked-by: Rob Herring <robh@kernel.org> Cc: Kumar Gala <galak@codeaurora.org> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Joshua Henderson <digitalpeer@digitalpeer.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13269/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * dt/bindings: Correct clk binding example for PIC32 DMT.Purna Chandra Mandal2016-05-281-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update binding example based on new clock binding scheme. [1] Documentation/devicetree/bindings/clock/microchip,pic32.txt Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Acked-by: Rob Herring <robh@kernel.org> Cc: Kumar Gala <galak@codeaurora.org> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Joshua Henderson <digitalpeer@digitalpeer.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13268/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * dt/bindings: Correct clk binding example for PIC32 serial.Purna Chandra Mandal2016-05-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update binding example based on new clock binding scheme. [1] Documentation/devicetree/bindings/clock/microchip,pic32.txt Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Acked-by: Rob Herring <robh@kernel.org> Cc: Kumar Gala <galak@codeaurora.org> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Joshua Henderson <digitalpeer@digitalpeer.com> Cc: Andrei Pistirica <andrei.pistirica@microchip.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13267/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * dt/bindings: Correct clk binding example for PIC32 pinctrlPurna Chandra Mandal2016-05-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update binding example based on new clock binding scheme. [1] Documentation/devicetree/bindings/clock/microchip,pic32.txt Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Acked-by: Rob Herring <robh@kernel.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Kumar Gala <galak@codeaurora.org> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Joshua Henderson <digitalpeer@digitalpeer.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13266/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * dt/bindings: Correct clk binding example for PIC32 SDHCIPurna Chandra Mandal2016-05-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update binding example based on new clock binding documentation. [1] Documentation/devicetree/bindings/clock/microchip,pic32.txt Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Acked-by: Rob Herring <robh@kernel.org> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Kumar Gala <galak@codeaurora.org> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Joshua Henderson <digitalpeer@digitalpeer.com> Cc: Andrei Pistirica <andrei.pistirica@microchip.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ulf Hansson <ulf.hansson@linaro.org> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13265/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | Merge tag 'sound-4.7-rc1-2' of ↵Linus Torvalds2016-05-286-11/+104
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound Pull more sound updates from Takashi Iwai: "This is the second update round for 4.7-rc1. Most of changes are about the pending ASoC updates and fixes, including a few new drivers. Below are some highlights: ASoC: - New drivers for MAX98371 and TAS5720 - SPI support for TLV320AIC32x4, along with the module split - TDM support for STI Uniperf IPs - Remaining topology API fixes / updates HDA: - A couple of Dell quirks and new Realtek codec support" * tag 'sound-4.7-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (63 commits) ALSA: hda - Fix headset mic detection problem for one Dell machine spi: spi-ep93xx: Fix the PTR_ERR() argument ALSA: hda/realtek - Add support for ALC295/ALC3254 ASoC: kirkwood: fix build failure ALSA: hda - Fix headphone noise on Dell XPS 13 9360 ASoC: ak4642: Enable cache usage to fix crashes on resume ASoC: twl6040: Disconnect AUX output pads on digital mute ASoC: tlv320aic32x4: Properly implement the positive and negative pins into the mixers rcar: src: skip disabled-SRC nodes ASoC: max98371 Remove duplicate entry in max98371_reg ASoC: twl6040: Select LPPLL during standby ASoC: rsnd: don't use prohibited number to PDMACHCRn.SRS ASoC: simple-card: Add pm callbacks to platform driver ASoC: pxa: Fix module autoload for platform drivers ASoC: topology: Fix memory leak in widget creation ASoC: Add max98371 codec driver ASoC: rsnd: count .probe/.remove for rsnd_mod_call() ASoC: topology: Check size mismatch of ABI objects before parsing ASoC: topology: Check failure to create a widget ASoC: add support for TAS5720 digital amplifier ...
| * \ Merge remote-tracking branch 'asoc/topic/sti' into asoc-nextMark Brown2016-05-271-7/+41
| |\ \
| | * | ASoC: sti-asoc-card: update tdm modeMoise Gergaud2016-04-191-5/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Add "TDM" in the st,mode property list - st,mode property is also mandatory for reader - add tdm playback dai-link example Signed-off-by: Moise Gergaud <moise.gergaud@st.com> Acked-by: Arnaud Pouliquen <arnaud.pouliquen@st.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | ASoC: sti: correct typo errorsMoise Gergaud2016-04-011-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Moise Gergaud <moise.gergaud@st.com> Acked-by: Arnaud Pouliquen <arnaud.pouliquen@st.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | Merge remote-tracking branch 'asoc/topic/mtk' into asoc-nextMark Brown2016-05-272-2/+13
| |\ \ \
| | * | | ASoC: mediatek: Add HDMI dai-links in the mt8173-rt5650-rt5676 machine driverKoro Chen2016-04-211-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This creates pcmC0D2p for the HDMI playback in the same card. Signed-off-by: Koro Chen <koro.chen@mediatek.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | | ASoC: mediatek: Add second I2S on mt8173-rt5650 machine driverPC Liao2016-04-211-0/+10
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds second I2S connection to rt5650 codec for capture path on mt8173-rt5650 machine driver. Signed-off-by: PC Liao <pc.liao@mediatek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | Merge remote-tracking branch 'asoc/topic/tas5270' into asoc-nextMark Brown2016-05-272-2/+33
| |\ \ \
| | * | | ASoC: add TA5720 digital amplifier DT bindingsAndreas Dannenberg2016-04-271-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Texas Instruments TAS5720L/M device is a high-efficiency mono Class-D audio power amplifier optimized for high transient power capability to use the dynamic power headroom of small loudspeakers. Its digital time division multiplexed (TDM) interface enables up to 16 devices to share the same bus. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | | ASoC: tas571x: new chip added into TAS571x bindingPetr Kulhavy2016-03-311-2/+8
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds the TAS5721 into the TAS571x binding. Signed-off-by: Petr Kulhavy <petr@barix.com> Reviewed-by: Kevin Cernekee <cernekee@chromium.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | Merge remote-tracking branch 'asoc/topic/max98371' into asoc-nextMark Brown2016-05-271-0/+17
| |\ \ \
| | * | | ASoC: Add max98371 codec driveranish kumar2016-04-281-0/+17
| | |/ / | | | | | | | | | | | | | | | | Signed-off-by: anish kumar <yesanishhere@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | Merge tag 'asoc-v4.7' into asoc-linusMark Brown2016-05-253-2/+71
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ASoC: Updates for v4.7 The updates this time around are almost all driver code: - Further slow progress on the topology code. - Substantial updates and improvements for the da7219, es8328, fsl-ssi Intel and rcar drivers. # gpg: Signature made Mon 16 May 2016 12:08:43 BST using RSA key ID 5D5487D0 # gpg: Good signature from "Mark Brown <broonie@sirena.org.uk>" # gpg: aka "Mark Brown <broonie@debian.org>" # gpg: aka "Mark Brown <broonie@kernel.org>" # gpg: aka "Mark Brown <broonie@tardis.ed.ac.uk>" # gpg: aka "Mark Brown <broonie@linaro.org>" # gpg: aka "Mark Brown <Mark.Brown@linaro.org>" # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 3F25 68AA C269 98F9 E813 A1C5 C3F4 36CA 30F5 D8EB # Subkey fingerprint: ADE6 68AA 6757 18B5 9FE2 9FEA 24D6 8B72 5D54 87D0
* | \ \ \ Merge tag 'for-linus-20160527' of git://git.infradead.org/linux-mtdLinus Torvalds2016-05-272-2/+3
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MTD fixes from Brian Norris: "We've already noticed a few flaws in the MTD work for v4.7-rc1: - The Atmel folks got ahead of themselves on trying to support their latest hardware and were working off incorrect documentation. Fix up the NAND driver to get this correct. - Fix up device tree example documentation to use the latest recommendations for describing NAND ECC algorithms" * tag 'for-linus-20160527' of git://git.infradead.org/linux-mtd: Documentation: dt: mtd: drop "soft_bch" from example Revert "mtd: atmel_nand: Support variable RB_EDGE interrupts"
| * | | | | Documentation: dt: mtd: drop "soft_bch" from exampleBaruch Siach2016-05-271-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 32698aafc9f0 (Documentation: devicetree: deprecate "soft_bch" nand-ecc-mode value, 2016-04-22) deprecated "soft_bch". Update the example to match. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Acked-by: Rafał Miłecki <zajec5@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | | Revert "mtd: atmel_nand: Support variable RB_EDGE interrupts"Wenyou Yang2016-05-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 5ddc7bd43ccc ("mtd: atmel_nand: Support variable RB_EDGE interrupts") Because for current SoCs, the RB_EDGE3(i.e. bit 27) of HSMC_SR register does not exist, the RB_EDGE0 (i.e. bit 24) is the ready/busy line edge status bit. It is a datasheet bug. Cc: <stable@vger.kernel.org> Fixes: commit 5ddc7bd43ccc ("mtd: atmel_nand: Support variable RB_EDGE interrupts") Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | | | | | Merge branch 'next' of ↵Linus Torvalds2016-05-264-1/+118
|\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux Pull thermal management updates from Zhang Rui: - Introduce generic ADC thermal driver, based on OF thermal (Laxman Dewangan) - Introduce new thermal driver for Tango chips (Marc Gonzalez) - Rockchip driver support for RK3399, RK3366, and some fixes (Caesar Wang, Elaine Zhang and Shawn Lin) - Add CPU power cooling model to Mediatek thermal driver (Dawei Chien) - Wider usage of dev_thermal_zone_of_sensor_register (Eduardo Valentin) - TI thermal driver gained a new maintainer (Keerthy). - Enabled powerclamp driver by checking CPU feature and package cstate counter instead of CPU whitelist (Jacob Pan) - Various fixes on thermal governor, OF thermal, Tegra, and RCAR * 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux: (50 commits) thermal: tango: initialize TEMPSI_CFG thermal: rockchip: use the usleep_range instead of udelay thermal: rockchip: add the notes for better reading thermal: rockchip: Support RK3366 SoCs in the thermal driver thermal: rockchip: handle the power sequence for tsadc controller thermal: rockchip: update the tsadc table for rk3399 thermal: rockchip: fixes the code_to_temp for tsadc driver thermal: rockchip: disable thermal->clk in err case thermal: tegra: add Tegra132 specific SOC_THERM driver thermal: fix ptr_ret.cocci warnings thermal: mediatek: Add cpu dynamic power cooling model. thermal: generic-adc: Add ADC based thermal sensor driver thermal: generic-adc: Add DT binding for ADC based thermal sensor thermal: tegra: fix static checker warning thermal: tegra: mark PM functions __maybe_unused thermal: add temperature sensor support for tango SoC thermal: hisilicon: fix IRQ imbalance enabling thermal: hisilicon: support to use any sensor thermal: rcar: Remove binding docs for r8a7794 thermal: tegra: add PM support ...
| * | | | | | thermal: generic-adc: Add DT binding for ADC based thermal sensorLaxman Dewangan2016-05-171-0/+89
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sometimes, thermal sensors like NCT thermistors are connected to the ADC channel. The temperature is read by reading the voltage across the sensor resistance via ADC and referring the lookup table for ADC value to temperature. Add DT binding doc for the ADC based thermal sensor driver to detail the DT property and provide the example for how to use it. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Acked-by: Rob Herring <rob@kernel.org> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
| * | | | | | thermal: add temperature sensor support for tango SoCMarc Gonzalez2016-05-171-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Tango thermal driver provides support for the primitive temperature sensor embedded in Tango chips since the SMP8758. This sensor only generates a 1-bit signal to indicate whether the die temperature exceeds a programmable threshold. Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
| * | | | | | thermal: rcar: Remove binding docs for r8a7794Simon Horman2016-05-171-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The latest information that I have is that there is no thermal IP block present on the r8a7794 SoC so remove the corresponding binding. Cc: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
| * | | | | | of: add notes of critical trips for socthermWei Ni2016-05-171-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The "critical" type trip in thermal zone can be set to SOC_THERM hardware, it can trigger shut down or reset event from hardware. Signed-off-by: Wei Ni <wni@nvidia.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
* | | | | | | Merge git://www.linux-watchdog.org/linux-watchdogLinus Torvalds2016-05-252-1/+28
|\ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull watchdog updates from Wim Van Sebroeck: - add support for Fintek F81865 Super-IO chip - add support for watchdogs (RWDT and SWDT) found on RCar Gen3 based SoCs from Renesas - octeon: Handle the FROZEN hot plug notifier actions - f71808e_wdt fixes and cleanups - some small improvements in code and documentation * git://www.linux-watchdog.org/linux-watchdog: MAINTAINERS: Add file patterns for watchdog device tree bindings Documentation: Add ebc-c384_wdt watchdog-parameters.txt entry watchdog: shwdt: Use setup_timer() watchdog: cpwd: Use setup_timer() arm64: defconfig: enable Renesas Watchdog Timer watchdog: renesas-wdt: add driver watchdog: remove error message when unable to allocate watchdog device watchdog: f71808e_wdt: Fix WDTMOUT_STS register read watchdog: f71808e_wdt: Fix typo watchdog: f71808e_wdt: Add F81865 support watchdog: sp5100_tco: properly check for new register layouts watchdog: core: Fix circular locking dependency watchdog: core: fix trivial typo in a comment watchdog: hpwdt: Adjust documentation to match latest kernel module parameters. watchdog: imx2_wdt: add external reset support via dt prop watchdog: octeon: Handle the FROZEN hot plug notifier actions. watchdog: qcom: Report reboot reason
| * | | | | | | watchdog: renesas-wdt: add driverWolfram Sang2016-05-141-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for watchdogs (RWDT and SWDT) found on RCar Gen3 based SoCs from Renesas. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
| * | | | | | | watchdog: imx2_wdt: add external reset support via dt propTim Harvey2016-05-141-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The IMX6 watchdog supports assertion of a signal (WDOG_B) which can be pinmux'd to an external pin. This is typically used for boards that have PMIC's in control of the IMX6 power rails. In fact, failure to use such an external reset on boards with external PMIC's can result in various hangs due to the IMX6 not being fully reset [1] as well as the board failing to reset because its PMIC has not been reset to provide adequate voltage for the CPU when coming out of reset at 800Mhz. This uses a new device-tree property 'fsl,ext-reset-output' to indicate the board has such a reset and to cause the watchdog to be configured to assert WDOG_B instead of an internal reset both on a watchdog timeout and in system_restart. [1] http://lists.infradead.org/pipermail/linux-arm-kernel/2015-March/333689.html Cc: Fabio Estevam <festevam@gmail.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Stefan Roese <sr@denx.de> Cc: Iain Paton <ipaton0@gmail.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Akshay Bhat <akshay.bhat@timesys.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
* | | | | | | | Merge tag 'spi-v4.7' of ↵Linus Torvalds2016-05-243-2/+53
|\ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi Pull spi updates from Mark Brown: "Another quiet release for SPI, almost entirely driver specific changes with the diffstat dominated by two new drivers which are about two thirds of it in terms of lines of code: - new drivers for PIC32 standard and SQI controllers - the Cadence driver has had runtime PM support added and quite a few fixes and cleanups - flash-specific accelerated path support now has a feature query interface - the pxa2xx driver has been moved to use the core DMA mapping support" * tag 'spi-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (48 commits) spi: pic32-sqi: Fix linker error, undefined reference to `bad_dma_ops' spi: dw-pci: Spelling s/paltforms/platforms/g spi: pic32-sqi: Remove pic32_sqi_setup and pic32_sqi_cleanup spi: Fix simple typo s/impelment/implement spi: rockchip: potential NULL dereference on error spi: zynqmp: disable clocks in error paths spi: Drop unnecessary dependencies on relaxed I/O accessors spi: qup: Add spi_master_put in remove function spi: qup: Handle clocks in pm_runtime suspend and resume spi: st-ssc4: Fix missing spi_master_put in spi_st_probe error paths spi: st-ssc4: Allow compile test build spi: omap2-mcspi: Use dma_request_chan() for requesting DMA channel spi: davinci: Use dma_request_chan() for requesting DMA channel spi: pic32: Fix checking return value of devm_ioremap_resource spi: spi-fsl-dspi: Update DT binding documentation spi: Drop duplicate code to set master->dev.parent spi: pic32: Set proper bits_per_word_mask spi: return error if kmap'd buffers passed to spi_map_buf() spi: core: add hook flash_read_supported to spi_master spi: pic32-sqi: silence array overflow warning ...
| | \ \ \ \ \ \ \
| | \ \ \ \ \ \ \
| | \ \ \ \ \ \ \
| | \ \ \ \ \ \ \
| | \ \ \ \ \ \ \
| | \ \ \ \ \ \ \
| *-----. \ \ \ \ \ \ \ Merge remote-tracking branches 'spi/topic/octeon', 'spi/topic/omap2-mcspi', ↵Mark Brown2016-05-232-0/+52
| |\ \ \ \ \ \ \ \ \ \ \ | | | | |_|_|_|_|_|_|/ / | | | |/| | | | | | | | | | | | | | | | | | | | 'spi/topic/orion', 'spi/topic/pic32' and 'spi/topic/pic32-qspi' into spi-next
| | | | | * | | | | | | spi: pic32-sqi: add binding document for PIC32 Quad-SPI driver.Purna Chandra Mandal2016-04-181-0/+18
| | | | |/ / / / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Document Device tree bindings for the quad SPI peripheral found on Microchip PIC32 class devices. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Acked-by: Rob Herring <rob@kernel.org> Cc: Kumar Gala <galak@codeaurora.org> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mark Brown <broonie@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | * / / / / / / spi: pic32: Add bindings for PIC32 SPI peripheralPurna Chandra Mandal2016-04-041-0/+34
| | | |/ / / / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Document the devicetree bindings for the SPI peripheral found on Microchip PIC32 class devices. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | | | | | | |
| | \ \ \ \ \ \ \ \
| *-. \ \ \ \ \ \ \ \ Merge remote-tracking branches 'spi/topic/dw', 'spi/topic/flash-read', ↵Mark Brown2016-05-231-2/+1
| |\ \ \ \ \ \ \ \ \ \ | | | |_|/ / / / / / / | | |/| | | | | / / / | | |_|_|_|_|_|/ / / | |/| | | | | | | | 'spi/topic/fsl-dspi', 'spi/topic/fsl-espi' and 'spi/topic/kconfig' into spi-next
| | | * | | | | | | spi: spi-fsl-dspi: Update DT binding documentationYuan Yao2016-04-271-2/+1
| | | |/ / / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DSPI driver support the register on the controller with big endian mode R/W. But not use the regmap API. So update the binding documentation for "big-endian". Signed-off-by: Yuan Yao <yao.yuan@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* | | | | | | | | Merge tag 'for-linus-20160523' of git://git.infradead.org/linux-mtdLinus Torvalds2016-05-244-7/+75
|\ \ \ \ \ \ \ \ \ | | |_|_|_|_|/ / / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MTD updates from Brian Norris: "First cycle with Boris as NAND maintainer! Many (most) bullets stolen from him. Generic: - Migrated NAND LED trigger to be a generic MTD trigger NAND: - Introduction of the "ECC algorithm" concept, to avoid overloading the ECC mode field too much more - Replaced the nand_ecclayout infrastructure with something a little more flexible (finally!) and future proof - Rework of the OMAP GPMC and NAND drivers; the TI folks pulled some of this into their own tree as well - Prepare the sunxi NAND driver to receive DMA support - Handle bitflips in erased pages on GPMI revisions that do not support this in hardware. SPI NOR: - Start using the spi_flash_read() API for SPI drivers that support it (i.e., SPI drivers with special memory-mapped flash modes) And other small scattered improvments" * tag 'for-linus-20160523' of git://git.infradead.org/linux-mtd: (155 commits) mtd: spi-nor: support GigaDevice gd25lq64c mtd: nand_bch: fix spelling of "probably" mtd: brcmnand: respect ECC algorithm set by NAND subsystem gpmi-nand: Handle ECC Errors in erased pages Documentation: devicetree: deprecate "soft_bch" nand-ecc-mode value mtd: nand: add support for "nand-ecc-algo" DT property mtd: mtd: drop NAND_ECC_SOFT_BCH enum value mtd: drop support for NAND_ECC_SOFT_BCH as "soft_bch" mapping mtd: nand: read ECC algorithm from the new field mtd: nand: fsmc: validate ECC setup by checking algorithm directly mtd: nand: set ECC algorithm to Hamming on fallback staging: mt29f_spinand: set ECC algorithm explicitly CRIS v32: nand: set ECC algorithm explicitly mtd: nand: atmel: set ECC algorithm explicitly mtd: nand: davinci: set ECC algorithm explicitly mtd: nand: bf5xx: set ECC algorithm explicitly mtd: nand: omap2: Fix high memory dma prefetch transfer mtd: nand: omap2: Start dma request before enabling prefetch mtd: nandsim: add __init attribute mtd: nand: move of_get_nand_xxx() helpers into nand_base.c ...
| * | | | | | | | Documentation: devicetree: deprecate "soft_bch" nand-ecc-mode valueRafał Miłecki2016-05-051-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that we support nand-ecc-algo property it should be used together with "soft" to specify software BCH ECC. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| * | | | | | | | mtd: nand: add support for "nand-ecc-algo" DT propertyRafał Miłecki2016-05-051-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | So far it was only possible to specify ECC algorithm using "soft" and "soft_bch" values of nand-ecc-mode prop. There wasn't a way to specify it for a hardware ECC mode. Now that we have independent field in NAND subsystem for storing info about ECC algorithm we may also add support for this new DT property. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| * | | | | | | | mtd: brcmnand: Add support for v6.2 controllersFlorian Fainelli2016-04-191-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Document and match the brcm,brcmnand-v6.2 compatible string, the controller has a register layout identical to the v6.0 version and supports prefetch. Update the command shift logic to account for v6.2 controller which are the first ones to use a shift of 0 (6.1 used a shift of 24). Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| * | | | | | | | mtd: nand: document the NAND controller/NAND chip DT representationBoris Brezillon2016-04-191-1/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Standardize the NAND controller/NAND chip DT representation. Now, all new NAND controller drivers should comply with this representation, even if they are only supporting a single NAND chip. Existing drivers can keep support for the old representation (where only the NAND chip was described), but are encouraged to also support the new one. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Rob Herring <robh@kernel.org>
| * | | | | | | | mtd: nand: omap2: Implement NAND ready using gpiolibRoger Quadros2016-04-151-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The GPMC WAIT pin status are now available over gpiolib. Update the omap_dev_ready() function to use gpio instead of directly accessing GPMC register space. Signed-off-by: Roger Quadros <rogerq@ti.com> Acked-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Tony Lindgren <tony@atomide.com>
| * | | | | | | | memory: omap-gpmc: Support WAIT pin edge interruptsRoger Quadros2016-04-151-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAPs can have 2 to 4 WAITPINs that can be used as edge triggered interrupts if not used for memory wait state insertion. Support these interrupts via the gpmc IRQ domain. The gpmc IRQ domain interrupt map is: 0 - NAND_fifoevent 1 - NAND_termcount 2 - GPMC_WAIT0 edge 3 - GPMC_WAIT1 edge, and so on Signed-off-by: Roger Quadros <rogerq@ti.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Tony Lindgren <tony@atomide.com>
| * | | | | | | | memory: omap-gpmc: Support general purpose input for WAITPINsRoger Quadros2016-04-151-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAPs can have 2 to 4 WAITPINs that can be used as general purpose input if not used for memory wait state insertion. The first user will be the OMAP NAND chip to get the NAND read/busy status using gpiolib. Signed-off-by: Roger Quadros <rogerq@ti.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Tony Lindgren <tony@atomide.com>
| * | | | | | | | memory: omap-gpmc: Move device tree binding to correct locationRoger Quadros2016-04-151-0/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | omap-gpmc.c is a memory controller so move the binding to the right place. Signed-off-by: Roger Quadros <rogerq@ti.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Tony Lindgren <tony@atomide.com>
| * | | | | | | | mtd: nand: omap: Update DT binding documentationRoger Quadros2016-04-151-4/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add compatible id and interrupts. The NAND interrupts are provided by the GPMC controller node. Signed-off-by: Roger Quadros <rogerq@ti.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Tony Lindgren <tony@atomide.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-01 11:45:59 +0100