| Commit message (Expand) | Author | Files | Lines | |
|---|---|---|---|---|
| 2018-09-25 | clk: renesas: r8a77970: Add TPU clock | Sergei Shtylyov | 1 | -0/+1 |
| 2018-09-25 | clk: renesas: r8a77990: Fix incorrect PLL0 divider in comment | Geert Uytterhoeven | 1 | -2/+2 |
| 2018-09-19 | dt-bindings: clock: renesas: cpg-mssr: Document r8a774c0 | Fabrizio Castro | 1 | -2/+4 |
| 2018-09-19 | clk: renesas: cpg-mssr: Add r8a774c0 support | Fabrizio Castro | 5 | -0/+299 |
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