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* fs/seq_file.c: simplify seq_file iteration code and interfaceNeilBrown2018-08-181-21/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The documentation for seq_file suggests that it is necessary to be able to move the iterator to a given offset, however that is not the case. If the iterator is stored in the private data and is stable from one read() syscall to the next, it is only necessary to support first/next interactions. Implementing this in a client is a little clumsy. - if ->start() is given a pos of zero, it should go to start of sequence. - if ->start() is given the name pos that was given to the most recent next() or start(), it should restore the iterator to state just before that last call - if ->start is given another number, it should set the iterator one beyond the start just before the last ->start or ->next call. Also, the documentation says that the implementation can interpret the pos however it likes (other than zero meaning start), but seq_file increments the pos sometimes which does impose on the implementation. This patch simplifies the interface for first/next iteration and simplifies the code, while maintaining complete backward compatability. Now: - if ->start() is given a pos of zero, it should return an iterator placed at the start of the sequence - if ->start() is given a non-zero pos, it should return the iterator in the same state it was after the last ->start or ->next. This is particularly useful for interators which walk the multiple chains in a hash table, e.g. using rhashtable_walk*. See fs/gfs2/glock.c and drivers/staging/lustre/lustre/llite/vvp_dev.c A large part of achieving this is to *always* call ->next after ->show has successfully stored all of an entry in the buffer. Never just increment the index instead. Also: - always pass &m->index to ->start() and ->next(), never a temp variable - don't clear ->from when ->count is zero, as ->from is dead when ->count is zero. Some ->next functions do not increment *pos when they return NULL. To maintain compatability with this, we still need to increment m->index in one place, if ->next didn't increment it. Note that such ->next functions are buggy and should be fixed. A simple demonstration is dd if=/proc/swaps bs=1000 skip=1 Choose any block size larger than the size of /proc/swaps. This will always show the whole last line of /proc/swaps. This patch doesn't work around buggy next() functions for this case. [neilb@suse.com: ensure ->from is valid] Link: http://lkml.kernel.org/r/87601ryb8a.fsf@notabene.neil.brown.name Signed-off-by: NeilBrown <neilb@suse.com> Acked-by: Jonathan Corbet <corbet@lwn.net> [docs] Tested-by: Jann Horn <jannh@google.com> Cc: Alexander Viro <viro@zeniv.linux.org.uk> Cc: Kees Cook <keescook@chromium.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge branch 'linus' of ↵Linus Torvalds2018-08-164-23/+122
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux-soc-thermal Pull thermal management updates from Eduardo Valentin: - rework tsens driver to add support for tsens-v2 (Amit Kucheria) - rework armada thermal driver to use syscon and multichannel support (Miquel Raynal) - fixes to TI SoC, IMX, Exynos, RCar, and hwmon drivers * 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux-soc-thermal: (34 commits) thermal: armada: fix copy-paste error in armada_thermal_probe() thermal: rcar_thermal: avoid NULL dereference in absence of IRQ resources thermal: samsung: Remove Exynos5440 clock handling left-overs thermal: tsens: Fix negative temperature reporting thermal: tsens: switch from of_iomap() to devm_ioremap_resource() thermal: tsens: Rename variable thermal: tsens: Add generic support for TSENS v2 IP thermal: tsens: Rename tsens-8996 to tsens-v2 for reuse thermal: tsens: Add support to split up register address space into two dt: thermal: tsens: Document the fallback DT property for v2 of TSENS IP thermal: tsens: Get rid of unused fields in structure thermal_hwmon: Pass the originating device down to hwmon_device_register_with_info thermal_hwmon: Sanitize attribute name passed to hwmon dt-bindings: thermal: armada: add reference to new bindings dt-bindings: cp110: add the thermal node in the syscon file dt-bindings: cp110: update documentation since DT de-duplication dt-bindings: ap806: add the thermal node in the syscon file dt-bindings: cp110: prepare the syscon file to list other syscons nodes dt-bindings: ap806: prepare the syscon file to list other syscons nodes dt-bindings: cp110: rename cp110 syscon file ...
| * dt: thermal: tsens: Document the fallback DT property for v2 of TSENS IPAmit Kucheria2018-07-271-6/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We want to create common code for v2 of the TSENS IP block that is used in a large number of Qualcomm SoCs. "qcom,tsens-v2" should be able to handle most of the common functionality start with a common get_temp() function. It is also necessary to split out the memory regions for the TM and SROT register banks because their offsets are not constant across SoC families. Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Tested-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
| * dt-bindings: thermal: armada: add reference to new bindingsMiquel Raynal2018-07-271-0/+5
| | | | | | | | | | | | | | | | | | | | New bindings (using a syscon) are available for AP806 and CP110 compatibles. Add a reference to these files from the original documentation. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
| * dt-bindings: cp110: add the thermal node in the syscon fileMiquel Raynal2018-07-271-0/+37
| | | | | | | | | | | | | | | | | | Explain the thermal bindings now that the thermal IP is described being inside of a system controller. Add a reference to the thermal-zone node. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
| * dt-bindings: cp110: update documentation since DT de-duplicationMiquel Raynal2018-07-271-5/+5
| | | | | | | | | | | | | | | | | | | | CP110 master/slave DT files have been merged in a DT de-duplication work merged in v4.16. Update the syscon documentation accordingly to match the current state of the DT nodes. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
| * dt-bindings: ap806: add the thermal node in the syscon fileMiquel Raynal2018-07-271-0/+38
| | | | | | | | | | | | | | | | | | Explain the thermal bindings now that the thermal IP is described being inside of a system controller. Add a reference to the thermal-zone node. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
| * dt-bindings: cp110: prepare the syscon file to list other syscons nodesMiquel Raynal2018-07-271-7/+7
| | | | | | | | | | | | | | | | | | | | | | There are multiple system controllers in CP110. Because all syscon nodes use the same compatible, it is pertinent to use this same file to list IPs inside it. Thus, change the header to be more generic, and align with AP806 file. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
| * dt-bindings: ap806: prepare the syscon file to list other syscons nodesMiquel Raynal2018-07-271-5/+5
| | | | | | | | | | | | | | | | | | | | There are multiple system controllers in AP806. Because all syscon nodes use the same compatible, it is pertinent to use this same file to list IPs inside it. Thus, change the header to be more generic. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
| * dt-bindings: cp110: rename cp110 syscon fileMiquel Raynal2018-07-271-0/+0
| | | | | | | | | | | | | | | | | | | | | | There is no need to give numbers to system controllers inside the documentation as the syscons use the same compatibles. Furthermore, this approach does not scale very well and would force the creation of a new file each time a new syscon is added in the device tree. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
* | Merge tag 'mailbox-v4.19' of ↵Linus Torvalds2018-08-163-0/+161
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.linaro.org/landing-teams/working/fujitsu/integration Pull mailbox updates from Jassi Brar: - xgene: potential null pointer fix - omap: switch to spdx license and use of_device_get_match_data() to match data - ti-msgmgr: cleanup and optimisation. New TI specific feature - secure proxy thread. - mediatek: add driver for CMDQ controller. - nxp: add driver for MU controller * tag 'mailbox-v4.19' of git://git.linaro.org/landing-teams/working/fujitsu/integration: mailbox: Add support for i.MX messaging unit dt-bindings: mailbox: imx-mu: add generic MU channel support dt-bindings: arm: fsl: add mu binding doc mailbox: add MODULE_LICENSE() for mtk-cmdq-mailbox.c mailbox: mediatek: Add Mediatek CMDQ driver dt-bindings: soc: Add documentation for the MediaTek GCE unit mailbox: ti-msgmgr: Add support for Secure Proxy dt-bindings: mailbox: Add support for secure proxy threads mailbox: ti-msgmgr: Move the memory region name to descriptor mailbox: ti-msgmgr: Change message count mask to be descriptor based mailbox: ti-msgmgr: Allocate Rx channel resources only on request mailbox: ti-msgmgr: Get rid of unused structure members mailbox/omap: use of_device_get_match_data() to get match data mailbox/omap: switch to SPDX license identifier mailbox: xgene-slimpro: Fix potential NULL pointer dereference
| * | dt-bindings: mailbox: imx-mu: add generic MU channel supportOleksij Rempel2018-08-151-3/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | Each MU has four pairs of rx/tx data register with four rx/tx interrupts which can also be used as a separate channel. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
| * | dt-bindings: arm: fsl: add mu binding docDong Aisheng2018-08-151-0/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Messaging Unit module enables two processors within the SoC to communicate and coordinate by passing messages (e.g. data, status and control) through the MU interface. Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
| * | dt-bindings: soc: Add documentation for the MediaTek GCE unitHoulong Wei2018-08-031-0/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds documentation for the MediaTek Global Command Engine (GCE) unit found in MT8173 SoCs. Signed-off-by: Houlong Wei <houlong.wei@mediatek.com> Signed-off-by: HS Liao <hs.liao@mediatek.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
| * | dt-bindings: mailbox: Add support for secure proxy threadsNishanth Menon2018-08-031-0/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Secure Proxy is another communication scheme in Texas Instrument's devices intended to provide an unique communication path from various processors in the System on Chip(SoC) to a central System Controller. Secure proxy is, in effect, an evolution of current generation Message Manager hardware block found in K2G devices. However the following changes have taken place: Secure Proxy instance exposes "threads" or "proxies" which is primary representation of "a" communication channel. Each thread is preconfigured by System controller configuration based on SoC usage requirements. Secure proxy by itself represents a single "queue" of communication but allows the proxies to be independently operated. Each Secure proxy thread can uniquely have their own error and threshold interrupts allowing for more fine control of IRQ handling. Provide an hardware description of the same for device tree representation. See AM65x Technical Reference Manual (SPRUID7, April 2018) for further details: http://www.ti.com/lit/pdf/spruid7 Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
* | | Merge tag 'pci-v4.19-changes' of ↵Linus Torvalds2018-08-1613-15/+427
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull pci updates from Bjorn Helgaas: - Decode AER errors with names similar to "lspci" (Tyler Baicar) - Expose AER statistics in sysfs (Rajat Jain) - Clear AER status bits selectively based on the type of recovery (Oza Pawandeep) - Honor "pcie_ports=native" even if HEST sets FIRMWARE_FIRST (Alexandru Gagniuc) - Don't clear AER status bits if we're using the "Firmware-First" strategy where firmware owns the registers (Alexandru Gagniuc) - Use sysfs_match_string() to simplify ASPM sysfs parsing (Andy Shevchenko) - Remove unnecessary includes of <linux/pci-aspm.h> (Bjorn Helgaas) - Defer DPC event handling to work queue (Keith Busch) - Use threaded IRQ for DPC bottom half (Keith Busch) - Print AER status while handling DPC events (Keith Busch) - Work around IDT switch ACS Source Validation erratum (James Puthukattukaran) - Emit diagnostics for all cases of PCIe Link downtraining (Links operating slower than they're capable of) (Alexandru Gagniuc) - Skip VFs when configuring Max Payload Size (Myron Stowe) - Reduce Root Port Max Payload Size if necessary when hot-adding a device below it (Myron Stowe) - Simplify SHPC existence/permission checks (Bjorn Helgaas) - Remove hotplug sample skeleton driver (Lukas Wunner) - Convert pciehp to threaded IRQ handling (Lukas Wunner) - Improve pciehp tolerance of missed events and initially unstable links (Lukas Wunner) - Clear spurious pciehp events on resume (Lukas Wunner) - Add pciehp runtime PM support, including for Thunderbolt controllers (Lukas Wunner) - Support interrupts from pciehp bridges in D3hot (Lukas Wunner) - Mark fall-through switch cases before enabling -Wimplicit-fallthrough (Gustavo A. R. Silva) - Move DMA-debug PCI init from arch code to PCI core (Christoph Hellwig) - Fix pci_request_irq() usage of IRQF_ONESHOT when no handler is supplied (Heiner Kallweit) - Unify PCI and DMA direction #defines (Shunyong Yang) - Add PCI_DEVICE_DATA() macro (Andy Shevchenko) - Check for VPD completion before checking for timeout (Bert Kenward) - Limit Netronome NFP5000 config space size to work around erratum (Jakub Kicinski) - Set IRQCHIP_ONESHOT_SAFE for PCI MSI irqchips (Heiner Kallweit) - Document ACPI description of PCI host bridges (Bjorn Helgaas) - Add "pci=disable_acs_redir=" parameter to disable ACS redirection for peer-to-peer DMA support (we don't have the peer-to-peer support yet; this is just one piece) (Logan Gunthorpe) - Clean up devm_of_pci_get_host_bridge_resources() resource allocation (Jan Kiszka) - Fixup resizable BARs after suspend/resume (Christian König) - Make "pci=earlydump" generic (Sinan Kaya) - Fix ROM BAR access routines to stay in bounds and check for signature correctly (Rex Zhu) - Add DMA alias quirk for Microsemi Switchtec NTB (Doug Meyer) - Expand documentation for pci_add_dma_alias() (Logan Gunthorpe) - To avoid bus errors, enable PASID only if entire path supports End-End TLP prefixes (Sinan Kaya) - Unify slot and bus reset functions and remove hotplug knowledge from callers (Sinan Kaya) - Add Function-Level Reset quirks for Intel and Samsung NVMe devices to fix guest reboot issues (Alex Williamson) - Add function 1 DMA alias quirk for Marvell 88SS9183 PCIe SSD Controller (Bjorn Helgaas) - Remove Xilinx AXI-PCIe host bridge arch dependency (Palmer Dabbelt) - Remove Aardvark outbound window configuration (Evan Wang) - Fix Aardvark bridge window sizing issue (Zachary Zhang) - Convert Aardvark to use pci_host_probe() to reduce code duplication (Thomas Petazzoni) - Correct the Cadence cdns_pcie_writel() signature (Alan Douglas) - Add Cadence support for optional generic PHYs (Alan Douglas) - Add Cadence power management ops (Alan Douglas) - Remove redundant variable from Cadence driver (Colin Ian King) - Add Kirin MSI support (Xiaowei Song) - Drop unnecessary root_bus_nr setting from exynos, imx6, keystone, armada8k, artpec6, designware-plat, histb, qcom, spear13xx (Shawn Guo) - Move link notification settings from DesignWare core to individual drivers (Gustavo Pimentel) - Add endpoint library MSI-X interfaces (Gustavo Pimentel) - Correct signature of endpoint library IRQ interfaces (Gustavo Pimentel) - Add DesignWare endpoint library MSI-X callbacks (Gustavo Pimentel) - Add endpoint library MSI-X test support (Gustavo Pimentel) - Remove unnecessary GFP_ATOMIC from Hyper-V "new child" allocation (Jia-Ju Bai) - Add more devices to Broadcom PAXC quirk (Ray Jui) - Work around corrupted Broadcom PAXC config space to enable SMMU and GICv3 ITS (Ray Jui) - Disable MSI parsing to work around broken Broadcom PAXC logic in some devices (Ray Jui) - Hide unconfigured functions to work around a Broadcom PAXC defect (Ray Jui) - Lower iproc log level to reduce console output during boot (Ray Jui) - Fix mobiveil iomem/phys_addr_t type usage (Lorenzo Pieralisi) - Fix mobiveil missing include file (Lorenzo Pieralisi) - Add mobiveil Kconfig/Makefile support (Lorenzo Pieralisi) - Fix mvebu I/O space remapping issues (Thomas Petazzoni) - Use generic pci_host_bridge in mvebu instead of ARM-specific API (Thomas Petazzoni) - Whitelist VMD devices with fast interrupt handlers to avoid sharing vectors with slow handlers (Keith Busch) * tag 'pci-v4.19-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (153 commits) PCI/AER: Don't clear AER bits if error handling is Firmware-First PCI: Limit config space size for Netronome NFP5000 PCI/MSI: Set IRQCHIP_ONESHOT_SAFE for PCI-MSI irqchips PCI/VPD: Check for VPD access completion before checking for timeout PCI: Add PCI_DEVICE_DATA() macro to fully describe device ID entry PCI: Match Root Port's MPS to endpoint's MPSS as necessary PCI: Skip MPS logic for Virtual Functions (VFs) PCI: Add function 1 DMA alias quirk for Marvell 88SS9183 PCI: Check for PCIe Link downtraining PCI: Add ACS Redirect disable quirk for Intel Sunrise Point PCI: Add device-specific ACS Redirect disable infrastructure PCI: Convert device-specific ACS quirks from NULL termination to ARRAY_SIZE PCI: Add "pci=disable_acs_redir=" parameter for peer-to-peer support PCI: Allow specifying devices using a base bus and path of devfns PCI: Make specifying PCI devices in kernel parameters reusable PCI: Hide ACS quirk declarations inside PCI core PCI: Delay after FLR of Intel DC P3700 NVMe PCI: Disable Samsung SM961/PM961 NVMe before FLR PCI: Export pcie_has_flr() PCI: mvebu: Drop bogus comment above mvebu_pcie_map_registers() ...
| * \ \ Merge branch 'remotes/lorenzo/pci/dwc'Bjorn Helgaas2018-08-156-9/+63
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Add Kirin MSI support (Xiaowei Song) - Drop unnecessary root_bus_nr setting from exynos, imx6, keystone, armada8k, artpec6, designware-plat, histb, qcom, spear13xx (Shawn Guo) - Move link notification settings from DesignWare core to individual drivers (Gustavo Pimentel) - Add endpoint library MSI-X interfaces (Gustavo Pimentel) - Correct signature of endpoint library IRQ interfaces (Gustavo Pimentel) - Add DesignWare endpoint library MSI-X callbacks (Gustavo Pimentel) - Add endpoint library MSI-X test support (Gustavo Pimentel) * remotes/lorenzo/pci/dwc: PCI: endpoint: Add MSI set maximum restriction tools: PCI: Add MSI-X support pci_endpoint_test: Add 2 ioctl commands pci-epf-test/pci_endpoint_test: Add MSI-X support pci-epf-test/pci_endpoint_test: Use irq_type module parameter pci-epf-test/pci_endpoint_test: Cleanup PCI_ENDPOINT_TEST memspace PCI: dwc: Add legacy interrupt callback handler PCI: dwc: Rework MSI callbacks handler PCI: dwc: Add MSI-X callbacks handler PCI: Update xxx_pcie_ep_raise_irq() and pci_epc_raise_irq() signatures PCI: endpoint: Add MSI-X interfaces PCI: dwc: Fix EP link notification implementation PCI: spear13xx: Drop unnecessary root_bus_nr setting PCI: qcom: Drop unnecessary root_bus_nr setting PCI: histb: Drop unnecessary root_bus_nr setting PCI: designware-plat: Drop unnecessary root_bus_nr setting PCI: artpec6: Drop unnecessary root_bus_nr setting PCI: armada8k: Drop unnecessary root_bus_nr setting PCI: keystone: Drop unnecessary root_bus_nr setting PCI: imx6: Drop unnecessary root_bus_nr setting PCI: exynos: Drop unnecessary root_bus_nr setting PCI: kirin: Add MSI support
| | * | | tools: PCI: Add MSI-X supportGustavo Pimentel2018-07-191-14/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add MSI-X support to pcitest tool. Modify pcitest.sh script to accommodate MSI-X interrupt tests. Update documentation accordingly. Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
| | * | | pci_endpoint_test: Add 2 ioctl commandsGustavo Pimentel2018-07-192-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add MSI-X support and update driver documentation accordingly. Add 2 new IOCTL commands: - Allow to reconfigure driver IRQ type in runtime. - Allow to retrieve current driver IRQ type configured. Add IRQ type validation before executing the READ/WRITE/COPY tests. Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
| | * | | pci-epf-test/pci_endpoint_test: Add MSI-X supportGustavo Pimentel2018-07-195-6/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add MSI-X support and update driver documentation accordingly. Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
| | * | | pci-epf-test/pci_endpoint_test: Cleanup PCI_ENDPOINT_TEST memspaceGustavo Pimentel2018-07-191-4/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Cleanup PCI_ENDPOINT_TEST memspace (by moving the interrupt number away from command section). Add IRQ_TYPE register to identify the triggered ID interrupt required for the READ/WRITE/COPY tests and raise IRQ test commands. Update documentation accordingly. Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
| | * | | PCI: endpoint: Add MSI-X interfacesGustavo Pimentel2018-07-191-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add PCI_EPC_IRQ_MSIX type. Add MSI-X callbacks signatures to the ops structure. Add sysfs interface for set/get MSI-X capability maximum number. Update documentation accordingly. Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
| * | | | Merge branch 'remotes/lorenzo/pci/cadence'Bjorn Helgaas2018-08-152-0/+11
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Correct the Cadence cdns_pcie_writel() signature (Alan Douglas) - Add Cadence support for optional generic PHYs (Alan Douglas) - Add Cadence power management ops (Alan Douglas) - Remove redundant variable from Cadence driver (Colin Ian King) * remotes/lorenzo/pci/cadence: PCI: pcie-cadence-ep: Remove redundant variable mmc PCI: cadence: Add shutdown callback to host driver PCI: cadence: Add Power Management ops for host and EP dt-bindings: PCI: cadence: Add DT bindings for optional PHYs PCI: cadence: Add generic PHY support to host and EP drivers PCI: cadence: Update cdns_pcie_writel() function signature
| | * | | | dt-bindings: PCI: cadence: Add DT bindings for optional PHYsAlan Douglas2018-07-112-0/+11
| | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update DT documentation to include optional PHYs for cadence PCIe host and endpoint controllers. Signed-off-by: Alan Douglas <adouglas@cadence.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Rob Herring <robh@kernel.org>
| * | | | Merge branch 'pci/resource'Bjorn Helgaas2018-08-151-1/+1
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Clean up devm_of_pci_get_host_bridge_resources() resource allocation (Jan Kiszka) - Fixup resizable BARs after suspend/resume (Christian König) - Make "pci=earlydump" generic (Sinan Kaya) - Fix ROM BAR access routines to stay in bounds and check for signature correctly (Rex Zhu) * pci/resource: PCI: Make pci_get_rom_size() static PCI: Add check code for last image indicator not set PCI: Avoid accessing memory outside the ROM BAR PCI: Make early dump functionality generic PCI: Cleanup PCI_REBAR_CTRL_BAR_SHIFT handling PCI: Restore resized BAR state on resume PCI: Clean up resource allocation in devm_of_pci_get_host_bridge_resources() # Conflicts: # Documentation/admin-guide/kernel-parameters.txt
| | * | | | PCI: Make early dump functionality genericSinan Kaya2018-06-301-1/+1
| | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move early dump functionality into common code so that it is available for all architectures. No need to carry arch-specific reads around as the read hooks are already initialized by the time pci_setup_device() is getting called during scan. Tested-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
| * | | | Merge branch 'pci/peer-to-peer'Bjorn Helgaas2018-08-151-5/+36
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Add "pci=disable_acs_redir=" parameter to disable ACS redirection for peer-to-peer DMA support (we don't have the peer-to-peer support yet; this is just one piece) (Logan Gunthorpe) * pci/peer-to-peer: PCI: Add ACS Redirect disable quirk for Intel Sunrise Point PCI: Add device-specific ACS Redirect disable infrastructure PCI: Convert device-specific ACS quirks from NULL termination to ARRAY_SIZE PCI: Add "pci=disable_acs_redir=" parameter for peer-to-peer support PCI: Allow specifying devices using a base bus and path of devfns PCI: Make specifying PCI devices in kernel parameters reusable PCI: Hide ACS quirk declarations inside PCI core
| | * | | | PCI: Add "pci=disable_acs_redir=" parameter for peer-to-peer supportLogan Gunthorpe2018-08-101-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To support peer-to-peer traffic on a segment of the PCI hierarchy, we must disable the ACS redirect bits for select PCI bridges. The bridges must be selected before the devices are discovered by the kernel and the IOMMU groups created. Therefore, add a kernel command line parameter to specify devices which must have their ACS bits disabled. The new parameter takes a list of devices separated by a semicolon. Each device specified will have its ACS redirect bits disabled. This is similar to the existing 'resource_alignment' parameter. The ACS Request P2P Request Redirect, P2P Completion Redirect and P2P Egress Control bits are disabled, which is sufficient to always allow passing P2P traffic uninterrupted. The bits are set after the kernel (optionally) enables the ACS bits itself. It is also done regardless of whether the kernel or platform firmware sets the bits. If the user tries to disable the ACS redirect for a device without the ACS capability, print a warning to dmesg. Signed-off-by: Logan Gunthorpe <logang@deltatee.com> [bhelgaas: reorder to add the generic code first and move the device-specific quirk to subsequent patches] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Stephen Bates <sbates@raithlin.com> Reviewed-by: Alex Williamson <alex.williamson@redhat.com> Acked-by: Christian König <christian.koenig@amd.com>
| | * | | | PCI: Allow specifying devices using a base bus and path of devfnsLogan Gunthorpe2018-08-091-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When specifying PCI devices on the kernel command line using a bus/device/function address, bus numbers can change when adding or replacing a device, changing motherboard firmware, or applying kernel parameters like "pci=assign-buses". When bus numbers change, it's likely the command line tweak will be applied to the wrong device. Therefore, it is useful to be able to specify devices with a base bus number and the path of devfns needed to get to it, similar to the "device scope" structure in the Intel VT-d spec, Section 8.3.1. Thus, we add an option to specify devices in the following format: [<domain>:]<bus>:<device>.<func>[/<device>.<func>]* The path can be any segment within the PCI hierarchy of any length and determined through the use of 'lspci -t'. When specified this way, it is less likely that a renumbered bus will result in a valid device specification and the tweak won't be applied to the wrong device. Signed-off-by: Logan Gunthorpe <logang@deltatee.com> [bhelgaas: use "device" instead of "slot" in documentation since that's the usual language in the PCI specs] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Stephen Bates <sbates@raithlin.com> Reviewed-by: Alex Williamson <alex.williamson@redhat.com> Acked-by: Christian König <christian.koenig@amd.com>
| | * | | | PCI: Make specifying PCI devices in kernel parameters reusableLogan Gunthorpe2018-08-091-5/+23
| | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Separate out the code to match a PCI device with a string (typically originating from a kernel parameter) from the pci_specified_resource_alignment() function into its own helper function. While we are at it, this change fixes the kernel style of the function (fixing a number of long lines and extra parentheses). Additionally, make the analogous change to the kernel parameter documentation: Separate the description of how to specify a PCI device into its own section at the head of the "pci=" parameter. This patch should have no functional alterations. Signed-off-by: Logan Gunthorpe <logang@deltatee.com> [bhelgaas: use "device" instead of "slot" in documentation since that's the usual language in the PCI specs] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Stephen Bates <sbates@raithlin.com> Reviewed-by: Alex Williamson <alex.williamson@redhat.com> Acked-by: Christian König <christian.koenig@amd.com>
| * | | | Merge branch 'pci/notes'Bjorn Helgaas2018-08-152-0/+189
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Document ACPI description of PCI host bridges (Bjorn Helgaas) * pci/notes: PCI: Document ACPI description of PCI host bridges
| | * | | | PCI: Document ACPI description of PCI host bridgesBjorn Helgaas2018-07-272-0/+189
| | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a writeup about how PCI host bridges should be described in ACPI using PNP0A03/PNP0A08 devices, PNP0C02 devices, and the MCFG table. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Sinan Kaya <okaya@kernel.org> Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
| * | | | PCI/AER: Add sysfs attributes for rootport cumulative statsRajat Jain2018-07-191-0/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add sysfs attributes for rootport statistics (that are cumulative of all the ERR_* messages seen on this PCI hierarchy). Signed-off-by: Rajat Jain <rajatja@google.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * | | | PCI/AER: Add sysfs attributes to provide AER stats and breakdownRajat Jain2018-07-192-0/+99
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add sysfs attributes to provide total and breakdown of the AERs seen, into different type of correctable, fatal and nonfatal errors: /sys/bus/pci/devices/<dev>/aer_dev_correctable /sys/bus/pci/devices/<dev>/aer_dev_fatal /sys/bus/pci/devices/<dev>/aer_dev_nonfatal Signed-off-by: Rajat Jain <rajatja@google.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* | | | Merge tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsiLinus Torvalds2018-08-162-3/+48
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull SCSI updates from James Bottomley: "This is mostly updates to the usual drivers: mpt3sas, lpfc, qla2xxx, hisi_sas, smartpqi, megaraid_sas, arcmsr. In addition, with the continuing absence of Nic we have target updates for tcmu and target core (all with reviews and acks). The biggest observable change is going to be that we're (again) trying to switch to mulitqueue as the default (a user can still override the setting on the kernel command line). Other major core stuff is the removal of the remaining Microchannel drivers, an update of the internal timers and some reworks of completion and result handling" * tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi: (203 commits) scsi: core: use blk_mq_run_hw_queues in scsi_kick_queue scsi: ufs: remove unnecessary query(DM) UPIU trace scsi: qla2xxx: Fix issue reported by static checker for qla2x00_els_dcmd2_sp_done() scsi: aacraid: Spelling fix in comment scsi: mpt3sas: Fix calltrace observed while running IO & reset scsi: aic94xx: fix an error code in aic94xx_init() scsi: st: remove redundant pointer STbuffer scsi: qla2xxx: Update driver version to 10.00.00.08-k scsi: qla2xxx: Migrate NVME N2N handling into state machine scsi: qla2xxx: Save frame payload size from ICB scsi: qla2xxx: Fix stalled relogin scsi: qla2xxx: Fix race between switch cmd completion and timeout scsi: qla2xxx: Fix Management Server NPort handle reservation logic scsi: qla2xxx: Flush mailbox commands on chip reset scsi: qla2xxx: Fix unintended Logout scsi: qla2xxx: Fix session state stuck in Get Port DB scsi: qla2xxx: Fix redundant fc_rport registration scsi: qla2xxx: Silent erroneous message scsi: qla2xxx: Prevent sysfs access when chip is down scsi: qla2xxx: Add longer window for chip reset ...
| * | | | scsi: ufs: dt-bindings: add document for hisi-ufsliwei2018-07-202-3/+48
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | add ufs node document for Hisilicon. Signed-off-by: Li Wei <liwei213@huawei.com> Reviewed-by: Rob Herring <robh@kernel.org> Tested-by: John Stultz <john.stultz@linaro.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
* | | | Merge tag 'clk-for-linus' of ↵Linus Torvalds2018-08-168-9/+289
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "The new and exciting feature this time around is in the clk core. We've added duty cycle support to the clk API so that clk signal duty cycle ratios can be adjusted while taking into account things like clk dividers and clk tree hierarchy. So far only one SoC has implemented support for this, but I expect there will be more to come in the future. Outside of the core, we have the usual pile of clk driver updates and additions. The Amlogic meson driver got the most lines in the diffstat this time around because it added support for a whole bunch of hardware and duty cycle configuration. After that the Rockchip PX30, Qualcomm SDM845, and Renesas SoC drivers fill in a majority of the diff. We're left with the collection of non-critical fixes after that. Overall it looks pretty quiet this time. Core: - Clk duty cycle support - Proper CLK_SET_RATE_GATE support throughout the tree New Drivers: - Actions Semi Owl series S700 SoC clk driver - Qualcomm SDM845 display clock controller - i.MX6SX ocram_s clk support - Uniphier NAND, USB3 PHY, and SPI clk support - Qualcomm RPMh clk driver - i.MX7D mailbox clk support - Maxim 9485 Programmable Clock Generator - expose 32 kHz PLL on PXA SoCs - imx6sll GPIO clk gate support - Atmel at91 I2S audio clk support - SI544/SI514 clk on/off support - i.MX6UL GPIO clock gates in CCM CCGR - Renesas Crypto Engine clocks on R-Car H3 - Renesas clk support for the new RZ/N1D SoC - Allwinner A64 display engine clock support - support for Rockchip's PX30 SoC - Amlogic Meson axg PCIe and audio clocks - Amlogic Meson GEN CLK on gxbb, gxl and axg Updates: - remove an unused variable from Exynos4412 ISP driver - fix a thinko bug in SCMI clk division logic - add missing of_node_put()s in some i.MX clk drivers - Tegra SDMMC clk jitter improvements with high speed signaling modes - SPDX tagging for qcom and cs2000-cp drivers - stop leaking con ids in __clk_put() - fix a corner case in fixed factor clk probing where node is in DT but parent clk is registered much later - Marvell Armada 3700 clk_pm_cpu_get_parent() had an invalid return value - i.MX clk init arrays removed in place of CLK_IS_CRITICAL - convert to CLK_IS_CRITICAL for i.MX51/53 driver - fix Tegra BPMP driver oops when xlating a NULL clk - proper default configuration for vic03 and vde clks on Tegra124 - mark Tegra memory controller clks as critical - fix array bounds clamp in Tegra's emc determine_rate() op - Ingenic i2s bit update and allow UDC clk to gate - fix name of aspeed SDC clk define to have only one 'CLK' - fix i.MX6QDL video clk parent - critical clk markings for qcom SDM845 - fix Stratix10 mpu_free_clk and sdmmc_free_clk parents - mark Rockchip's pclk_rkpwm_pmu as critical clock, due to it supplying the pwm used to drive the logic supply of the rk3399 core" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (85 commits) clk: rockchip: Add pclk_rkpwm_pmu to PMU critical clocks in rk3399 clk: cs2000-cp: convert to SPDX identifiers clk: scmi: Fix the rounding of clock rate clk: qcom: Add display clock controller driver for SDM845 clk: mvebu: armada-37xx-periph: Remove unused var num_parents clk: samsung: Remove unused mout_user_aclk400_mcuisp_p4x12 variable clk: actions: Add S700 SoC clock support dt-bindings: clock: Add S700 support for Actions Semi Soc's clk: actions: Add missing REGMAP_MMIO dependency clk: uniphier: add clock frequency support for SPI clk: uniphier: add more USB3 PHY clocks clk: uniphier: add NAND 200MHz clock clk: tegra: make sdmmc2 and sdmmc4 as sdmmc clocks clk: tegra: Add sdmmc mux divider clock clk: tegra: Refactor fractional divider calculation clk: tegra: Fix includes required by fence_udelay() clk: imx6sll: fix missing of_node_put() clk: imx6ul: fix missing of_node_put() clk: imx: add ocram_s clock for i.mx6sx clk: mvebu: armada-37xx-periph: Fix wrong return value in get_parent ...
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| *---. \ \ \ Merge branches 'clk-actions-s700', 'clk-exynos-unused', ↵Stephen Boyd2018-08-152-9/+30
| |\ \ \ \ \ \ | | | | |/ / / | | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'clk-qcom-dispcc-845', 'clk-scmi-round' and 'clk-cs2000-spdx' into clk-next * clk-actions-s700: : - Actions Semi Owl series S700 SoC clk driver clk: actions: Add S700 SoC clock support dt-bindings: clock: Add S700 support for Actions Semi Soc's clk: actions: Add missing REGMAP_MMIO dependency * clk-exynos-unused: : - Remove an unused variable from Exynos4412 ISP driver clk: samsung: Remove unused mout_user_aclk400_mcuisp_p4x12 variable * clk-qcom-dispcc-845: : - Qualcomm SDM845 display clock controller clk: qcom: Add display clock controller driver for SDM845 dt-bindings: clock: Introduce QCOM Display clock bindings clk: qcom: Move frequency table macro to common file * clk-scmi-round: : - Fix a thinko bug in SCMI clk division logic clk: scmi: Fix the rounding of clock rate * clk-cs2000-spdx: clk: cs2000-cp: convert to SPDX identifiers
| | | | * | | dt-bindings: clock: Introduce QCOM Display clock bindingsTaniya Das2018-07-071-0/+19
| | | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add device tree bindings for display clock controller for Qualcomm Technology Inc's SDM845 SoCs. Signed-off-by: Taniya Das <tdas@codeaurora.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
| | * / / / dt-bindings: clock: Add S700 support for Actions Semi Soc'sSaravanan Sekar2018-07-261-9/+11
| | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add clock bindings constants for action S700 Maintain common clock dt-bindings for Actions Semi SoC's S700 and S900. Signed-off-by: Parthiban Nallathambi <pn@denx.de> Signed-off-by: Saravanan Sekar <sravanhome@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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| *-. \ \ \ Merge branches 'clk-imx6-ocram', 'clk-missing-put', ↵Stephen Boyd2018-08-151-0/+1
| |\ \ \ \ \ | | | |/ / / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'clk-tegra-sdmmc-jitter', 'clk-allwinner' and 'clk-uniphier' into clk-next * clk-imx6-ocram: : - i.MX6SX ocram_s clk support clk: imx: add ocram_s clock for i.mx6sx * clk-missing-put: : - Add missing of_node_put()s in some i.MX clk drivers clk: imx6sll: fix missing of_node_put() clk: imx6ul: fix missing of_node_put() * clk-tegra-sdmmc-jitter: : - Tegra SDMMC clk jitter improvements with high speed signaling modes clk: tegra: make sdmmc2 and sdmmc4 as sdmmc clocks clk: tegra: Add sdmmc mux divider clock clk: tegra: Refactor fractional divider calculation clk: tegra: Fix includes required by fence_udelay() * clk-allwinner: clk: sunxi-ng: add A64 compatible string dt-bindings: add compatible string for the A64 DE2 CCU clk: sunxi-ng: r40: Export video PLLs clk: sunxi-ng: r40: Allow setting parent rate to display related clocks clk: sunxi-ng: r40: Add minimal rate for video PLLs * clk-uniphier: : - Uniphier NAND, USB3 PHY, and SPI clk support clk: uniphier: add clock frequency support for SPI clk: uniphier: add more USB3 PHY clocks clk: uniphier: add NAND 200MHz clock
| | | * | | dt-bindings: add compatible string for the A64 DE2 CCUIcenowy Zheng2018-06-271-0/+1
| | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Allwinner A64 SoC has a DE2 CCU like the one in the DE2 of Allwinner H5 SoC. Add a compatible string for it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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| *---. \ \ \ Merge branches 'clk-mvebu-spdx', 'clk-meson', 'clk-imx7d-mu', ↵Stephen Boyd2018-08-152-0/+121
| |\ \ \ \ \ \ | | | |_|/ / / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'clk-imx-init-array-cleanup' and 'clk-rockchip' into clk-next * clk-mvebu-spdx: clk: mvebu: armada-37xx-periph: switch to SPDX license identifier * clk-meson: clk: meson: add gen_clk clk: meson: gxbb: remove HHI_GEN_CLK_CTNL duplicate definition clk: meson-axg: add clocks required by pcie driver clk: meson: remove unused clk-audio-divider driver clk: meson: stop rate propagation for audio clocks clk: meson: axg: add the audio clock controller driver clk: meson: add axg audio sclk divider driver clk: meson: add triple phase clock driver clk: meson: add clk-phase clock driver clk: meson: clean-up meson clock configuration clk: meson: remove obsolete register access clk: meson: expose GEN_CLK clkid clk: meson-axg: add pcie and mipi clock bindings dt-bindings: clock: add meson axg audio clock controller bindings clk: meson: audio-divider is one based clk: meson-gxbb: set fclk_div2 as CLK_IS_CRITICAL * clk-imx7d-mu: : - i.MX7D mailbox clk support clk: imx7d: add IMX7D_MU_ROOT_CLK * clk-imx-init-array-cleanup: : - i.MX clk init arrays removed in place of CLK_IS_CRITICAL clk: imx6sx: remove clks_init_on array clk: imx6sl: remove clks_init_on array clk: imx6q: remove clks_init_on array * clk-rockchip: clk: rockchip: Add pclk_rkpwm_pmu to PMU critical clocks in rk3399 clk: rockchip: fix clk_i2sout parent selection bits on rk3399 clk: rockchip: add clock controller for px30 clk: rockchip: add support for half divider dt-bindings: add bindings for px30 clock controller clk: rockchip: add dt-binding header for px30
| | | | * | | dt-bindings: add bindings for px30 clock controllerElaine Zhang2018-07-031-0/+65
| | | |/ / / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add devicetree bindings for Rockchip cru which found on Rockchip SoCs. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| | | * | | dt-bindings: clock: add meson axg audio clock controller bindingsJerome Brunet2018-06-221-0/+56
| | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Export the clock ids dt-bindings usable by the consumers of the clock controller and add the documentation for the device tree bindings of the audio clock controller of the A113 based SoCs. Acked-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
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| *-. \ \ \ Merge branches 'clk-ingenic-fixes', 'clk-max9485', 'clk-pxa-32k-pll', ↵Stephen Boyd2018-08-151-0/+59
| |\ \ \ \ \ | | | |/ / / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'clk-aspeed' and 'clk-imx6sll-gpio' into clk-next * clk-ingenic-fixes: : - Ingenic i2s bit update and allow UDC clk to gate clk: ingenic: Add missing flag for UDC clock clk: ingenic: Fix incorrect data for the i2s clock * clk-max9485: : - Maxim 9485 Programmable Clock Generator clk: Add driver for MAX9485 dts: clk: add devicetree bindings for MAX9485 * clk-pxa-32k-pll: : - Expose 32 kHz PLL on PXA SoCs clk: pxa: export 32kHz PLL * clk-aspeed: : - Fix name of aspeed SDC clk define to have only one 'CLK' clk: aspeed: Fix SDCLK name * clk-imx6sll-gpio: : - imx6sll GPIO clk gate support clk: imx6sll: add GPIO LPCGs
| | | * | | dts: clk: add devicetree bindings for MAX9485Daniel Mack2018-07-061-0/+59
| | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the devicetree bindings for MAX9485, a programmable audio clock generator. Signed-off-by: Daniel Mack <daniel@zonque.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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| *-. \ \ \ Merge branches 'clk-imx6-video-parent', 'clk-qcom-sdm845-criticals', ↵Stephen Boyd2018-08-152-0/+78
| |\ \ \ \ \ | | |_|/ / / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'clk-renesas', 'clk-stratix10-fixes' and 'clk-atmel-i2s' into clk-next * clk-imx6-video-parent: : - Fix i.MX6QDL video clk parent clk: imx6: fix video_27m parent for IMX6QDL_CLK_CKO1_SEL * clk-qcom-sdm845-criticals: : - critical clk markings for qcom SDM845 clk: qcom: Enable clocks which needs to be always on for SDM845 * clk-renesas: clk: renesas: Renesas R9A06G032 clock driver dt-bindings: clock: renesas,r9a06g032-sysctrl: documentation dt-bindings: clock: Add the r9a06g032-sysctrl.h file clk: renesas: r8a7795: Add CCREE clock clk: renesas: r8a7795: Add CR clock * clk-stratix10-fixes: : - Fix Stratix10 mpu_free_clk and sdmmc_free_clk parents clk: socfpga: stratix10: fix the sdmmc_free_clk mux clk: socfpga: stratix10: fix the parents of mpu_free_clk * clk-atmel-i2s: : - Atmel at91 I2S audio clk support clk: at91: add I2S clock mux driver dt-bindings: clk: at91: add an I2S mux clock
| | | * | | dt-bindings: clk: at91: add an I2S mux clockCodrin Ciubotariu2018-07-061-0/+35
| | |/ / / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The I2S mux clock can be used to select the I2S input clock. The available parents are the peripheral and the generated clocks. Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
| | * | | dt-bindings: clock: renesas,r9a06g032-sysctrl: documentationMichel Pollet2018-06-251-0/+43
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Renesas R9A06G032 SYSCTRL node description. Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>