linux - linux

	Commit message (Expand)	Author	Files	Lines
2016-07-07	clk: oxnas: make it explicitly non-modular	Paul Gortmaker	1	-12/+3
2016-07-07	clk: Kconfig: Name RK818 in Kconfig for COMMON_CLK_RK808	Wadim Egorov	1	-2/+2
2016-07-07	clk: hi6220: Change syspll and media_syspll clk to 1.19GHz	Xinliang Liu	1	-2/+2
2016-07-07	clk: meson: make gxbb explicitly non-modular	Paul Gortmaker	1	-14/+4
2016-07-07	clk: meson8b: make it explicitly non-modular	Paul Gortmaker	1	-15/+4
2016-07-02	clk: qcom: add EBI2 clocks to the MSM8660 GCC	Linus Walleij	1	-0/+28
2016-07-02	clk: imx7d: only enable minimum required clocks	Dong Aisheng	1	-8/+10
2016-07-02	clk: imx7d: using api with flag CLK_OPS_PARENT_ENABLE	Dong Aisheng	1	-357/+357
2016-07-02	clk: imx: add clk api for supporting CLK_OPS_PARENT_ENABLE clocks	Dong Aisheng	1	-0/+32
2016-07-02	clk: imx: re-order and concentrate the same type of clk api	Dong Aisheng	1	-29/+29
2016-07-02	clk: core: support clocks which requires parents enable (part 2)	Dong Aisheng	1	-15/+33
2016-07-02	clk: core: support clocks which requires parents enable (part 1)	Dong Aisheng	2	-0/+7
2016-07-02	clk: move clk_disable_unused after clk_core_disable_unprepare function	Dong Aisheng	1	-98/+98
2016-07-02	clk: introduce clk_core_enable_lock and clk_core_disable_lock functions	Dong Aisheng	1	-22/+63
2016-07-02	clk: fixed-factor: Allow for a few clocks to change the parent rate	Maxime Ripard	2	-1/+14
2016-07-01	clk: rockchip: fix incorrect rk3399 spdif-DPTX divider bits	Xing Zheng	1	-1/+1
2016-07-01	clk: rockchip: export rk3228 MAC clocks	Xing Zheng	1	-11/+11
2016-07-01	clk: rockchip: rename rk3228 sclk_macphy_50m to sclk_mac_extclk	Xing Zheng	1	-3/+3
2016-07-01	clk: rockchip: export rk3228 audio clocks	Xing Zheng	1	-4/+4
2016-07-01	clk: rockchip: include rk3228 downstream muxes into fractional dividers	Xing Zheng	1	-29/+52
2016-06-30	clk: fixed-rate: add clk_hw_unregister_fixed_rate()	Masahiro Yamada	2	-0/+12
2016-06-30	clk: hisilicon: hi3519: add driver remove path and fix some issues	Jiancheng Xue	1	-16/+100
2016-06-30	clk: hisilicon: add hisi_clk_unregister_* functions	Jiancheng Xue	1	-0/+21
2016-06-30	clk: hisilicon: add error processing for hisi_clk_register_* functions	Jiancheng Xue	2	-15/+55
2016-06-30	clk: hisilicon: add hisi_clk_alloc function.	Jiancheng Xue	2	-0/+32
2016-06-30	reset: hisilicon: change the definition of hisi_reset_init	Jiancheng Xue	3	-13/+13
2016-06-30	clk: s2mps11: Migrate to clk_hw based OF and registration APIs	Stephen Boyd	1	-12/+9
2016-06-30	clk: stm32f4: Migrate to clk_hw based OF and registration APIs	Stephen Boyd	1	-6/+6
2016-06-30	clk: bcm: iproc: Migrate to clk_hw based registration and OF APIs	Stephen Boyd	3	-35/+33
2016-06-30	clk: u300: Migrate to clk_hw based registration APIs	Stephen Boyd	1	-26/+33
2016-06-30	clk: nomadik: Migrate to clk_hw based OF and registration APIs	Stephen Boyd	1	-22/+26
2016-06-30	clk: highbank: Migrate to clk_hw based registration and OF APIs	Stephen Boyd	1	-5/+4
2016-06-30	clk: st: clkgen-pll: Detect critical clocks	Lee Jones	1	-10/+17
2016-06-30	clk: st: clkgen-fsyn: Detect critical clocks	Lee Jones	1	-3/+7
2016-06-30	clk: st: clk-flexgen: Detect critical clocks	Lee Jones	1	-1/+3
2016-06-30	clk: hi6220: Add RTC clock for pl031	Zhangfei Gao	2	-2/+5
2016-06-30	clk: tegra: Initialize UTMI PLL when enabling PLLU	Andrew Bresticker	6	-598/+531
2016-06-29	clk: Provide notifier stubs when !COMMON_CLK	Krzysztof Kozlowski	1	-2/+14
2016-06-29	clk: qcom: Remove gcc_aggre1_pnoc_ahb_clk from msm8996	Stephen Boyd	1	-16/+0
2016-06-23	clk: tegra: Micro-optimize Tegra210 clock setup	Thierry Reding	1	-4/+4
2016-06-23	clk: tegra: Make sor_safe the parent of dpaux and dpaux1	Thierry Reding	1	-2/+2
2016-06-23	clk: gxbb: add AmLogic GXBB clk controller driver	Michael Turquette	5	-0/+1245