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* arm: dts: marvell: armada-375: Harmonize DWC USB3 DT nodes nameSerge Semin2020-11-301-1/+1
| | | | | | | | | | | | In accordance with the DWC USB3 bindings the corresponding node name is suppose to comply with the Generic USB HCD DT schema, which requires the USB nodes to have the name acceptable by the regexp: "^usb(@.*)?" . Make sure the "snps,dwc3"-compatible nodes are correctly named. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
* ARM: dts: marvell: drop i2c timeout-ms propertyBaruch Siach2020-05-171-2/+0
| | | | | | | | | The timeout-ms property for i2c master nodes is undocumented, and as never been supported. Drop it. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
* ARM: dts: armada-375: update NAND node with new bindingsMiquel Raynal2018-05-181-3/+3
| | | | | | | | | | | | | | Use the new bindings of the Marvell NAND controller driver. Also adapt the NAND controller node organization to distinguish which property is relevant for the controller, and which one is NAND chip specific. Expose the partitions as a subnode of the NAND chip. Remove the 'marvell,nand-enable-arbiter' property, not needed anymore as the new driver activates the arbiter by default for all boards which is either needed or harmless. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
* arm: dts: armada-*.dtsi: use SPDX-License-Identifier for most of the Armada SoCsGregory CLEMENT2018-03-271-38/+1
| | | | | | | | | | | | | | | Follow the recent trend for the license description, and also fix the wrongly stated X11 to MIT. As already pointed on the DT ML, the X11 license text [1] is explicitly for the X Consortium and has a couple of extra clauses. The MIT license text [2] is actually what the current DT files claim. [1] https://spdx.org/licenses/X11.html [2] https://spdx.org/licenses/MIT.html Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
* ARM: dts: mvebu: pl310-cache disable double-linefillYan Markman2017-10-261-2/+2
| | | | | | | | | | | | | | | | | | | | Under heavy system stress mvebu SoC using Cortex A9 sporadically encountered instability issues. The "double linefill" feature of L2 cache was identified as causing dependency between read and write which lead to the deadlock. Especially, it was the cause of deadlock seen under heavy PCIe traffic, as this dependency violates PCIE overtaking rule. Fixes: c8f5a878e554 ("ARM: mvebu: use DT properties to fine-tune the L2 configuration") Cc: stable@vger.kernel.org Signed-off-by: Yan Markman <ymarkman@marvell.com> Signed-off-by: Igal Liberman <igall@marvell.com> Signed-off-by: Nadav Haklai <nadavh@marvell.com> [gregory.clement@free-electrons.com: reformulate commit log, add Armada 375 and add Fixes tag] Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* ARM: dts: marvell: fix PCI bus dtc warningsRob Herring2017-08-031-1/+3
| | | | | | | | | | | | dtc recently added PCI bus checks. Fix these warnings. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Gregory Clement <gregory.clement@free-electrons.com> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* ARM: dts: mvebu: Correct license textAlexandre Belloni2017-01-031-5/+5
| | | | | | | | | | | | | | The license text has been mangled at some point then copy pasted across multiple files. Restore it to what it should be. Note that this is not intended as a license change. Acked-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Rafał Miłecki <zajec5@gmail.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* ARM: dts: armada-375: Fixup ethernet child DT warningGregory CLEMENT2016-11-191-2/+2
| | | | | | | Child of mvpp2 ethernet do not have a reg property so the unit name should not contain an address: remove them. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* ARM: dts: armada-375: Remove skeleton.dtsiGregory CLEMENT2016-11-191-1/+3
| | | | | | | | | | | | The skeleton.dtsi file was removed in ARM64 for different reasons as explained in commit ("3ebee5a2e141 arm64: dts: kill skeleton.dtsi"). These also applies to ARM and it will also allow to get rid of the following DTC warnings in the future: "Node /memory has a reg or ranges property, but no unit name" Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* ARM: dts: armada-375: Fixup pinctrl DT warningsGregory CLEMENT2016-11-191-1/+1
| | | | | | | pinctrl has a ranges property, so the unit name should contain an address. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* ARM: dts: armada-375: Fixup pcie DT warningsGregory CLEMENT2016-11-191-1/+1
| | | | | | PCIe has a range property, so the unit name should contain an address. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* ARM: dts: armada-375: Fixup mdio DT warningGregory CLEMENT2016-11-191-1/+1
| | | | | | MDIO has a reg property so the unit name should contain an address. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* ARM: dts: armada-375: Add node labelsGregory CLEMENT2016-11-191-31/+31
| | | | | | | | As it was previously done for kirkwood and for aramda 370/XP, this adds missing node labels to Armada 375 and SoC specific nodes to allow to reference them more easily. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* ARM: dts: mvebu: Update comment for main PLL frequencyChris Packham2016-11-071-1/+1
| | | | | | | | | The actual frequency was updated in commit ae142bd99765 ("ARM: mvebu: Fix the main PLL frequency on Armada 375, 38x and 39x SoCs") but the comment was not updated. Update it now. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* ARM: dts: armada-375: use armada-370-sata for SATALior Amsalem2016-02-121-1/+1
| | | | | | | | | | | | | | | | | The Armada 375 has the same SATA IP as Armada 370 and Armada XP, which requires the PHY speed to be set in the LP_PHY_CTL register for SATA hotplug to work. Therefore, this commit updates the compatible string used to describe the SATA IP in Armada 375 from marvell,orion-sata to marvell,armada-370-sata. Fixes: 4de59085091f753d08c8429d756b46756ab94665 ("ARM: mvebu: add Device Tree description of the Armada 375 SoC") Cc: <stable@vger.kernel.org> Signed-off-by: Lior Amsalem <alior@marvell.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* ARM: mvebu: add crypto related nodes to armada 375 dtsiBoris Brezillon2015-09-291-0/+33
| | | | | | | Add crypto related nodes in armada-375.dtsi. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* ARM: mvebu: use DT properties to fine-tune the L2 configurationThomas Petazzoni2015-07-091-0/+4
| | | | | | | | | | | | | | In order to optimize the L2 cache performance, this commit adjusts the configuration of the L2 on the Cortex-A9 based Marvell EBU processors (Armada 375, 38x and 39x), using the appropriate DT properties. We enable double linefill, incr double linefill, data prefetch and disable double linefill on wrap. This matches the configuration that was fine tuned in the Marvell BSP. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* Merge tag 'v4.1-rc6' into next/dtKevin Hilman2015-06-111-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | Linux 4.1-rc6 Conflicts: arch/arm/boot/dts/zynq-7000.dtsi Resolution summary: Mainline had an earlier version of the commit, resolve in favor of the newer patch in next/dt branch.
| * ARM: mvebu: Fix the main PLL frequency on Armada 375, 38x and 39x SoCsGregory CLEMENT2015-05-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Whereas for Armada 370 and XP the main PLL frequency was 2GHz for the Armada 375, 38x and 39x, the frequency is 1GHz. When writing support for these last SoCs, there was no official value for the PLL. Now that we have it, this patch fixes it in the device tree. This value is currently only used by the NAND driver for the setting the NAND timing. Fortunately it is not actually used: all the mainline board with a NAND flash comes with a NAND device tree node using the "marvell,nand-keep-config" property. With this property the timings are not modified in the kernel driver and are kept from the bootloader. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Marcin Wojtas <mw@semihalf.com>
* | ARM: mvebu: use improved armada spi device tree compatible name for each SoCGregory CLEMENT2015-05-271-2/+4
|/ | | | | | | Use the new compatible introduced in order to benefit of a wider and more accurate range of baud rates to be used. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* ARM: mvebu: Enable Performance Monitor Unit on Armada 375 SoCEzequiel Garcia2015-03-171-0/+5
| | | | | | | | | | The Armada 375 SoC has a Cortex-A9 CPU, and so the PMU is available to be used. This commit enables it in the devicetree. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* ARM: mvebu: fix unit address of MPIC nodesThomas Petazzoni2015-03-041-1/+1
| | | | | | | | | | | | The Device Tree nodes describing the MPIC nodes on Armada 370, 375, 38x and XP had a unit address that did not match the first reg property, as suggested by the ePAPR. This commit fixes that. [gregory.clement@free-electrons.com: removed the armada-38x part, as it was already applied by a previous patch] Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* ARM: mvebu: add serial port aliases on Armada 370/375/38x/XPThomas Petazzoni2015-03-041-0/+2
| | | | | | | | | This commit adds 'serialX' aliases for the various serial ports on Armada 370, 375, 38x and XP platforms. It will allow the usage of the stdout-path property. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* ARM: mvebu: remove aliases for Ethernet devices on Armada 370/375/38x/XPThomas Petazzoni2015-03-041-2/+0
| | | | | | | | | | | | | Having aliases for Ethernet devices is useless, since the networking subsystem unfortunately doesn't care about aliases to name network interfaces. Note that the 'aliases' nodes in armada-370-xp.dtsi and armada-xp.dtsi become empty, but that we keep it as is since a followup patch will re-add some aliases to it. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* ARM: mvebu: add UART labels to Armada 375Thomas Petazzoni2015-03-041-2/+2
| | | | | | | | This commit adds the standard uart0 and uart1 DT labels to the Device Tree description of the Marvell Armada 375 SoC. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* ARM: mvebu: armada-375: Relicense the device tree under GPLv2+/X11Gregory CLEMENT2015-01-271-3/+37
| | | | | | | | | | | | | | | The current GPL only licensing on the device tree makes it very impractical for other software components licensed under another license. In order to make it easier for them to reuse our device trees, relicense our device trees under a GPL/X11 dual-license. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Jason Cooper <jason@lakedaemon.net> Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Acked-by: Marcin Wojtas <mw@semihalf.com> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
* ARM: mvebu: fix compatible strings of MBus on Armada 375 and Armada 38xThomas Petazzoni2015-01-101-1/+1
| | | | | | | | | | | Due to the special handling of window 13 on Armada 375 and Armada 38x (similar to Armada XP), the MBus hardware block is *not* compatible with the one used on Armada 370. Using the Armada 370 compatible string on Armada 375 and 38x will lead to a non-working device if window 13 ends up being used. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
* ARM: mvebu: add PHY support to the dts for the USB controllers on Armada 375Gregory CLEMENT2014-11-261-0/+5
| | | | | | | | | Now that the USB cluster node has been added, use it as a PHY provider for the USB controller linked to it: the first EHCI and the xHCI. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1415879269-29711-7-git-send-email-gregory.clement@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: add Device Tree description of USB cluster controller on Armada 375Gregory CLEMENT2014-11-261-0/+6
| | | | | | | | | | On Armada 375, the USB cluster allows to control the cluster composed of the USB2 and USB3 host controllers. Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1415879269-29711-6-git-send-email-gregory.clement@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: Enable the reference clock for timer and watchdog on Armada 375 SoCEzequiel Garcia2014-11-021-2/+10
| | | | | | | | | | | Now that the timer and watchdog drivers support the Armada 375 usage of the reference clock, we can enable it in the devicetree. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1414248522-16055-5-git-send-email-ezequiel.garcia@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: Add RTC support for Armada 375Gregory CLEMENT2014-08-171-0/+6
| | | | | | | | | | The Armada 375 SoC has the same real time clock as the one used in other Marvell EBU platforms. This patch consequently updates the Device Tree of the Armada 375 SoC to describe the internal RTC. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1406817122-15675-1-git-send-email-gregory.clement@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: Add missing MDIO clock in Armada 375Ezequiel Garcia2014-07-231-0/+1
| | | | | | | | | | | | | | In Armada 375 SoCs, the MDIO is handled by a separate orion-mdio driver, despite the register is contained within the "LMS" block of the network controller. Therefore we need to add the clock to the MDIO devicetree to prevent the controller from being accesed with its clock gated. This is needed, for instance, to be able to load the MDIO driver before the network driver. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Link: https://lkml.kernel.org/r/1405961296-5846-7-git-send-email-ezequiel.garcia@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: Add ethernet aliases required by U-BootMarcin Wojtas2014-07-231-0/+2
| | | | | | | | | The vendor bootloader provided for Armada 375 boards expect an alias for the ethernet nodes, which is used to fixup the MAC address. Signed-off-by: Marcin Wojtas <mw@semihalf.com> Link: https://lkml.kernel.org/r/1405961296-5846-6-git-send-email-ezequiel.garcia@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: Add support for the network controller in Armada 375 SoCEzequiel Garcia2014-07-131-0/+31
| | | | | | | | | This commit adds the support for the network controller in Marvell Armada 375 SoC devicetree. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Link: https://lkml.kernel.org/r/1405021936-28658-3-git-send-email-ezequiel.garcia@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: add Device Tree description for the EHCI controllers on Armada 375Gregory CLEMENT2014-05-161-0/+16
| | | | | | | | | | | The Marvell Armada 375 SoCs contains two EHCI controllers. This commit adds the Device Tree description of these interfaces at the SoC level, and also enables the USB2 port on the Armada 375 DB platform. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1400149062-32661-18-git-send-email-gregory.clement@free-electrons.com Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: add Device Tree description of the xHCI controller on Armada 375Gregory CLEMENT2014-05-161-0/+8
| | | | | | | | | | | The Marvell Armada 375 SoCs contain a xHCI controller. This commit adds the Device Tree description of this interfaces at the SoC level, and also enables the USB3 port on the Armada 375 DB platform. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1400149062-32661-17-git-send-email-gregory.clement@free-electrons.com Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: Enable the thermal sensor in Armada 375 SoCEzequiel Garcia2014-04-261-0/+6
| | | | | | | | This commit enables the thermal sensor found in Armada 375 SoCs. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Link: https://lkml.kernel.org/r/1398371004-15807-10-git-send-email-ezequiel.garcia@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: use clocks property for serial portsThomas Petazzoni2014-04-261-0/+2
| | | | | | | | | | | | | | | | | | | | | | Back when the Armada 370 and Armada XP initial support was introduced, the only way to pass the clock frequency to the of_serial driver was through a clock-frequency Device Tree property. Thanks to 0bbeb3c3e84bc963d1c66661e082d207023b0e5c ('of serial port driver - add clk_get_rate() support'), it is possible to use the standard 'clocks' DT property to reference the clock used for a particular UART controller. This clock is then used by the of_serial driver to retrieve the clock rate. This commit modifies the SoC-level Device Tree files of Armada 370, Armada XP, Armada 375 and Armada 38x to use this possibility. Since there is no gatable clock for the UART controllers, we simply reference the TCLK, which is the main SoC clock for the peripherals. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1397806908-7550-4-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: add SMP support in the Armada 375 device treeGregory CLEMENT2014-04-241-0/+7
| | | | | | | | | | | | Improve the Armada 375 Device Tree to add the CPU reset Device Tree node and declare the enabling method for CPUs, both of which are necessary to get SMP working. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1397483648-26611-11-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1397483648-26611-11-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: enable the coherency fabric on Armada 375Thomas Petazzoni2014-04-241-0/+10
| | | | | | | | | This commit adds the necessary Device Tree information to enable the coherency fabric on Armada 375. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1397483228-25625-10-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: Enable Armada 375 watchdog in the devicetreeEzequiel Garcia2014-04-241-0/+6
| | | | | | | | | | Add the DT nodes to enable the watchdog support available on Armada 375 SoC. Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Link: https://lkml.kernel.org/r/1397481813-4962-8-git-send-email-ezequiel.garcia@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: use macros for interrupt flags on Armada 375/38xThomas Petazzoni2014-02-221-26/+31
| | | | | | | | | | | Instead of hardcoding the values of the interrupt flags, use the macros provided by <include/dt-bindings/interrupt-controller/irq.h> and <include/dt-bindings/interrupt-controller/arm-gic.h> for the Armada 375 and Armada 38x Device Tree files. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: use GIC_{SPI,PPI} in Armada 375/38x DTsThomas Petazzoni2014-02-221-26/+27
| | | | | | | | | | Instead of hardcoding 0 and 1 to indicate SPI and PPI GIC interrupts, use the definitions of <dt-bindings/interrupt-controller/arm-gic.h> to clarify the Device Tree code. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: use C preprocessor include for Armada 375/38x DTsThomas Petazzoni2014-02-221-1/+1
| | | | | | | | | | | Some of the Armada 375/38x DTs that were recently submitted were still using the old-style /include/ instead of the new-style, C-preprocessor based #include. Since we are going to start including more headers, switching to the C-preprocessor based includes is important. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: add Device Tree description of the Armada 375 SoCGregory CLEMENT2014-02-171-0/+458
The Armada 375 SoC is a new SoC from Marvell, based on a dual core Cortex-A9 and a number of hardware blocks that are common with earlier SoCs from the mvebu family. The provided Device Tree describes the following parts of the SoC: * CPUs * Device Bus * Clocks * Interrupt controllers: GIC and MPIC * GPIO controllers * I2C buses * L2 cache * MBus controller * SDIO * Pinctrl * SATA * Serial * SPI buses * System controller (for reboot) * Timer * XOR engines * PCIe controllers Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-30 17:53:19 +0100