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* ARM: dts: armada-xp: add interrupts for watchdogChris Packham2022-11-281-0/+1
| | | | | | | | | | | | | | The first interrupt is for the regular watchdog timeout. Normally the RSTOUT line will trigger a reset before this interrupt fires but on systems with a non-standard reset it may still trigger. The second interrupt is for a timer1 which is used as a pre-timeout for the watchdog. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com> Acked-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
* ARM: dts: armada-xp: add label to sdram-controller nodeChris Packham2019-10-081-1/+1
| | | | | | | | Add the label "sdramc" to the sdram-controller nodes for the Armada-XP and 98dx3236 SoCs. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
* arm: dts: armada-*.dtsi: use SPDX-License-Identifier for most of the Armada SoCsGregory CLEMENT2018-03-271-38/+1
| | | | | | | | | | | | | | | Follow the recent trend for the license description, and also fix the wrongly stated X11 to MIT. As already pointed on the DT ML, the X11 license text [1] is explicitly for the X Consortium and has a couple of extra clauses. The MIT license text [2] is actually what the current DT files claim. [1] https://spdx.org/licenses/X11.html [2] https://spdx.org/licenses/MIT.html Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
* ARM: dts: mvebu: Correct license textAlexandre Belloni2017-01-031-5/+5
| | | | | | | | | | | | | | The license text has been mangled at some point then copy pasted across multiple files. Restore it to what it should be. Note that this is not intended as a license change. Acked-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Rafał Miłecki <zajec5@gmail.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* ARM: dts: armada-370-xp: Fixup l2-cache DT warningGregory CLEMENT2016-11-191-1/+1
| | | | | | | l2-cache which is either an aurora-outer-cache or an aurora-system-cache has a reg property so the unit name should contain an address. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* ARM: dts: armada-370-xp: Remove skeleton.dtsiGregory CLEMENT2016-11-191-0/+3
| | | | | | | | | | | | The skeleton.dtsi file was removed in ARM64 for different reasons as explained in commit ("3ebee5a2e141 arm64: dts: kill skeleton.dtsi"). These also applies to ARM and it will also allow to get rid of the following DTC warnings in the future: "Node /memory has a reg or ranges property, but no unit name" Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* ARM: dts: armada-370-xp: Use the node labelsGregory CLEMENT2016-11-191-38/+38
| | | | | | | Use the node label when possible. As a result it flattens the device tree and it makes more visible the IP blocks specific to each SoC variant. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* ARM: dts: armada-370-xp: add node labelsGregory CLEMENT2016-11-191-6/+6
| | | | | | | | As it was previously done for kirkwood, this adds missing node labels to Armada 370 and XP common and SoC specific nodes to allow to reference them more easily. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* ARM: dts: armada-370-xp: move the cpurst node in the common fileGregory CLEMENT2016-11-191-1/+0
| | | | | | | The cpurst nodes are identical in armada-370.dtsi and armada-xp.dtsi files, so move it in the common armada-370-xp.dtsi file. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* ARM: dts: mvebu: A37x/XP/38x/39x: Move SPI controller nodes into 'soc' nodeStefan Roese2016-08-081-15/+12
| | | | | | | | | | | | | | | | | | | | This patch moves all Armada 370/XP/38x/39x SPI controller nodes from the 'internal-regs' node down into the 'soc' node. This is in preparation to enable the usage of the SPI direct access mode. A follow-up patch will add the static MBus mappings for the SPI devices into the 'reg' property of the SPI controller DT node. By moving these SPI controller nodes, this patch also makes use of the labels rather than keeping the tree structure. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Mark Brown <broonie@kernel.org> Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* ARM: dts: mvebu: Add SPI1 pinctrl defines for Armada XPStefan Roese2016-08-081-0/+8
| | | | | | | | | | This patch defines and uses common Armada XP pinctrl settings in armada-xp.dtsi for the SPI1 interface (MPP13,14,16,17). Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* ARM: dts: armada-xp: add buffer manager nodesMarcin Wojtas2016-03-141-0/+19
| | | | | | | | | | | | | | | Armada XP network controller supports hardware buffer management (BM). Since it is now enabled in mvneta driver, appropriate nodes can be added to armada-xp.dtsi - for the actual common BM unit (bm@c0000) and its internal SRAM (bm-bppi), which is used for indirect access to buffer pointer ring residing in DRAM. Pools - ports mapping, bm-bppi entry in 'soc' node's ranges and optional parameters are supposed to be set in board files. Signed-off-by: Marcin Wojtas <mw@semihalf.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* ARM: mvebu: add crypto related nodes to armada-xp.dtsiBoris Brezillon2015-09-291-0/+30
| | | | | | | Add crypto related nodes to armada-xp.dtsi. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* ARM: mvebu: add CPU config registers in the Armada 370/XP Device TreeThomas Petazzoni2015-09-291-0/+5
| | | | | | | | | | | | | This commit adds the description of the CPU config registers in the Armada 370 and Armada XP Device Tree. Since the registers are in fact different between the two SoCs, a different compatible string is used. Note that the Armada 370 node is currently unused, but it is nonetheless added for consistency with the addition on the Armada XP side. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* Merge tag 'armsoc-late' of ↵Linus Torvalds2015-07-021-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC late fixes and dependencies from Kevin Hilman: "This is a collection of a few late fixes and other misc stuff that had dependencies on things being merged from other trees. Other than the fixes, the primary feature being added is the conversion of some OMAP drivers to the new generic wakeirq interface" * tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: multi_v7_defconfig: Enable BRCMNAND driver ARM: BCM: Do not select CONFIG_MTD_NAND_BRCMNAND ARM: at91/dt: update udc compatible strings ARM: at91/dt: trivial: fix USB udc compatible string arm64: dts: Add APM X-Gene standby GPIO controller DTS entries soc: qcom: spm: Fix idle on THUMB2 kernels ARM: dove: fix legacy dove IRQ numbers ARM: mvebu: fix suspend to RAM on big-endian configurations ARM: mvebu: adjust Armada XP DT spi muxing after pinctrl function rename serial: 8250_omap: Move wake-up interrupt to generic wakeirq serial: omap: Switch wake-up interrupt to generic wakeirq mmc: omap_hsmmc: Change wake-up interrupt to use generic wakeirq
| * ARM: mvebu: adjust Armada XP DT spi muxing after pinctrl function renameThomas Petazzoni2015-06-171-1/+1
| | | | | | | | | | | | | | | | | | | | Following the merge of "pinctrl: mvebu: armada-xp: rename spi to spi0" by Linus Walleij, we need to adjust the Armada XP Device Tree accordingly, by adjusting the pinctrl configuration for SPI pins. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* | Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netLinus Torvalds2015-07-011-1/+9
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull networking fixes from David Miller: 1) mlx4 driver bug fixes (TX queue wakeups, csum complete indications) from Ido Shamay, Eran Ben Elisha, and Or Gerlitz. 2) Missing unlock in error path of PTP support in renesas driver, from Dan Carpenter. 3) Add Vitesse 8641 phy IDs to vitesse PHY driver, from Shaohui Xie. 4) Bnx2x driver bug fixes (linearization of encap packets, scratchpad parity error notifications, flow-control and speed settings) from Yuval Mintz, Manish Chopra, Shahed Shaikh, and Ariel Elior. 5) ipv6 extension header parsing in the igb chip has a HW errata, disable it. Frm Todd Fujinaka. 6) Fix PCI link state locking issue in e1000e driver, from Yanir Lubetkin. 7) Cure panics during MTU change in i40e, from Mitch Williams. 8) Don't leak promisc refs in DSA slave driver, from Gilad Ben-Yossef. 9) Add missing HAS_DMA dep to VIA Rhine driver, from Geery Uytterhoeven. 10) Make sure DMA map/unmap calls are symmetric in bnx2x driver, from Michal Schmidt. 11) Workaround for MDIO access problems in bcm7xxx devices, from FLorian Fainelli. 12) Fix races in SCTP protocol between OTTB responses and route removals, from Alexander Sverdlin. 13) Fix jumbo frame checksum issue with some mvneta devices, from Simon Guinot. * git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (58 commits) sock_diag: don't broadcast kernel sockets net: mvneta: disable IP checksum with jumbo frames for Armada 370 ARM: mvebu: update Ethernet compatible string for Armada XP net: mvneta: introduce compatible string "marvell, armada-xp-neta" api: fix compatibility of linux/in.h with netinet/in.h net: icplus: fix typo in constant name sis900: Trivial: Fix typos in enums stmmac: Trivial: fix typo in constant name sctp: Fix race between OOTB responce and route removal net-Liquidio: Delete unnecessary checks before the function call "vfree" vmxnet3: Bump up driver version number amd-xgbe: Add the __GFP_NOWARN flag to Rx buffer allocation net: phy: mdio-bcm-unimac: workaround initial read failures for integrated PHYs net: bcmgenet: workaround initial read failures for integrated PHYs net: phy: bcm7xxx: workaround MDIO management controller initial read bnx2x: fix DMA API usage net: via: VIA_RHINE and VIA_VELOCITY should depend on HAS_DMA net/phy: tune get_phy_c45_ids to support more c45 phy bnx2x: fix lockdep splat net: fec: don't access RACC register when not available ...
| * ARM: mvebu: update Ethernet compatible string for Armada XPSimon Guinot2015-06-301-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | This patch updates the Ethernet DT nodes for Armada XP SoCs with the compatible string "marvell,armada-xp-neta". Signed-off-by: Simon Guinot <simon.guinot@sequanux.org> Fixes: 77916519cba3 ("arm: mvebu: Armada XP MV78230 has only three Ethernet interfaces") Cc: <stable@vger.kernel.org> # v3.8+ Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | ARM: mvebu: use improved armada spi device tree compatible name for each SoCGregory CLEMENT2015-05-271-0/+8
|/ | | | | | | Use the new compatible introduced in order to benefit of a wider and more accurate range of baud rates to be used. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* ARM: mvebu: Conform L2CC node with ePAPR specification by adding cache-levelGregory CLEMENT2015-03-191-0/+1
| | | | | | | | For L2 cache controller node, cache-level property is mandatory. Let's add it to Armada 370 and Armada XP device tree. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
* ARM: mvebu: clk: remove cpuclk resources overlapping coredivclk registers on ↵Nadav Haklai2015-03-191-1/+1
| | | | | | | | | | | | | Armada XP The resources of the cpuclk node are overlapping the one from coredivclk node. It was not noticed until now because the driver did a simple of_iomap and not a request_mem_region. This patch fixes it. [gregory.clement@free-electrons.com: add commit log and port to 4.0-rc] Signed-off-by: Nadav Haklai <nadavh@marvell.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
* ARM: mvebu: fix unit address of MPIC nodesThomas Petazzoni2015-03-041-1/+1
| | | | | | | | | | | | The Device Tree nodes describing the MPIC nodes on Armada 370, 375, 38x and XP had a unit address that did not match the first reg property, as suggested by the ePAPR. This commit fixes that. [gregory.clement@free-electrons.com: removed the armada-38x part, as it was already applied by a previous patch] Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* ARM: mvebu: add serial port aliases on Armada 370/375/38x/XPThomas Petazzoni2015-03-041-0/+2
| | | | | | | | | This commit adds 'serialX' aliases for the various serial ports on Armada 370, 375, 38x and XP platforms. It will allow the usage of the stdout-path property. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* ARM: mvebu: remove aliases for Ethernet devices on Armada 370/375/38x/XPThomas Petazzoni2015-03-041-1/+0
| | | | | | | | | | | | | Having aliases for Ethernet devices is useless, since the networking subsystem unfortunately doesn't care about aliases to name network interfaces. Note that the 'aliases' nodes in armada-370-xp.dtsi and armada-xp.dtsi become empty, but that we keep it as is since a followup patch will re-add some aliases to it. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* ARM: mvebu: armada-xp: Relicense the device tree under GPLv2+/X11Gregory CLEMENT2015-01-271-3/+37
| | | | | | | | | | | | | | | | | | The current GPL only licensing on the device tree makes it very impractical for other software components licensed under another license. In order to make it easier for them to reuse our device trees, relicense our device trees under a GPL/X11 dual-license. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Arnaud Ebalard <arno@natisbad.org> Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Acked-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Acked-by: Jason Cooper <jason@lakedaemon.net> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Willy Tarreau <w@1wt.eu>
* Merge tag 'dt-for-linus' of ↵Linus Torvalds2014-12-091-2/+64
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC DT updates from Arnd Bergmann: "The DT branch adds a lot of new stuff for additional SoC and board support. The branch is the largest one and contains 513 out of the total 972 non-merge arm-soc changesets for 3.19. Most of the changes are about enabling additional on-chip devices for existing machines, but there are also an unusual number of new SoC types being added this time: - AMLogic Meson8 - ARM Realview in DT mode - Allwinner A80 - Broadcom BCM47081 - Broadcom Cygnus - Freescale LS1021A - Freescale Vybrid 500 series - Mediatek MT6592, MT8127, MT8135 - STMicroelectronics STiH410 - Samsung Exynos4415 The level of support for the above differs widely, some are just stubs with nothing more than CPU, memory and a UART, but others are fairly complete. As usual, these get extended over time. There are also many new boards getting added, this is the list of model strings that are showing up in new dts files: - ARM RealView PB1176 - Altera SOCFPGA Arria 10 - Asus RT-N18U (BCM47081) - Buffalo WZR-1750DHP (BCM4708) - Buffalo WZR-600DHP2 (BCM47081) - Cygnus Enterprise Phone (BCM911360_ENTPHN) - D-Link DIR-665 - Google Spring - IGEP COM MODULE Rev. G (TI OMAP AM/DM37x) - IGEPv2 Rev. F (TI OMAP AM/DM37x) - LS1021A QDS Board - LS1021A TWR Board - LeMaker Banana Pi - MarsBoard RK3066 - MediaTek MT8127 Moose Board - MediaTek MT8135 evaluation board - Mele M3 - Merrii A80 Optimus Board - Netgear R6300 V2 (BCM4708) - Nomadik STN8815NHK - NovaTech OrionLXm - Olimex A20-OLinuXino-LIME2 - Raspberry Pi Model B+ - STiH410 B2120 - Samsung Monk board - Samsung Rinato board - Synology DS213j - Synology DS414 - TBS2910 Matrix ARM mini PC - TI AM5728 BeagleBoard-X15 - Toradex Colibri VF50 on Colibri Evaluation Board - Zynq ZYBO Development Board Other notable changes include: - exynos: cleanup of existing dts files - mvebu: improved pinctrl support for Armada 370/XP - nomadik: restructuring dts files - omap: added CAN bus support - shmobile: added clock support for some SoCs - shmobile: added sound support for some SoCs - sirf: reset controller support - sunxi: continuing the relicensing under dual GPL/MIT - sunxi: lots of new on-chip device support - sunxi: working simplefb support (long awaited) - various: provide stdout-path property for earlycon" * tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (510 commits) ARM: dts: rk3288: add arm,cpu-registers-not-fw-configured Revert "ARM: dts: rockchip: temporarily disable smp on rk3288" ARM: BCM5301X: Add DT for Buffalo WZR-600DHP2 ARM: BCM5301X: Add DT for Asus RT-N18U ARM: BCM5301X: Add DT for Buffalo WZR-1750DHP ARM: BCM5301X: Add DT for Netgear R6300 V2 ARM: BCM5301X: Add buttons for Netgear R6250 ARM: dts: rockchip: Add input voltage supply regulators in pmic for Marsboard ARM: BCM5301X: Add IRQs to Broadcom's bus-axi in DTS file arm: dts: zynq: Add Digilent ZYBO board arm: dts: zynq: Move crystal freq. to board level doc: dt: vendor-prefixes: Add Digilent Inc Documentation: devicetree: Fix Xilinx VDMA specification ARM: dts: rockchip: set FIFO size for SDMMC, SDIO and EMMC on rk3066 and rk3188 ARM: dts: rockchip: add label property for leds on Radxa Rock ARM: BCM5301X: Add LEDs for Netgear R6250 V1 ARM: BCM5301X: Add Broadcom's bus-axi to the DTS file ARM: dts: add sysreg phandle to i2c device nodes for exynos ARM: dts: Remove unused bootargs from exynos3250-rinato ARM: dts: add board dts file for Exynos3250-based Monk board ...
| * arm: mvebu: normalize pinctrl entries for Armada SoCsArnaud Ebalard2014-11-261-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are currently 2 differents naming conventions used between the existing Armada SoC DT files for pinctrl entries (*_pin(s): *-pin(s) and pmx_*: pmx-*) with a vast majority of files using the former: $ grep _pin arch/arm/boot/dts/armada-*.dts* | wc -l 155 $ grep pmx arch/arm/boot/dts/armada-*.dts* | wc -l 13 In fact, only some Armada XP files are using the second variant. This patch normalizes those files (mainly ge0/1 entries) to use the first variant. Signed-off-by: Arnaud Ebalard <arno@natisbad.org> Link: https://lkml.kernel.org/r/00114c3169e1d93259ff4150ed46ee36eae16b1e.1416670812.git.arno@natisbad.org Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| * arm: mvebu: define and use common Armada XP SPI pinctrl settingArnaud Ebalard2014-11-221-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch defines common Armada XP pinctrl settings in armada-xp.dtsi for the supported SPI interface (MPP36-39) and use it as default for Armada XP spi interface. That being done, it removes the now redundant definitions in armada-xp-axpwifiap.dts. Note: this patch has the potential to break out-of-tree users w/o specific pinctrl settings for their spi interfaces if the default above does not match their config (i.e. if they do not use CS0). Acked-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Arnaud Ebalard <arno@natisbad.org> Link: https://lkml.kernel.org/r/d404b7abd80ee5a0fd8e8d3586d33cd37740d589.1416613429.git.arno@natisbad.org Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| * arm: mvebu: define and use common Armada XP UART2/3 pinctrl settingsArnaud Ebalard2014-11-221-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch defines common Armada XP pinctrl settings for uart2 and uart3 interfaces (uart0 and uart1 rx/tx do not rely on MPP): uart2: MPP42-43 as default uart3: MPP44-45 as default Suggested-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Arnaud Ebalard <arno@natisbad.org> Link: https://lkml.kernel.org/r/fd51c080c7139a67ec01df8d797f1e88ce557796.1416613429.git.arno@natisbad.org Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| * arm: mvebu: move Armada 370/XP pinctrl node definition armada-370-xp.dtsiArnaud Ebalard2014-11-221-37/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | What was done by Sebastian in 264a05e19bf5 ("ARM: mvebu: armada-xp: Add node alias to pinctrl and add base address") and 01c434225ee6 ("ARM: mvebu: armada-xp: Use pinctrl node alias") can also be done for Armada 370, i.e. - Rename Armada 370 pinctrl node to pin-ctrl with its address encoded - Add a node alias to access the pinctrl node easily. - use the newly available alias in existing Armada 370 .dts files We can even go a bit further by putting the pinctrl node definition in armada-370-xp.dtsi, with only its reg property defined. This allows us to then also use the newly defined node alias in armada-xp.dtsi, armada-370.dtsi. Suggested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Suggested-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Arnaud Ebalard <arno@natisbad.org> Link: https://lkml.kernel.org/r/b54eb45e5242728aace3ce8aef2eae4251f8dea3.1416613429.git.arno@natisbad.org Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| * arm: mvebu: add uartX labels for Armada SoC serial nodesArnaud Ebalard2014-11-221-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds uartX labels for Armada SoC serial nodes. This is a preliminary work to be able to easily reference the serial lines in Device Tree files. One expected use is when providing stdout-path property for barebox. Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Arnaud Ebalard <arno@natisbad.org> Link: https://lkml.kernel.org/r/0683d1a823fe9b75849f3dafcf1cf6ee291cdca6.1416613429.git.arno@natisbad.org Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| * ARM: mvebu: armada-xp: Add GE0 pinctrl settings for GMIISebastian Hesselbarth2014-11-021-0/+11
| | | | | | | | | | | | | | | | There is a GMII setting for GE0, add it to the common pinctrl node. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-By: Benoit Masson <yahoo@perenite.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| * ARM: mvebu: armada-xp: Move GE0/1 pinctrl settings for RGMIISebastian Hesselbarth2014-11-021-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | Pinctrl settings for GE0 and GE1 are not only usable on RD-AXPWiFiAP. Moreover, naming the RGMII settings pmx-ge{0,1} is not precise enough as there is also a GMII setting for GE0. Move the pinctrl sub-nodes to the common pinctrl node and rename them to pmx-ge{0,1}-rgmii. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-By: Benoit Masson <yahoo@perenite.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| * ARM: mvebu: armada-xp: Add node alias to pinctrl and add base addressSebastian Hesselbarth2014-11-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | In other MVEBU SoCs, the pin controller node is called pin-ctrl with its base address added. Also, we have a node alias to access the pinctrl node easily. Fix this for Armada XP pinctrl nodes to be consistent with other SoCs. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-By: Benoit Masson <yahoo@perenite.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| * ARM: mvebu: armada-xp: Consolidate pinctrl nodeSebastian Hesselbarth2014-11-021-0/+10
| | | | | | | | | | | | | | | | | | | | | | All current Armada XP SoCs have their pin controller at 0x18000/0x38. Move the common properties of pinctrl nodes to armada-xp.dtsi to allow to share pinctrl settings later. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-By: Benoit Masson <yahoo@perenite.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| * ARM: mvebu: Fix the Aurora L2 cache node with the required cache-unified ↵Gregory CLEMENT2014-11-011-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | property The L2 cache controller on the Armada 370 and Armada XP SoCs is a unified cache. Moreover, the Aurora cache controller is compatible with the L2x0 cache controller: the "cache-unified" property is required by its binding. This patch fixes the Aurora L2 cache node for the Armada 370 and Armada XP SoCs by adding this property. Reported-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Link: https://lkml.kernel.org/r/1412588276-4514-1-git-send-email-gregory.clement@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* | ARM: mvebu: add SDRAM controller description for Armada XPThomas Petazzoni2014-11-301-0/+5
|/ | | | | | | | | | | | The suspend/resume sequence on Armada XP needs to modify a number of registers in the SDRAM controller. Therefore, this commit updates the Armada XP Device Tree description to include the SDRAM controller Device Tree node. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1416585613-2113-17-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: update Armada XP DT for dynamic frequency scalingThomas Petazzoni2014-07-161-1/+1
| | | | | | | | | | | | | | | | In order to support dynamic frequency scaling: * the cpuclk Device Tree node needs to be updated to describe a second set of registers describing the PMU DFS registers. * the clock-latency property of the CPUs must be filled, otherwise the ondemand and conservative cpufreq governors refuse to work. The latency is high because the cost of a frequency transition is quite high on those CPUs. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1404920715-19834-5-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: use clocks property for serial portsThomas Petazzoni2014-04-261-0/+2
| | | | | | | | | | | | | | | | | | | | | | Back when the Armada 370 and Armada XP initial support was introduced, the only way to pass the clock frequency to the of_serial driver was through a clock-frequency Device Tree property. Thanks to 0bbeb3c3e84bc963d1c66661e082d207023b0e5c ('of serial port driver - add clk_get_rate() support'), it is possible to use the standard 'clocks' DT property to reference the clock used for a particular UART controller. This clock is then used by the of_serial driver to retrieve the clock rate. This commit modifies the SoC-level Device Tree files of Armada 370, Armada XP, Armada 375 and Armada 38x to use this possibility. Since there is no gatable clock for the UART controllers, we simply reference the TCLK, which is the main SoC clock for the peripherals. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1397806908-7550-4-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: switch to the new PMSU binding in Armada 370/XP Device TreeGregory CLEMENT2014-04-241-3/+3
| | | | | | | | | | | | | | | | | | | | | | | Following the introduction of the new PMSU Device Tree binding, as well as the separate CPU reset binding, this commit switches the Armada 370 and Armada XP Device Trees to use them. The PMSU node is moved from the Armada XP specific armada-xp.dtsi to the common Armada 370/XP armada-370-xp.dtsi because the PMSU is in fact available at the same location on both SOCs. The CPU reset node is then added on both Armada 370 and Armada XP, with a different compatible string. On Armada 370, the CPU reset driver is not really needed as Armada 370 is single core and the only use of the CPU reset driver is to boot secondary processors, but it still makes sense to have this CPU reset register described in the Device Tree. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1397483433-25836-6-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1397483433-25836-6-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: Enable Armada 370/XP watchdog in the devicetreeEzequiel Garcia2014-02-171-0/+6
| | | | | | | | | Add the DT nodes to enable watchdog support available in Armada 370 and Armada XP SoCs. Tested-by: Willy Tarreau <w@1wt.eu> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: fix register length for Armada XP PMSUThomas Petazzoni2013-12-251-1/+1
| | | | | | | | | | | | | | | | | | | | The per-CPU PMSU registers documented in the datasheet start at 0x22100 and the last register for CPU3 is at 0x22428. However, the DT informations use <0x22100 0x430>, which makes the region end at 0x22530 and not 0x22430. Moreover, looking at the datasheet, we can see that the registers for CPU0 start at 0x22100, for CPU1 at 0x22200, for CPU2 at 0x22300 and for CPU3 at 0x22400. It seems clear that 0x100 bytes of registers have been used per CPU. Therefore, this commit reduces the length of the PMSU per-CPU register area from the incorrect 0x430 bytes to a more logical 0x400 bytes. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* ARM: mvebu: sort DT nodes by addressJason Cooper2013-12-121-50/+50
| | | | | | Prevent future unnecessary merge conflicts Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* Merge tag 'omap-for-v3.13/quirk-signed' of ↵Kevin Hilman2013-10-151-0/+11
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt From Tony Lindgren: Changes needed to prepare for making omap3 device tree only: - Always build in board-generic, and add pdata quirks and auxdata support for it so we have all the pdata related quirks in the same place. - Merge of the drivers/pinctrl changes that are needed for PM to continue working on omap3 and also needed for other omaps eventually. The three pinctrl related patches have been acked by Linus Walleij and are pulled into both the pinctrl tree and this branch. - Few defconfig related changes for drivers needed. * tag 'omap-for-v3.13/quirk-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (523 commits) ARM: configs: omap2plus_defconfig: enable dwc3 and dependencies ARM: OMAP2+: Add WLAN modules and of_serial to omap2plus_defconfig ARM: OMAP2+: Run make savedefconfig on omap2plus_defconfig to shrink it ARM: OMAP2+: Add minimal 8250 support for GPMC ARM: OMAP2+: Use pdata quirks for wl12xx for omap3 evm and zoom3 ARM: OMAP: Move DT wake-up event handling over to use pinctrl-single-omap ARM: OMAP2+: Add support for auxdata pinctrl: single: Add support for auxdata pinctrl: single: Add support for wake-up interrupts pinctrl: single: Prepare for supporting SoC specific features ARM: OMAP2+: igep0020: use display init from dss-common ARM: OMAP2+: pdata-quirks: add legacy display init for IGEPv2 board +Linux 3.12-rc4 Signed-off-by: Kevin Hilman <khilman@linaro.org>
| * ARM: mvebu: Add clock properties to Armada XP timer nodeEzequiel Garcia2013-09-181-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | With the addition of the Armada XP reference clock, we can now model accurately the available clock inputs for the timer: namely, nbclk and refclk. For each of this clock inputs we assign a name, for the driver to select as appropriate. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Reviewed-by: Mike Turquette <mturquette@linaro.org> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| * ARM: mvebu: Add the reference 25 MHz fixed-clock to Armada XPEzequiel Garcia2013-09-181-0/+9
| | | | | | | | | | | | | | | | | | | | | | The Armada XP SoC has a reference 25 MHz fixed-clock that is used in some controllers such as the timer and the watchdog. This commit adds a DT representation of this clock through a fixed-clock compatible node. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Reviewed-by: Mike Turquette <mturquette@linaro.org> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* | ARM: dts: mvebu: Update with the new compatible string for mv64xxx-i2cGregory CLEMENT2013-09-171-0/+10
|/ | | | | | | | | | | | | | | | The mv64xxx-i2c embedded in the Armada XP have a new feature to offload i2c transaction. This new version of the IP come also with some errata. This lead to the introduction to a another compatible string. This commit split the i2c information into armada-370.dtsi and armada-xp.dtsi. Most of the data remains the same and stay in the common file Armada-370-xp.dtsi. With this new feature the size of the registers are bigger for Armada XP and the new compatible string is used. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* Merge tag 'dt-3.12' of git://git.infradead.org/linux-mvebu into next/socOlof Johansson2013-08-291-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From Jason Cooper: mvebu dt changes for v3.12 - kirkwood - add ZyXEL NSA310 board, fan for ReadyNAS Duo v2 - mvebu - add ReadyNAS 102 board - misc dts updates and changes. v2: - dropped mv64xxx-i2c change * tag 'dt-3.12' of git://git.infradead.org/linux-mvebu: ARM: mvebu: Fix the Armada 370/XP timer compatible strings ARM: mvebu: use dts pre-processor for readynas 102 ARM: kirkwood: use dts pre-processor for nsa310 boards ARM: mvebu: use correct #interrupt-cells instead of #interrupts-cells ARM: Kirkwood: Add support for another ZyXEL NSA310 variant ARM: mvebu: Add Netgear ReadyNAS 102 board arm: kirkwood: readynas duo v2: Add GMT G762 Fan Controller Signed-off-by: Olof Johansson <olof@lixom.net> Conflicts: arch/arm/boot/dts/kirkwood-nsa310.dts
| * ARM: mvebu: Fix the Armada 370/XP timer compatible stringsEzequiel Garcia2013-08-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The "marvell,armada-370-xp-timer" compatible string, together with the "marvell,timer-25Mhz" property are deprecated and should be removed from current DT. Instead, the timer DT nodes are now required to have an appropriate compatible string, which should be either "marvell,armada-370-timer" or "marvell,armada-xp-timer", depending on SoC. The clock property is now required only for Armada 370 so move it accordingly. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* | ARM: mvebu: Add BootROM to Armada 370/XP device treeEzequiel Garcia2013-08-061-0/+5
| | | | | | | | | | | | | | | | | | | | | | In order to access the SoC BootROM, we need to declare a mapping (through a ranges property). The mbus driver will use this property to allocate a suitable address decoding window. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-29 09:18:20 +0100