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* ARM: dts: Move .dts files to vendor sub-directoriesRob Herring2023-06-211-583/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The arm dts directory has grown to 1559 boards which makes it a bit unwieldy to maintain and use. Past attempts stalled out due to plans to move .dts files out of the kernel tree. Doing that is no longer planned (any time soon at least), so let's go ahead and group .dts files by vendors. This move aligns arm with arm64 .dts file structure. There's no change to dtbs_install as the flat structure is maintained on install. The naming of vendor directories is roughly in this order of preference: - Matching original and current SoC vendor prefix/name (e.g. ti, qcom) - Current vendor prefix/name if still actively sold (SoCs which have been aquired) (e.g. nxp/imx) - Existing platform name for older platforms not sold/maintained by any company (e.g. gemini, nspire) The whole move was scripted with the exception of MAINTAINERS and a few makefile fixups. Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Michal Simek <michal.simek@amd.com> #Xilinx Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Neil Armstrong <neil.armstrong@linaro.org> Acked-by: Paul Barker <paul.barker@sancloud.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Wei Xu <xuwei5@hisilicon.com> #hisilicon Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Nick Hawkins <nick.hawkins@hpe.com> Acked-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Acked-by: Peter Rosin <peda@axentia.se> Acked-by: Jesper Nilsson <jesper.nilsson@axis.com> Acked-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> #broadcom Acked-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Jisheng Zhang <jszhang@kernel.org> Acked-by: Patrice Chotard <patrice.chotard@foss.st.com> Acked-by: Romain Perier <romain.perier@gmail.com> Acked-by: Alexandre TORGUE <alexandre.torgue@st.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Acked-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com> Signed-off-by: Rob Herring <robh@kernel.org>
* ARM: dts: berlin: Use generic "ngpios" rather than "snps,nr-gpios"Jisheng Zhang2020-12-101-6/+6
| | | | | | | | | | | | | This is to remove similar errors as below: OF: /.../gpio-port@0: could not find phandle Commit 7569486d79ae ("gpio: dwapb: Add ngpios DT-property support") explained the reason of above errors well and added the generic "ngpios" property, let's use it. Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: dts: berlin: Align L2 cache-controller nodename with dtschemaKrzysztof Kozlowski2020-07-281-1/+1
| | | | | | | | | | | Fix dtschema validator warnings like: l2-cache-controller@ac0000: $nodename:0: 'l2-cache-controller@ac0000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Link: https://lore.kernel.org/r/20200626080642.4244-1-krzk@kernel.org' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* ARM: dts: berlin*: Fix up the SDHCI node namesLubomir Rintel2020-05-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | The node name preferred by mmc-controller.yaml binding spec is "mmc": berlin2-sony-nsz-gs7.dt.yaml: sdhci@ab0000: $nodename:0: 'sdhci@ab0000' does not match '^mmc(@.*)?$' berlin2-sony-nsz-gs7.dt.yaml: sdhci@ab0800: $nodename:0: 'sdhci@ab0800' does not match '^mmc(@.*)?$' berlin2-sony-nsz-gs7.dt.yaml: sdhci@ab1000: $nodename:0: 'sdhci@ab1000' does not match '^mmc(@.*)?$' berlin2cd-google-chromecast.dt.yaml: sdhci@ab0000: $nodename:0: 'sdhci@ab0000' does not match '^mmc(@.*)?$' berlin2cd-valve-steamlink.dt.yaml: sdhci@ab0000: $nodename:0: 'sdhci@ab0000' does not match '^mmc(@.*)?$' berlin2q-marvell-dmp.dt.yaml: sdhci@ab0000: $nodename:0: 'sdhci@ab0000' does not match '^mmc(@.*)?$' berlin2q-marvell-dmp.dt.yaml: sdhci@ab0800: $nodename:0: 'sdhci@ab0800' does not match '^mmc(@.*)?$' berlin2q-marvell-dmp.dt.yaml: sdhci@ab1000: $nodename:0: 'sdhci@ab1000' does not match '^mmc(@.*)?$' Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* ARM: dts: berlin*.dtsi: use SPDX-License-Identifier for berlin SoCsJisheng Zhang2018-05-241-32/+1
| | | | | | | | | | | | | | Follow the recent trend for the license description, and also fix the wrongly stated X11 to MIT. As already pointed on the DT ML, the X11 license text [1] is explicitly for the X Consortium and has a couple of extra clauses. The MIT license text [2] is actually what the current DT files claim. [1] https://spdx.org/licenses/X11.html [2] https://spdx.org/licenses/MIT.html Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
* ARM: dts: berlin2cd: add a label for the CPU nodeAlexander Monakov2018-05-241-1/+1
| | | | | | | This is useful if the board file needs to reference it. Signed-off-by: Alexander Monakov <amonakov@ispras.ru> Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
* ARM: dts: berlin2cd: add remaining nodes to apb subtreesAlexander Monakov2018-05-241-0/+94
| | | | | | | | This adds most of the remaining Designware IP cores under APB trees in the interest of documenting assignment of interrupts and memory ranges. Signed-off-by: Alexander Monakov <amonakov@ispras.ru> Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
* ARM: dts: berlin2cd: add remaining Cortex-A9 nodesAlexander Monakov2018-05-241-0/+19
| | | | | | | | This adds DT nodes for the Cortex-A9 MPCore SCU, local watchdog and most importantly the global timer. Signed-off-by: Alexander Monakov <amonakov@ispras.ru> Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
* ARM: dts: berlin2cd: add ADC/thermal sensor nodeAlexander Monakov2018-05-241-0/+6
| | | | | Signed-off-by: Alexander Monakov <amonakov@ispras.ru> Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
* ARM: dts: berlin2cd: move PMU node from soc to rootAlexander Monakov2018-05-241-5/+6
| | | | | | | | | Cortex-A9 PMU has no associated memory ranges and "make dtbs W=1" warns about missing reg or ranges property. To avoid the warning, move the PMU node out of soc subtree to the root. Signed-off-by: Alexander Monakov <amonakov@ispras.ru> Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
* ARM: dts: berlin2cd: fix local timer interrupt flagsAlexander Monakov2018-05-241-1/+1
| | | | | | | | Use the correct trigger type for Cortex-A9. This was fixed for several other SoCs since the kernel started issuing a boot-time warning. Signed-off-by: Alexander Monakov <amonakov@ispras.ru> Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
* arm: dts: fix unit-address leading 0sRob Herring2017-10-201-3/+3
| | | | | | | | | | | | | Fix dtc warnings for 'simple_bus_reg' due to leading 0s. Converted using the following command: perl -p -i -e 's/\@0+([0-9a-f])/\@$1/g' `find arch/arm/boot/dts -type -f -name '*.dts*' Dropped changes to ARM, Ltd. boards LED nodes and manually fixed up some occurrences of uppercase hex. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* ARM: dts: berlin2cd: Add missing unit name to /soc nodeJisheng Zhang2016-09-281-1/+1
| | | | | | | | | This patch fixes the following DTC warning with W=1: "Node /soc has a reg or ranges property, but no unit name" Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* ARM: dts: berlin2cd: Remove skeleton.dtsi inclusionJisheng Zhang2016-09-281-1/+2
| | | | | | | | | | | As noted in [1], "there are a number of problems with skeleton.dtsi, and it would be prefereable to remove it entirely." This patch is to remove skeleton.dtsi inclusion from berlin2cd. [1] http://www.spinics.net/lists/arm-kernel/msg528080.html Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* arm: dts: berlin2cd: add watchdog nodesJisheng Zhang2015-11-281-0/+23
| | | | | | | | | | | | The Marvell Berlin BG2CD has 3 watchdogs which are compatible with the snps,dw-wdt driver sit in the sysmgr domain. This patch adds the corresponding device tree nodes. NOTE: although BG2CD doesn't have a HW sysmgr, but the sysmgr domain exists. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* ARM: berlin: add a PWM node on the BG2CDAntoine Tenart2015-10-051-0/+7
| | | | | | | | This patch adds a PWM node in the Berlin BG2CD device tree, using the newly added Berlin PWM driver. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* ARM: berlin: dts: add the cpufreq-dt bindings on the BG2CDAntoine Tenart2015-09-211-0/+8
| | | | | | | The BG2CD uses cpugreq-dt. Add the corresponding bindings. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* arm: dts: berlin: add aliases for serialJisheng Zhang2015-09-201-0/+5
| | | | | | | This is to prepare for the using stdout-path in next commit. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* Merge tag 'armsoc-drivers' of ↵Linus Torvalds2015-06-261-25/+41
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver updates from Kevin Hilman: "Some of these are for drivers/soc, where we're now putting SoC-specific drivers these days. Some are for other driver subsystems where we have received acks from the appropriate maintainers. Some highlights: - simple-mfd: document DT bindings and misc updates - migrate mach-berlin to simple-mfd for clock, pinctrl and reset - memory: support for Tegra132 SoC - memory: introduce tegra EMC driver for scaling memory frequency - misc. updates for ARM CCI and CCN busses" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (48 commits) drivers: soc: sunxi: Introduce SoC driver to map SRAMs arm-cci: Add aliases for PMU events arm-cci: Add CCI-500 PMU support arm-cci: Sanitise CCI400 PMU driver specific code arm-cci: Abstract handling for CCI events arm-cci: Abstract out the PMU counter details arm-cci: Cleanup PMU driver code arm-cci: Do not enable CCI-400 PMU by default firmware: qcom: scm: Add HDCP Support ARM: berlin: add an ADC node for the BG2Q ARM: berlin: remove useless chip and system ctrl compatibles clk: berlin: drop direct of_iomap of nodes reg property ARM: berlin: move BG2Q clock node ARM: berlin: move BG2CD clock node ARM: berlin: move BG2 clock node clk: berlin: prepare simple-mfd conversion pinctrl: berlin: drop SoC stub provided regmap ARM: berlin: move pinctrl to simple-mfd nodes pinctrl: berlin: prepare to use regmap provided by syscon reset: berlin: drop arch_initcall initialization ...
| * ARM: berlin: remove useless chip and system ctrl compatiblesAntoine Tenart2015-05-181-2/+2
| | | | | | | | | | | | | | | | Now that the rework to have one sub-node per device in the chip and system controllers is done, their dedicated compatible can be removed. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
| * ARM: berlin: move BG2CD clock nodeAntoine Tenart2015-05-181-17/+21
| | | | | | | | | | | | | | | | | | With the introduction of the Berlin simple-mfd controller driver, all drivers previously sharing the chip and system controller nodes now have their own sub-node. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
| * ARM: berlin: move pinctrl to simple-mfd nodesAntoine Tenart2015-05-181-3/+11
| | | | | | | | | | | | | | | | Now with proper support for simple-mfd probed pinctrl driver, move to the new soc-pinctrl and system-pinctrl nodes. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
| * ARM: berlin: move reset to simple-mfd nodesAntoine Tenart2015-05-181-3/+7
| | | | | | | | | | | | | | | | Now with a proper platform driver for reset and simple-mfd, move to the new marvell,berlin-reset node. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
| * ARM: berlin: prepare simple-mfd/syscon conversion of sys/chip ctrl nodesAntoine Tenart2015-05-181-2/+2
| | | | | | | | | | | | | | | | | | The chip and system controller nodes will be handled by simple-mfd based driver probing. Prepare the conversion by adding "simple-mfd" and "syscon" compatibles to the corresponding nodes. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* | ARM: dts: berlin: relicense the berlin2cd dtsi under GPLv2/X11Antoine Tenart2015-05-161-3/+31
|/ | | | | | | | | | | | The current GPLv2 only licensing on this dtsi makes it very impractical for other software components licensed under another license. In order to make it easier for them to reuse our device trees, relicense this dtsi under a GPLv2/X11 dual-license. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Acked-by: Jisheng Zhang <jszhang@marvell.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* ARM: dts: berlin: add PPI cpu mask to twd timer interruptsJisheng Zhang2015-01-071-1/+1
| | | | | | | | | | According to the gic binding document, "bits[15:8] PPI interrupt cpu mask. Each bit corresponds to each of the 8 possible cpus attached to the GIC. A bit set to '1' indicated the interrupt is wired to that CPU." This patch wants to add the PPI cpu mask for completeness. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* ARM: dts: berlin: add pmu node for BG2Q and BG2CDJisheng Zhang2015-01-071-0/+5
| | | | | | | | This patch adds the pmu node, enabling the PMU unit on Marvell BG2Q and BG2CD SoCs. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* ARM: dts: berlin: add BG2CD nodes for USB supportSebastian Hesselbarth2014-11-181-0/+36
| | | | | | | | | Adds nodes describing the Marvell Berlin BG2CD USB PHY and USB. The BG2CD SoC has 2 USB ChipIdea controllers, with usb0 host-only and usb1 dual-role capable. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* ARM: dts: berlin: Add SDHCI controller nodes to BG2/BG2CDSebastian Hesselbarth2014-10-291-0/+9
| | | | | | | | Marvell Berlin BG2 has three, BG2CD just one pxav3 compatible sdhci controllers, add them to the corresponding DT SoC includes. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* ARM: dts: berlin: Add BG2CD ethernet DT nodesSebastian Hesselbarth2014-10-291-0/+36
| | | | | | | | | Marvell BG2CD has two fast ethernet controllers with internal PHY, add the corresponding nodes to SoC dtsi. Tested-by: Antoine Ténart <antoine.tenart@free-electrons.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* ARM: dts: berlin: add a required reset property in the chip controller nodeAntoine Ténart2014-10-291-0/+1
| | | | | | | | | The chip controller node now also describes the Marvell Berlin reset controller. Add the required 'reset-cells' property. Signed-off-by: Antoine Ténart <antoine.tenart@free-electrons.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* ARM: dts: berlin: add the pinctrl node and muxing setup for uartsAntoine Tenart2014-05-191-0/+12
| | | | | | | | | Add pinctrl bindings and system control nodes to what we currently know about Berlin SoCs. Where available, also set default pinctrl property for uarts, when there is only one pinmux option for it. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* ARM: dts: berlin: convert BG2CD to DT clock nodesSebastian Hesselbarth2014-05-191-29/+24
| | | | | | | | This converts Berlin BG2CD SoC dtsi to make use of the new DT clock nodes for Berlin SoCs. Also add a binding include to ease core clock references. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* ARM: dts: berlin: add the BG2CD GPIO nodesAntoine Tenart2014-05-191-0/+102
| | | | | | | The Berlin BG2CD has 32 GPIOs in SoC power domain and 16 in the SM one. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* ARM: add Armada 1500-mini and Chromecast device tree filesSebastian Hesselbarth2013-12-131-0/+210
This adds very basic device tree files for the Marvell Armada 1500-mini SoC (Berlin BG2CD) and the Google Chromecast. Currently, SoC only has nodes for cpu, some clocks, l2 cache controller, local timer, apb timers, uart, and interrupt controllers. The Google Chromecast is a consumer device comprising the Armada 1500-mini SoC above. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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