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* ARM: dts: imx6: add wakeup support via magic packetJoakim Zhang2021-01-181-0/+1
| | | | | | | Add wakeup support via magic packet on i.MX platforms. Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx: Fix the SPI chipselect polarityFabio Estevam2020-08-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The conversion of the spi-imx driver to use GPIO descriptors in commit 8cdcd8aeee28 ("spi: imx/fsl-lpspi: Convert to GPIO descriptors") helped to detect the following SPI chipselect polarity mismatch on an imx6q-sabresd: [ 4.854337] m25p80@0 enforce active low on chipselect handle Prior to the above commit, the chipselect polarity passed via cs-gpios property was ignored and considered active-low. The reason for such mismatch is clearly explained in the comments inside drivers/gpio/gpiolib-of.c: * SPI children have active low chip selects * by default. This can be specified negatively * by just omitting "spi-cs-high" in the * device node, or actively by tagging on * GPIO_ACTIVE_LOW as flag in the device * tree. If the line is simultaneously * tagged as active low in the device tree * and has the "spi-cs-high" set, we get a * conflict and the "spi-cs-high" flag will * take precedence. To properly represent the SPI chipselect polarity, change it to active-low when the "spi-cs-high" property is absent. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx: default to #pwm-cells = <3> in the SoC dtsi filesUwe Kleine-König2020-07-131-0/+1
| | | | | | | | | | | | | The imx-pwm driver supports 3 cells and this is the more flexible setting. So use it by default and overwrite it back to two for the files that reference the PWMs with just 2 cells to minimize changes. This allows to drop explicit setting to 3 cells for the boards that already depend on this. The boards that are now using 2 cells explicitly can be converted to 3 individually. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx6qdl-sabreauto: Fix storm of accelerometer interruptsFabio Estevam2019-10-261-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit a211b8c55f3c ("ARM: dts: imx6qdl-sabreauto: Add sensors") a storm of accelerometer interrupts is seen: [ 114.211283] irq 260: nobody cared (try booting with the "irqpoll" option) [ 114.218108] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.3.4 #1 [ 114.223960] Hardware name: Freescale i.MX6 Quad/DualLite (Device Tree) [ 114.230531] [<c0112858>] (unwind_backtrace) from [<c010cdc8>] (show_stack+0x10/0x14) [ 114.238301] [<c010cdc8>] (show_stack) from [<c0c1aa1c>] (dump_stack+0xd8/0x110) [ 114.245644] [<c0c1aa1c>] (dump_stack) from [<c0193594>] (__report_bad_irq+0x30/0xc0) [ 114.253417] [<c0193594>] (__report_bad_irq) from [<c01933ac>] (note_interrupt+0x108/0x298) [ 114.261707] [<c01933ac>] (note_interrupt) from [<c018ffe4>] (handle_irq_event_percpu+0x70/0x80) [ 114.270433] [<c018ffe4>] (handle_irq_event_percpu) from [<c019002c>] (handle_irq_event+0x38/0x5c) [ 114.279326] [<c019002c>] (handle_irq_event) from [<c019438c>] (handle_level_irq+0xc8/0x154) [ 114.287701] [<c019438c>] (handle_level_irq) from [<c018eda0>] (generic_handle_irq+0x20/0x34) [ 114.296166] [<c018eda0>] (generic_handle_irq) from [<c0534214>] (mxc_gpio_irq_handler+0x30/0xf0) [ 114.304975] [<c0534214>] (mxc_gpio_irq_handler) from [<c0534334>] (mx3_gpio_irq_handler+0x60/0xb0) [ 114.313955] [<c0534334>] (mx3_gpio_irq_handler) from [<c018eda0>] (generic_handle_irq+0x20/0x34) [ 114.322762] [<c018eda0>] (generic_handle_irq) from [<c018f3ac>] (__handle_domain_irq+0x64/0xe0) [ 114.331485] [<c018f3ac>] (__handle_domain_irq) from [<c05215a8>] (gic_handle_irq+0x4c/0xa8) [ 114.339862] [<c05215a8>] (gic_handle_irq) from [<c0101a70>] (__irq_svc+0x70/0x98) [ 114.347361] Exception stack(0xc1301ec0 to 0xc1301f08) [ 114.352435] 1ec0: 00000001 00000006 00000000 c130c340 00000001 c130f688 9785636d c13ea2e8 [ 114.360635] 1ee0: 9784907d 0000001a eaf99d78 0000001a 00000000 c1301f10 c0182b00 c0878de4 [ 114.368830] 1f00: 20000013 ffffffff [ 114.372349] [<c0101a70>] (__irq_svc) from [<c0878de4>] (cpuidle_enter_state+0x168/0x5f4) [ 114.380464] [<c0878de4>] (cpuidle_enter_state) from [<c08792ac>] (cpuidle_enter+0x28/0x38) [ 114.388751] [<c08792ac>] (cpuidle_enter) from [<c015ef9c>] (do_idle+0x224/0x2a8) [ 114.396168] [<c015ef9c>] (do_idle) from [<c015f3b8>] (cpu_startup_entry+0x18/0x20) [ 114.403765] [<c015f3b8>] (cpu_startup_entry) from [<c1200e54>] (start_kernel+0x43c/0x500) [ 114.411958] handlers: [ 114.414302] [<a01028b8>] irq_default_primary_handler threaded [<fd7a3b08>] mma8452_interrupt [ 114.422974] Disabling IRQ #260 CPU0 CPU1 .... 260: 100001 0 gpio-mxc 31 Level mma8451 The MMA8451 interrupt triggers as low level, so the GPIO6_IO31 pin needs to activate its pull up, otherwise it will stay always at low level generating multiple interrupts. The current device tree does not configure the IOMUX for this pin, so it uses whathever comes configured from the bootloader. The IOMUXC_SW_PAD_CTL_PAD_EIM_BCLK register value comes as 0x8000 from the bootloader, which has PKE bit cleared, hence disabling the pull-up. Instead of relying on a previous configuration from the bootloader, configure the GPIO6_IO31 pin with pull-up enabled in order to fix this problem. Fixes: a211b8c55f3c ("ARM: dts: imx6qdl-sabreauto: Add sensors") Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-By: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx: Fix the AR803X phy-modeFabio Estevam2019-04-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 6d4cd041f0af ("net: phy: at803x: disable delay only for RGMII mode") exposed an issue on imx DTS files using AR8031/AR8035 PHYs. The end result is that the boards can no longer obtain an IP address via UDHCP, for example. Quoting Andrew Lunn: "The problem here is, all the DTs were broken since day 0. However, because the PHY driver was also broken, nobody noticed and it worked. Now that the PHY driver has been fixed, all the bugs in the DTs now become an issue" To fix this problem, the phy-mode property needs to be "rgmii-id", which has the following meaning as per Documentation/devicetree/bindings/net/ethernet.txt: "RGMII with internal RX and TX delays provided by the PHY, the MAC should not add the RX or TX delays in this case)" Tested on imx6-sabresd, imx6sx-sdb and imx7d-pico boards with successfully restored networking. Based on the initial submission from Steve Twiss for the imx6qdl-sabresd. Signed-off-by: Fabio Estevam <festevam@gmail.com> Tested-by: Baruch Siach <baruch@tkos.co.il> Tested-by: Soeren Moch <smoch@web.de> Tested-by: Steve Twiss <stwiss.opensource@diasemi.com> Tested-by: Adam Thomson <Adam.Thomson@diasemi.com> Signed-off-by: Steve Twiss <stwiss.opensource@diasemi.com> Tested-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx6qdl: Fix memory node duplicationMarco Franchi2018-12-101-0/+1
| | | | | | | | | | | | | | | | | | Boards based on imx6qdl have duplicate memory nodes: - One coming from the board device tree file: memory@ - One coming from the imx6qdl.dtsi file. Fix the duplication by removing the memory node from the imx6qdl.dtsi file and by adding 'device_type = "memory";' in the board Device Tree. Converted using the following command: perl -p0777i -e 's/memory\@10000000 \{\n/memory\@10000000 \{\n\t\tdevice_type = \"memory\";\n/m' `find ./arch/arm/boot/dts -name "imx6*"`` Reported-by: Rob Herring <robh@kernel.org> Signed-off-by: Marco Franchi <marco.franchi@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx6qdl-sabreauto: add flexcan supportAisheng Dong2018-12-101-0/+47
| | | | | | | | | The flexcan1 is pin conflict with fec. User would make flexcan1 enabled with fec disabled to use CAN. Signed-off-by: Aisheng Dong <aisheng.dong@nxp.com> Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx6qdl-sabreauto: Enable pcieLeonard Crestez2018-12-101-0/+4
| | | | | | | | | | | | | The imx6qdl-sabreauto boards have a pcie slot so let's enable it. Tested on imx6dl-sabreauto with an atk9k wifi card; scanning works. There are unhandled differences for imx6qp but imx6qp-sabreauto.dts already contains a snippet explicitly disabling the &pcie node so that can be dealt with later. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx6qdl-sabreauto: Remove reg property from fixed regulatorJoakim Zhang2018-11-051-31/+22
| | | | | | | | Drop reg property from fixed regulator and remove the unncessary bus node. Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx6qdl-sabreauto: add egalax touch screen supportAnson Huang2018-09-101-0/+15
| | | | | | | Add egalax touch screen support on i2c2 bus. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx6qdl-sabreauto: add gpio keys supportAnson Huang2018-09-101-0/+52
| | | | | | | | | | | | | | Add i.MX6QDL SabreAuto board's gpio keys support, there are 5 gpio keys on base board: SW3: KEY_HOME; SW4: KEY_BACK; SW5: KEY_PROGRAM; SW6: KEY_VOLUMEUP; SW7: KEY_VOLUMEDOWN; Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx: Add missing chosen/stdout-pathLeonard Crestez2018-07-011-0/+4
| | | | | | | | This makes it possible to enable earlycon for debugging by just passing an empty "earlycon" argument on the kernel command-line. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx6qdl-sabreauto: Add sensorsLeonard Crestez2018-06-191-0/+21
| | | | | | | | | | | | | | | | | | | | The following sensors are on I2C3 on the baseboard: * isil,isl29023 light sensor * fsl,mag3110 magnetometer * fsl,mma8451 accelerometer Added under i2cmux/i2c@1 because they're not otherwise accessible. These are all supported by iio with following configs: * CONFIG_SENSORS_ISL29018 * CONFIG_MAG3110 * CONFIG_MMA8452 Tested with raw reads from iio sysfs. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx: Switch NXP boards to SPDX identifierFabio Estevam2018-05-151-11/+4
| | | | | | | | Adopt the SPDX license identifier headers to ease license compliance management. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx: Add memory node unit nameMarco Franchi2018-02-121-1/+1
| | | | | | | | | | | | | | | | | | | | Fix the following warnings from dtc by adding the unit name to memory nodes: Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name Converted using the following command: perl -p0777i -e 's/memory \{\n\t\treg = \<0x+([0-9a-f])/memory\@$1$\0000000 \{\n\t\treg = <0x$1/m' `find ./arch/arm/boot/dts -name "imx*"` The files below were manually fixed: -imx1-ads.dts -imx1-apf9328.dts -imx6q-pistachio.dts Signed-off-by: Marco Franchi <marco.franchi@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx6qdl-sabreauto: Add CEC supportFabio Estevam2017-12-261-0/+8
| | | | | | | HDMI_TX_CEC_LINE pin is used for CEC, so pass it in the device tree. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx6qdl-sabreauto: Pass the DDC I2C busFabio Estevam2017-12-261-0/+1
| | | | | | | | On imx6qdl-sabreauto the HDMI DDC bus is connected to I2C2, so pass the 'ddc-i2c-bus' property accordingly. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* arm: dts: fix unit-address leading 0sRob Herring2017-10-201-1/+1
| | | | | | | | | | | | | Fix dtc warnings for 'simple_bus_reg' due to leading 0s. Converted using the following command: perl -p -i -e 's/\@0+([0-9a-f])/\@$1/g' `find arch/arm/boot/dts -type -f -name '*.dts*' Dropped changes to ARM, Ltd. boards LED nodes and manually fixed up some occurrences of uppercase hex. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* ARM: dts: imx6-sabreauto: add the ADV7180 video decoderSteve Longerbeam2017-06-141-0/+45
| | | | | | | | | | | | | | | | Enables the ADV7180 decoder sensor. The ADV7180 connects to the parallel-bus mux input on ipu1_csi0_mux. The ADV7180 power pin is via max7310_b port expander. Changes from Tim Harvey: - Use IRQ_TYPE_LEVEL_LOW instead of 0x8 for interrupt type for clarity. - For 8-bit parallel IPU1-CSI0 bus connection only data[12-19] are used. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx6-sabreauto: add pinctrl for gpt input captureSteve Longerbeam2017-06-141-0/+12
| | | | | | | | Add pinctrl groups for both GPT input capture channels. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx6-sabreauto: add reset-gpios property for max7310_bSteve Longerbeam2017-06-141-0/+9
| | | | | | | | | | | | The reset pin to the port expander chip (MAX7310) is controlled by a gpio, so define a reset-gpios property to control it. There are three MAX7310's on the SabreAuto CPU card (max7310_[abc]), but all use the same pin for their reset. Since all can't acquire the same pin, assign it to max7310_b, that chip is needed by more functions (usb and adv7180). Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx6-sabreauto: create i2cmux for i2c3Steve Longerbeam2017-06-141-21/+44
| | | | | | | | | | | | | | | | | | | | | | The sabreauto uses a steering pin to select between the SDA signal on i2c3 bus, and a data-in pin for an SPI NOR chip. Use i2cmux to control this steering pin. Idle state of the i2cmux selects SPI NOR. This is not a classic way to use i2cmux, since one side of the mux selects something other than an i2c bus, but it works and is probably the cleanest solution. Note that if one thread is attempting to access SPI NOR while another thread is accessing i2c3, the SPI NOR access will fail since the i2cmux has selected the SDA pin rather than SPI NOR data-in. This couldn't be avoided in any case, the board is not designed to allow concurrent i2c3 and SPI NOR functions (and the default device-tree does not enable SPI NOR anyway). Devices hanging off i2c3 should now be defined under i2cmux, so that the steering pin can be properly controlled to access those devices. The port expanders (MAX7310) are thus moved into i2cmux. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx: remove obsoleted property fsl,spi-num-chipselectsVladimir Zapolskiy2017-01-021-1/+0
| | | | | | | | | | | | Since commit b36581df7e78 ("spi: imx: Using existing properties for chipselects") the device tree property 'fsl,spi-num-chipselects' is unused and it is already marked as obsolete in device tree binding documentation. Remove the property from the existing DTS files to avoid its reoccurence on copying. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx6: Add imx-weim parameters to dtsi'sJoshua Clayton2016-11-051-2/+0
| | | | | | | | | | | | | imx-weim should always set address-cells to 2, and size_cells to 1. On imx6, fsl,weim-cs-gpr will always be &gpr Set these common parameters in the dtsi file, rather than in a downstream dts. Signed-off-by: Joshua Clayton <stillcompiling@gmail.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx6qdl: Fix "ERROR: code indent should use tabs where possible"Jagan Teki2016-10-241-1/+1
| | | | | | | Fixed code indent tabs in respetcive imx6qdl dtsi files. Signed-off-by: Jagan Teki <jteki@openedev.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx6qdl: don't configure reserved pad settingsUwe Kleine-König2016-08-091-12/+12
| | | | | | | | | Several dts files set a bit in the SPEED field for pads RGMII_{R,T}{XC,D0,D1,D2,D3,X_CTL}, but that doesn't exist. Writing there doesn't have an effect and the bit reads as zero. Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx6: tag boards that have the HW workaround for ERR006687Lucas Stach2016-06-111-0/+1
| | | | | | | | | Add the DT property to all boards that have the hardware workaround for erratum ERR006687 present. This allows the CPUidle driver to use the deep idle states, even if the FEC is active. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx: Fix the assigned-clock mismatch issue on imx6q/dlBai Ping2015-12-151-3/+3
| | | | | | | | | | The 'assigned-clock-parents' and 'assigned-clock-rates' list should corresponding to the 'assigned-clocks' property clock list. Signed-off-by: Bai Ping <b51503@freescale.com> Fixes: ed339363de1b ("ARM: dts: imx6qdl-sabreauto: Allow HDMI and LVDS to work simultaneously") Cc: <stable@vger.kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* ARM: dts: imx: add "jedec,spi-nor" flash compatible bindingRafał Miłecki2015-10-191-1/+1
| | | | | | | | | | | | Starting with commit 8947e396a829 ("Documentation: dt: mtd: replace "nor-jedec" binding with "jedec, spi-nor"") we have "jedec,spi-nor" binding indicating support for JEDEC identification. Use it for all flashes that are supposed to support READ ID op according to the datasheets. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* Merge tag 'armsoc-dt' of ↵Linus Torvalds2015-09-011-0/+137
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM DT updates from Olof Johansson: "Ladies and gentlemen, we proudly announce to you the latest branch of ARM device tree contents for the mainline kernel. Come and see, come and see! No less than twentythree thousand lines of additions! Just imagine the joy you will have of using your mainline kernel on newly supported hardware such as Rockchip Chromebooks, Freescale i.MX6UL boards or UniPhier hardware! For those of you feeling less adventurous, added hardware support on platforms such as TI DM814x and Gumstix Overo platforms might be more of your liking. We've got something for everyone here! Ahem. Cough. So, anyway... This is the usual large batch of DT updates. Lots and lots of smaller changes, some of the larger ones to point out are: - Rockchip veyron (Chromebook) support, as well as several other new boards - DRM support on Atmel AT91SAM9N12EK - USB additions on some Allwinner platforms - Mediatek MT6580 support - Freescale i.MX6UL support - cleanups for Renesas shmobile platforms - lots of added devices on LPC18xx - lots of added devices and boards on UniPhier There's also some dependent code added here, in particular some branches that are primarily merged through the clock tree" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (389 commits) ARM: tegra: Add gpio-ranges property ARM: tegra: Fix AHB base address on Tegra20, Tegra30 and Tegra114 ARM: tegra: Add Tegra124 PMU support ARM: tegra: jetson-tk1: Add GK20A GPU DT node ARM: tegra: venice2: Add GK20A GPU DT node ARM: tegra: Add IOMMU node to GK20A ARM: tegra: Add CPU regulator to the Jetson TK1 device tree ARM: tegra: Add entries for cpufreq on Tegra124 ARM: tegra: Enable the DFLL on the Jetson TK1 ARM: tegra: Add the DFLL to Tegra124 device tree ARM: dts: zynq: Add devicetree entry for Xilinx Zynq reset controller. ARM: dts: UniPhier: fix PPI interrupt CPU mask of timer nodes ARM: dts: rockchip: correct regulator power states for suspend ARM: dts: rockchip: correct regulator PM properties ARM: dts: vexpress: Use assigned-clock-parents for sp810 pinctrl: tegra: Only set the gpio range if needed arm: boot: dts: am4372: add ARM timers and SCU nodes ARM: dts: AM4372: Add the am4372-rtc compatible string ARM: shmobile: r8a7794 dtsi: Add CPG/MSTP Clock Domain ARM: shmobile: r8a7793 dtsi: Add CPG/MSTP Clock Domain ...
| * ARM: imx6qdl-sabreauto.dtsi: enable USB supportPeter Chen2015-08-111-0/+38
| | | | | | | | | | | | | | Add USBOTG and USB host 1 support Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * ARM: dts: imx6qdl-sabreauto: Allow HDMI and LVDS to work simultaneouslyFabio Estevam2015-08-111-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently it is not possible to have HDMI and LVDS working simultaneously, because both ports try to use PLL5. Move the LVDS clock parent to PLL3_USB_OTG, so that HDMI and LVDS can be driven from independent sources. With this change the LDB pixel clock goes to 68.57 MHz, which is still within the valid range for the HSD100PXN1 LVDS panel. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * ARM: dts: imx6qdl-sabreauto: Add audio supportShengjiu Wang2015-07-151-0/+91
| | | | | | | | | | | | | | Add ESAI, ASRC, CS42888 for imx6qdl-sabreauto board Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * ARM: dts: imx6qdl-sabreauto: Add HDMI supportFabio Estevam2015-07-151-0/+4
| | | | | | | | | | | | | | | | | | Add HDMI support. As the DDC I2C pins are not connected due to pin conflicts, we do not pass the 'ddc-i2c-bus' property in this case. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* | dts: imx6: fix sd card gpio polarity specified in device treeDong Aisheng2015-07-241-2/+2
|/ | | | | | | | | | | cd-gpios polarity should be changed to GPIO_ACTIVE_LOW and wp-gpios should be changed to GPIO_ACTIVE_HIGH. Otherwise, the SD may not work properly due to wrong polarity inversion specified in DT after switch to common parsing function mmc_of_parse(). Signed-off-by: Dong Aisheng <aisheng.dong@freescale.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* ARM: dts: imx6qdl-sabreauto: remove pinctrl-assert-gpiosShawn Guo2015-04-281-1/+0
| | | | | | | | The pinctrl-assert-gpios is an invalid pinctrl property. It was probably sneaked from vendor tree. Remove it. Fixes: 4e18a2243a87 ("ARM: imx6qdl-sabreauto.dtsi: add max7310 support") Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: imx6qdl-sabreauto.dtsi: add max7310 supportPeter Chen2015-03-301-0/+35
| | | | | | | max7310 is an i2c interface gpio expander Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx6qdl-sabreauto: Support debug LEDLiu Ying2014-02-201-0/+19
| | | | | | | | | | The D9 LED controlled by gpio on the imx6qdl-sabreauto CPU board is a debug LED according to the board design. This patch adds the relevant device tree nodes to the imx6qdl-sabreauto device tree file to support this LED. Signed-off-by: Liu Ying <Ying.Liu@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx6qdl-sabreauto: Add PFUZE100 supportFabio Estevam2014-02-101-0/+113
| | | | | | | mx6 sabreauto boards have Freescale PFUZE100 regulator, so add support for it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx6qdl-sabreauto: Add LVDS supportFabio Estevam2014-02-101-0/+45
| | | | | | | Add LVDS support for mx6 sabreauto boards. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx6qdl-sabreauto: use GPIO_6 for FEC interrupt.Troy Kisky2014-02-101-0/+3
| | | | | | | This works around a hardware bug. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx6qdl: add spdif support for sabreautoNicolin Chen2014-02-091-0/+20
| | | | | | | | This patch adds spdif support for imx6qdl-sabreauto by inserting the cpu dai node with pinctrl group and its ASoC dai link node. Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx6qdl: make pinctrl nodes board specificShawn Guo2014-02-091-12/+166
| | | | | | | | | | | | | | | | | | | Currently, all pinctrl setting nodes are defined in <soc>.dtsi, so that boards that share the same pinctrl setting do not have to define it time and time again in <board>.dts. However, along with the devices and use cases being added continuously, the pinctrl setting nodes under iomuxc becomes more than expected. This bloats device tree blob for particular board unnecessarily since only a small subset of those pinctrl setting nodes will be used by the board. It impacts not only the DTB file size but also the run-time device tree lookup efficiency. The patch moves all the pinctrl data into individual boards as needed. With the changes, the pinctrl setting nodes becomes local to particular board, and it makes no sense to continue numbering the setting for given peripheral. Thus, all the pinctrl phandler name gets updated to have only peripheral name in there. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx6qdl: add uhs pinctrl state for usdhc3Dong Aisheng2013-09-261-1/+4
| | | | | | | This is needed for supporting ultra high speed cards like SD3.0 cards. Signed-off-by: Dong Aisheng <b29396@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx: share pad macro names between imx6q and imx6dlShawn Guo2013-08-221-0/+22
| | | | | | | | | | | | | | | | | | | | | The imx6q and imx6dl are two pin-to-pin compatible SoCs. The same board design can work with either chip plugged into the socket, e.g. sabresd and sabreauto boards. We currently define pin groups in imx6q.dtsi and imx6dl.dtsi respectively because the pad macro names are different between two chips. This brings a maintenance burden on having the same label point to the same pin group defined in two places. The patch replaces prefix MX6Q_ and MX6DL_ with MX6QDL_ for both SoCs pad macro names. Then the pin groups becomes completely common between imx6q and imx6dl and can just be moved into imx6qdl.dtsi, so that the long term maintenance of imx6q/dt pin settings becomes easier. Unfortunately, the change brings some dramatic diff stat, but it's all about DTS file, and the ultimate net diff stat is good. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx6qdl-sabreauto: enable the WEIM NORHuang Shijie2013-06-171-0/+19
| | | | | | | | | Enable the WEIM NOR for imx6q{dl}-sabreauto boards. For the pin conflict with SPI NOR, its status is set to "disabled". Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx6q{dl}: fix the pin conflict between SPI and WEIMHuang Shijie2013-06-171-1/+1
| | | | | | | | | | | | | | In the imx6q-sabreauto and imx6dl-sabreauto boards, the pin MX6Q{DL}_PAD_EIM_D19 is used as a GPIO for SPI NOR, but it is used as a data pin for the WEIM NOR. In order to fix the conflict, this patch removes the pin from the hog, and adds a new board-level pinctrl: pinctrl_ecspi1_sabreauto. The SPI NOR selects this pinctrl_ecspi1_sabreauto when it is enabled. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: add SPI/NOR for mx6q{dl}-sabreauto boardsHuang Shijie2013-06-171-0/+16
| | | | | | | | Since the SPI/NOR has pin conflict with the WEIM NOR, we disable the spi/nor by default. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: enable the gpmi-nand for imx6q{dl}-sabreauto boardsHuang Shijie2013-06-171-0/+6
| | | | | | | enable the gpmi-nand for imx6q-sabreauto and imx6qdl-sabreauto boards. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx: make sabreauto and sabresd commonShawn Guo2013-04-091-0/+38
The sabreauto and sabresd boards are common for imx6q and imx6dl. Create imx6qdl-sabreauto.dtsi and imx6qdl-sabresd.dtsi for those common parts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-29 15:25:50 +0100