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* ARM: dts: lpc32xx: phy3250: add SoC name prefix to board dts fileVladimir Zapolskiy2016-04-271-226/+0
| | | | | | | | | To simplify matching of DTS files of all NXP LPC32xx powered boards by a file name add 'lpc3250' prefix to PHYTEC PHYCORE-LPC3250 board dts file. Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
* ARM: dts: lpc32xx: phy3250: add NAND partitions device nodeVladimir Zapolskiy2016-04-271-23/+27
| | | | | | | | | | | | To declare MTD OF partitions NAND controller device node should have a special 'partitions' subnode, the change removes a debug message from mtd/ofpart on boot: nxp_lpc3220_slc: 'partitions' subnode not found on /ahb/flash@20020000. Trying to parse direct subnodes as partitions. Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
* ARM: dts: lpc32xx: phy3250: avoid extension of device nodes by absolute pathVladimir Zapolskiy2016-04-271-144/+138
| | | | | | | | | | The change simplifies layout of PHY3250 board description by referencing device nodes of LPC32xx controllers by label. No functional change intended. Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
* ARM: dts: phy3250: enable ssp0Sylvain Lemieux2016-04-211-0/+1
| | | | | | | | Preparatory change prior to disabling SSPx controllers by default in the shared LPC32xx DTSI file. Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
* arm: dts: phy3250: add SD fixed regulatorVladimir Zapolskiy2016-02-111-0/+10
| | | | | | | The change adds fixed voltage regulator for SD controller, ARM MMCI controller driver uses it to control card power management. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
* arm: dts: phy3250: add lcd and backlight fixed regulatorsVladimir Zapolskiy2016-02-111-0/+22
| | | | | | | Phytec PHY3250 board has GPIO controlled regulators for LCD and backlight, add their descriptions to board DTS file. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
* arm: dts: lpc32xx: move USB controller subdevices into own device nodeVladimir Zapolskiy2015-11-181-22/+15
| | | | | | | | | | | | | | | | | | | | | | | NXP LPC32xx SoC has one USB OTG controller, which is supposed to work with an external phy (default is NXP ISP1301). Practically the USB controller contains 5 subdevices: - host controller 0x3102 0000 -- 0x3102 00FF - OTG controller 0x3102 0100 -- 0x3102 01FF - device controller 0x3102 0200 -- 0x3102 02FF - I2C controller 0x3102 0300 -- 0x3102 03FF - clock controller 0x3102 0F00 -- 0x3102 0FFF The USB controller can be considered as a "bus", because the subdevices above are relatively independent, for example I2C controller is the same as other two general purpose I2C controllers found on SoC. The change is not intended to modify any logic, but it rearranges existing device nodes, in future it is planned to add a USB clock controller device node into the same group. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
* arm: dts: ea3250/phy3250: specify phys memory offset for lpc32xx boardsVladimir Zapolskiy2015-11-181-1/+1
| | | | | | | In case if SDRAM memory region is not populated by a bootloader, provide this value in device trees for EA3250 and PHY3250 boards. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
* arm: dts: lpc32xx: change include syntax to be C preprocessor friendlyVladimir Zapolskiy2015-11-181-1/+1
| | | | | | | | | | | The change replaces /include/ to #include in lpc32xx.dtsi and derivatives, it is required, if C preprocessor is intended to be used over dtsi/dts files, otherwise errors like one below are generated: Error: ea3250.dts:15.1-9 syntax error FATAL ERROR: Unable to parse input tree Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
* ARM: LPC32xx: LED fix in PHY3250 DTS fileRoland Stigge2012-09-251-7/+5
| | | | | | | This patch adjusts the PHY3250 board file to the actual LED configuration (active high, default-state and trigger configuration). Signed-off-by: Roland Stigge <stigge@antcom.de>
* ARM: LPC32xx: Adjust device tree node to new standard num-csRoland Stigge2012-09-061-3/+1
| | | | | | | | | | In spi-pl022.c, the new device tree binding is now "num-cs" for the number of chip selects. Further, pl022,hierarchy and pl022,slave-tx-disable isn't supported in favour of reasonable defaults in the driver. Adjusting phy3250.dts to it. Signed-off-by: Roland Stigge <stigge@antcom.de>
* ARM: LPC32xx: Add dt settings to the at25 nodeAlexandre Pereira da Silva2012-06-141-0/+21
| | | | | | | | | Add the reg, cs-gpios and max-frequencies that are needed for spi device registry in phy3250. Adds also the pl022 internal transfers details via dt Signed-off-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com> Signed-off-by: Roland Stigge <stigge@antcom.de>
* ARM: LPC32xx: High Speed UART configuration via DTRoland Stigge2012-06-141-0/+4
| | | | | | | | | This patch fixes the DTS files for the High Speed UARTs 1, 2 and 7 of the LPC32xx SoC, adjusting the compatible strings, adding interrupts and status configuration. On the PHY3250 reference board, UART2 is enabled. Signed-off-by: Roland Stigge <stigge@antcom.de> Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
* ARM: LPC32xx: DT conversion of Standard UARTsRoland Stigge2012-06-141-0/+8
| | | | | | | | | | | | This patch switches from static serial driver initialization to devicetree configuration. This way, the Standard UARTs of the LPC32xx SoC can be enabled individually via DT. E.g., instead of Kconfig configuration, the phy3250.dts activates UARTs 3 and 5. Signed-off-by: Roland Stigge <stigge@antcom.de> Tested-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
* ARM: LPC32xx: DTS adjustment for using pl18x primecellRoland Stigge2012-06-141-0/+8
| | | | | | | This patch adjusts the dts files to reference the pl18x primecell driver correctly. Signed-off-by: Roland Stigge <stigge@antcom.de>
* ARM: LPC32xx: DTS adjustment for key matrix controllerRoland Stigge2012-06-141-0/+9
| | | | | | | | | This patch connects the lpc32xx-key driver to the LPC32xx platform (via lpc32xx.dtsi), and more specifically to the reference board via its dts file. Signed-off-by: Roland Stigge <stigge@antcom.de> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
* ARM: LPC32xx: Add NAND flash timing to PHY3250 board dtsRoland Stigge2012-06-141-0/+11
| | | | | | | | This patch adds necessary NAND flash timings to the board specific dts file of the PHY3250 reference board of the LPC32xx SoC. Signed-off-by: Roland Stigge <stigge@antcom.de> Tested-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
* ARM: LPC32xx: Adjust dts files to gpio dt bindingRoland Stigge2012-05-311-2/+2
| | | | | | | | | | The GPIO devicetree binding in 3.5 doesn't register the various LPC32xx GPIO banks via DT subnodes but always all at once, and changes the gpio referencing to 3 cells (bank, gpio, flags). This patch adjusts the DTS files to this binding that was just accepted to the gpio subsystem. Signed-off-by: Roland Stigge <stigge@antcom.de> Signed-off-by: Olof Johansson <olof@lixom.net>
* ARM: LPC32xx: DTS files for device tree conversionRoland Stigge2012-04-221-0/+145
This patch adds the dts files for the reference machine of LPC32xx: * arch/arm/boot/dts/lpc32xx.dtsi: Include for devices based on LPC32xx * arch/arm/boot/dts/phy3250.dts: Board support for PHYTEC phyCORE-LPC3250 Signed-off-by: Roland Stigge <stigge@antcom.de>