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* ARM: dts: Move .dts files to vendor sub-directoriesRob Herring2023-06-211-1271/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The arm dts directory has grown to 1559 boards which makes it a bit unwieldy to maintain and use. Past attempts stalled out due to plans to move .dts files out of the kernel tree. Doing that is no longer planned (any time soon at least), so let's go ahead and group .dts files by vendors. This move aligns arm with arm64 .dts file structure. There's no change to dtbs_install as the flat structure is maintained on install. The naming of vendor directories is roughly in this order of preference: - Matching original and current SoC vendor prefix/name (e.g. ti, qcom) - Current vendor prefix/name if still actively sold (SoCs which have been aquired) (e.g. nxp/imx) - Existing platform name for older platforms not sold/maintained by any company (e.g. gemini, nspire) The whole move was scripted with the exception of MAINTAINERS and a few makefile fixups. Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Michal Simek <michal.simek@amd.com> #Xilinx Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Neil Armstrong <neil.armstrong@linaro.org> Acked-by: Paul Barker <paul.barker@sancloud.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Wei Xu <xuwei5@hisilicon.com> #hisilicon Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Nick Hawkins <nick.hawkins@hpe.com> Acked-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Acked-by: Peter Rosin <peda@axentia.se> Acked-by: Jesper Nilsson <jesper.nilsson@axis.com> Acked-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> #broadcom Acked-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Jisheng Zhang <jszhang@kernel.org> Acked-by: Patrice Chotard <patrice.chotard@foss.st.com> Acked-by: Romain Perier <romain.perier@gmail.com> Acked-by: Alexandre TORGUE <alexandre.torgue@st.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Acked-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com> Signed-off-by: Rob Herring <robh@kernel.org>
* ARM: dts: sunxi: Fix OPP arraysMaxime Ripard2021-09-131-6/+5
| | | | | | | | | | | | Even though it translates to the same thing down to the binary level, we should have an array of 2 number cells to describe each OPP, which in turns create a validation warning. Let's fix this. Signed-off-by: Maxime Ripard <maxime@cerno.tech> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20210901091852.479202-42-maxime@cerno.tech
* ARM: dts: sun4i-a10: fix cpu_alert temperatureClément Péron2020-10-051-1/+1
| | | | | | | | | | | | | When running dtbs_check thermal_zone warn about the temperature declared. thermal-zones: cpu-thermal:trips:cpu-alert0:temperature:0:0: 850000 is greater than the maximum of 200000 It's indeed wrong the real value is 85°C and not 850°C. Signed-off-by: Clément Péron <peron.clem@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20201003100332.431178-1-peron.clem@gmail.com
* ARM: dts sunxi: Relax a bit the CMA pool allocation rangeMaxime Ripard2020-07-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The hardware codec on the A10, A10s, A13 and A20 needs buffer in the first 256MB of RAM. This was solved by setting the CMA pool at a fixed address in that range. However, in recent kernels there's something else that comes in and reserve some range that end up conflicting with our default pool requirement, and thus makes its reservation fail. The video codec will then use buffers from the usual default pool, outside of the range it can access, and will fail to decode anything. Since we're only concerned about that 256MB, we can however relax the allocation to just specify the range that's allowed, and not try to enforce a specific address. Fixes: 5949bc5602cc ("ARM: dts: sun4i-a10: Add Video Engine and reserved memory nodes") Fixes: 960432010156 ("ARM: dts: sun5i: Add Video Engine and reserved memory nodes") Fixes: c2a641a74850 ("ARM: dts: sun7i-a20: Add Video Engine and reserved memory nodes") Signed-off-by: Maxime Ripard <maxime@cerno.tech> Acked-by: Chen-Yu Tsai <wens@csie.org> Link: https://lore.kernel.org/r/20200704130829.34297-1-maxime@cerno.tech
* ARM: dts: sun4i: Add CSI1 controller and pinmux optionsChen-Yu Tsai2020-01-061-0/+35
| | | | | | | | | | The CSI controller driver now supports the second CSI controller, CSI1. Add a device node for it. Pinmuxing options for the MCLK output, the standard 8-bit interface, and a secondary 24-bit interface are included. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
* ARM: dts: sunxi: Revert phy-names removal for ECHI and OHCIMaxime Ripard2019-10-041-0/+4
| | | | | | | | | | | | | | | | | | | This reverts commits 3d109bdca981 ("ARM: dts: sunxi: Remove useless phy-names from EHCI and OHCI"), 0a3df8bb6dad ("ARM: dts: sunxi: h3/h5: Remove useless phy-names from EHCI and OHCI") and 3c7ab90aaa28 ("arm64: dts: allwinner: Remove useless phy-names from EHCI and OHCI"). It turns out that while the USB bindings were not mentionning it, the PHY client bindings were mandating that phy-names is set when phys is. Let's add it back. Fixes: 3d109bdca981 ("ARM: dts: sunxi: Remove useless phy-names from EHCI and OHCI") Fixes: 0a3df8bb6dad ("ARM: dts: sunxi: h3/h5: Remove useless phy-names from EHCI and OHCI") Fixes: 3c7ab90aaa28 ("arm64: dts: allwinner: Remove useless phy-names from EHCI and OHCI") Reported-by: Emmanuel Vadot <manu@bidouilliste.com> Signed-off-by: Maxime Ripard <mripard@kernel.org> Link: https://lore.kernel.org/r/20191002112651.100504-1-mripard@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* ARM: dts: sunxi: Add missing watchdog clocksMaxime Ripard2019-08-231-0/+1
| | | | | | | The watchdog has a clock on all our SoCs, but it wasn't always listed. Add it to the devicetree where it's missing. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
* ARM: dts: sunxi: Add missing watchdog interruptsMaxime Ripard2019-08-231-0/+1
| | | | | | | | The watchdog has an interrupt on all our SoCs, but it wasn't always listed. Add it to the devicetree where it's missing. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
* ARM: dts: sun4i: Add missing timers interruptsMaxime Ripard2019-08-231-1/+6
| | | | | | The timer unit in the A10 has 6 interrupts available. List all of them. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
* ARM: dts: sunxi: Remove useless phy-names from EHCI and OHCIMaxime Ripard2019-04-171-4/+0
| | | | | | | | Neither the OHCI or EHCI bindings are using the phy-names property, so we can just drop it. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
* ARM: dts: sunxi: Conform to DT spec for NAND controllerMaxime Ripard2019-04-021-1/+1
| | | | | | | | | The NAND controller node name should be nand-controller and not nand as we used previously according to the devicetree specification. Let's fix our DTs. Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
* ARM: dts: sunxi: Add default dr_modeMaxime Ripard2019-03-251-0/+1
| | | | | | | | | | | The USB OTG binding we have mandates to have a dr_mode property, yet not all boards are setting it. Since the generic otg binding states that the default mode should be the OTG mode, let's use that one in our DTSI. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
* ARM: sunxi: dts: Split USB PHY cells into an arrayMaxime Ripard2019-03-251-1/+1
| | | | | | | | Even though it doesn't make any difference at the binary level, the reg property is an array of cells, and should be represented as such. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
* ARM: dts: sunxi: Fix the TCON output clockMaxime Ripard2019-03-251-0/+2
| | | | | | | | | | | Even though we shouldn't really have any external user of the clock provided by the TCON, if clock-output-names is set, then #clock-cells must be there as well. Fix this. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
* ARM: dts: sun4i-a10: Add Video Engine and reserved memory nodesPaul Kocialkowski2019-01-181-0/+26
| | | | | | | | | | | | | This adds nodes for the Video Engine and the associated reserved memory for the A10. Up to 96 MiB of memory are dedicated to the CMA pool. The VPU can only map the first 256 MiB of DRAM, so the reserved memory pool has to be located in that area. Following Allwinner's decision in downstream software, the last 96 MiB of the first 256 MiB of RAM are reserved for this purpose. Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
* ARM: dts: sun4i: Add support for the C1 SRAM region with the SRAM controllerPaul Kocialkowski2019-01-181-0/+13
| | | | | | | | | This adds support for the C1 SRAM region (to be used with the SRAM controller driver) for the A10 platform. The region is shared between the Video Engine and the CPU. Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
* ARM: dts: sun4i-a10: Add PMU nodeHarald Geyer2019-01-071-0/+5
| | | | | | | | This is necessary to use 'perf' for cache profiling etc. Tested on cubieboard with 'perf stat echo foo'. Signed-off-by: Harald Geyer <harald@ccbib.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
* ARM: dts: sun4i: Fix HDMI output DTC warningMaxime Ripard2018-11-281-2/+0
| | | | | | | | | Our HDMI output endpoint on the A10 DTSI has a warning under DTC: "graph node has single child node 'endpoint', #address-cells/#size-cells are not necessary". Fix this by removing those properties. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
* ARM: dts: sun4i: Add GPU nodeSteven Vanden Branden2018-07-241-0/+21
| | | | | | | | Add mali gpu node to sun4i a10 platforms. Tested with offscreen rendering with lima mesa (freedesktop gitlab) Signed-off-by: Steven Vanden Branden <stevenvandenbrandenstift@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
* ARM: dts: sun4i: Switch to new system control compatible stringPaul Kocialkowski2018-07-111-2/+2
| | | | | | | | | | | | | This switches the sun4i-a10 dtsi to use the new compatible for the system-control block (previously named SRAM controller) instead of the deprecated one. The node name is also updated to reflect the fact that the controller described is really about system control rather than SRAM control. Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> [Maxime: Amended the commit message] Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
* ARM: dts: sun4i: Fix incorrect clocks for displaysPascal Roeleven2018-04-231-3/+3
| | | | | | | | | | | Some displays on sun4i devices wouldn't properly stay on unless 'clk_ignore_unused' is used. Change the duplicate clocks to the probably intended ones. Cc: <stable@vger.kernel.org> Signed-off-by: Pascal Roeleven <dev@pascalroeleven.nl> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
* ARM: dts: sun[4-7]i: Remove "cooling-{min|max}-level" for CPU nodesViresh Kumar2018-02-131-2/+0
| | | | | | | | | | | | The "cooling-min-level" and "cooling-max-level" properties are not parsed by any part of the kernel currently and the max cooling state of a CPU cooling device is found by referring to the cpufreq table instead. Remove the unused properties from the CPU nodes. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
* ARM: dts: sun[47]i: Fix display backend 1 output to TCON0 remote endpointChen-Yu Tsai2018-01-061-1/+1
| | | | | | | | | | | | | | | There is a copy-paste error in the display pipeline device tree graph. The remote endpoint of the display backend 1's output to TCON0 points to the wrong endpoint. This will result in the driver incorrectly parsing the relationship of the components. Reported-by: Andrea Venturi <ennesimamail.av@gmail.com> Fixes: 0df4cf33a594 ("ARM: dts: sun4i: Add device nodes for display pipelines") Fixes: 5b92b29bed45 ("ARM: dts: sun7i: Add device nodes for display pipelines") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sunxi: Convert to CCU index macros for HDMI controllerChen-Yu Tsai2017-12-051-2/+2
| | | | | | | | | | | | When the HDMI controller device node was added, the needed PLL clock macros were not exported. A separate patch addresses that, but it is merged through a different tree. Now that both patches are in mainline proper, we can convert the raw numbers to proper macros. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sun4i: Add device nodes for display pipelinesChen-Yu Tsai2017-10-181-0/+306
| | | | | | | | | | | The A10 has two interconnected display pipelines, much like the A31, but without the DRCs between the backend and TCONs. Add all the device nodes for them, including the downstream HDMI controller that we already support. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sun4i: Provide default muxing for relevant controllersMaxime Ripard2017-10-131-0/+12
| | | | | | | | | The I2C's, MMC0 and EMAC controllers have only one muxing option in the SoC. In such a case, we can just move the muxing into the DTSI, and remove it from the DTS. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sun4i: Change pinctrl nodes to avoid warningMaxime Ripard2017-10-131-30/+30
| | | | | | | | | | | | All our pinctrl nodes were using a node name convention with a unit-address to differentiate the different muxing options. However, since those nodes didn't have a reg property, they were generating warnings in DTC. In order to accomodate for this, convert the old nodes to the syntax we've been using for the new SoCs, including removing the letter suffix of the node labels to the bank of those pins to make things more readable. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sun4i: Remove skeleton and memory to avoid warningsMaxime Ripard2017-10-091-6/+2
| | | | | | | | | Using skeleton.dtsi will create a memory node that will generate a warning in DTC. However, that node will be created by the bootloader, so we can just remove it entirely in order to remove that warning. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sun4i: Rename thermal nodes to avoid warningsMaxime Ripard2017-10-061-3/+3
| | | | | | | | The thermal-zone subnodes we defined for the A10 have underscores in them that will generate DTC warnings. Change those underscores for hyphens. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sun4i: Remove SoC node unit-name to avoid warningsMaxime Ripard2017-10-061-1/+1
| | | | | | | | | | | Our main node for all the in-SoC controllers used to have a unit name. The unit-name, in addition to being actually false, would not match any reg property, which generates a warning. Remove it in order to remove those warnings. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sun4i: Change clock node names to avoid warningsMaxime Ripard2017-10-061-2/+2
| | | | | | | | | Our oscillators clock names have a unit address, but no reg property, which generates a warning in DTC. Change these names to remove those unit addresses. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sun4i: Change framebuffer node names to avoid warningsMaxime Ripard2017-10-061-4/+4
| | | | | | | | | | | The simple-framebuffer nodes have a unit address, but no reg property which generates a warning when compiling it with DTC. Change the simple-framebuffer node names so that there is no warnings on this anymore. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sunxi: Remove leading zeros from unit-addressesMaxime Ripard2017-10-061-55/+55
| | | | | | | | | | Most of our device trees have had leading zeros for padding as part of the nodes unit-addresses. Remove all these useless zeros that generate warnings Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sun4i: Add i2s0 block to dtsiPriit Laes2017-09-171-0/+13
| | | | | | | sun4i-a10.dtsi was missing i2s0 block. Add it. Signed-off-by: Priit Laes <plaes@plaes.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sun4i: Convert to CCUPriit Laes2017-09-171-574/+75
| | | | | | | | | Convert sun4i-a10.dtsi to new CCU driver. Tested on Gemei G9 tablet. Signed-off-by: Priit Laes <plaes@plaes.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: sunxi: Drop mmc0_cd_pin_reference_design pinmux settingChen-Yu Tsai2017-05-141-6/+0
| | | | | | | | | | As part of our effort to move pinctrl/GPIO interlocking into the driver where it belongs, this patch drops the definition and usage of the mmc0_cd_pin_reference_design pinmux setting for the default mmc0 card detect GPIO pin. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sun4i: fix device node orderingPatrick Menschel2017-04-051-16/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch changes the device node position of ps20 and ps21 to fix ordering by rising physical address. From uart7: serial@01c29c00 i2c0: i2c@01c2ac00 i2c1: i2c@01c2b000 i2c2: i2c@01c2b400 ps20: ps2@01c2a000 ps21: ps2@01c2a400 to uart7: serial@01c29c00 ps20: ps2@01c2a000 ps21: ps2@01c2a400 i2c0: i2c@01c2ac00 i2c1: i2c@01c2b000 i2c2: i2c@01c2b400 Signed-off-by: Patrick Menschel <menschel.p@posteo.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sun4i: Add can0_pins_a pinctrl settingsPatrick Menschel2017-04-041-0/+5
| | | | | | | | | | | The A10 SoC has an on-board CAN controller. This patch adds the pinctrl settings for pins PH20 and PH21. This patch is adapted from the description in Documentation/devicetree/bindings/net/can/sun4i_can.txt Signed-off-by: Patrick Menschel <menschel.p@posteo.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sun4i: Add CAN nodePatrick Menschel2017-04-041-0/+8
| | | | | | | | | | | The A10 SoC has an on-board CAN controller. This patch adds the device node. This patch is adapted from the description in Documentation/devicetree/bindings/net/can/sun4i_can.txt Signed-off-by: Patrick Menschel <menschel.p@posteo.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sunxi: Remove no longer used pinctrl/sun4i-a10.h headerChen-Yu Tsai2017-03-271-1/+0
| | | | | | | | | | | | | | | | | All dts files for the sunxi platform have been switched to the generic pinconf bindings. As a result, the sunxi specific pinctrl macros are no longer used. Remove the #include entry with the following command: sed --follow-symlinks -i -e '/pinctrl\/sun4i-a10.h/D' \ arch/arm/boot/dts/sun?i*.* arch/arm/boot/dts/sun9i-a80.dtsi was then edited to remove the extra empty line. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sunxi: Explicitly enable pull-ups for MMC pinsChen-Yu Tsai2017-01-101-0/+1
| | | | | | | | | | | | | | | | | | In the past, all the MMC pins had allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; which was actually a no-op. We were relying on U-boot to set the bias pull up for us. These properties were removed as part of the fix up to actually support no bias on the pins. During the transition some boards experienced regular MMC time-outs during normal operation, while others completely failed to initialize the SD card. Given that MMC starts in open-drain mode and the pull-ups are required, it's best to enable it for all the pin settings. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: sunxi: Convert pinctrl nodes to generic bindingsMaxime Ripard2016-12-261-60/+60
| | | | | | | | Now that we can handle the generic pinctrl bindings, convert our DT to it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: sunxi: Remove useless allwinner,pull propertyMaxime Ripard2016-12-261-24/+0
| | | | | | | | | | | | The allwinner,pull property set to NO_PULL was really considered our default (and wasn't even changing the default value in the code). Remove these properties to make it obvious that we do not set anything in such a case. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: sunxi: Remove useless allwinner,drive propertyMaxime Ripard2016-12-261-25/+0
| | | | | | | | | The allwinner,drive property set to 10mA was really considered as our default. Remove all those properties entirely to make that obvious. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: sunxi: Add the missing clocks to the pinctrl nodesMaxime Ripard2016-11-221-1/+2
| | | | | | | | | The pin controllers also use the two oscillators for debouncing. Add them to the DTs. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Chen-Yu Tsai <wens@csie.org>
* ARM: dts: sun4i: Add NFC node to Allwinner A10 SoCBoris Brezillon2016-07-041-0/+13
| | | | | | | | Add NAND Flash controller node definition to the A10 SoC. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Aleksei Mamlin <mamlinav@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sun4i: Re-order pinctrl nodes alphabeticallyAleksei Mamlin2016-07-041-57/+57
| | | | | | | No functional change. Re-order sun4i pinctrl nodes alphabetically. Signed-off-by: Aleksei Mamlin <mamlinav@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sun4i: HDMI and the tv-encoder use tcon ch1 not ch0Hans de Goede2016-07-041-5/+7
| | | | | | | | | | | Update the simplefb nodes for hdmi / tv-encoder out to point to tcon0_ch1 instead of tcon0_ch0 as tcon clock. While at it fix the clocks lines being longer than 80 chars. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: sun4i: A10: Add display and TCON clocksPriit Laes2016-07-041-11/+85
| | | | | | | | Enable the display and TCON clocks that are needed to drive the display engine, tcon and TV encoders. Signed-off-by: Priit Laes <plaes@plaes.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sunxi: Add pll3 to simplefb nodes clocks listsHans de Goede2016-06-221-9/+12
| | | | | | | | | | | Now that we've a clock node describing pll3 we must add it to the simplefb nodes clocks lists to avoid it getting turned off when simplefb is used. This fixes the screen going black when using simplefb. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-25 02:51:04 +0100