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* ARM: dts: sun5i: Provide default muxing for relevant controllersMaxime Ripard2018-11-281-0/+5
| | | | | | | | | The I2C's, MMC0 and MMC1 controllers have only one muxing option in the SoC. In such a case, we can just move the muxing into the DTSI, and remove it from the DTS. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
* ARM: dts: sun5i: A10s: Remove empty SRAM nodeMaxime Ripard2018-11-281-3/+0
| | | | | | | The SRAM node in the A10s DTSI is empty, remove it. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
* ARM: dts: sun5i: a10s: Fix HDMI output DTC warningMaxime Ripard2018-11-281-2/+0
| | | | | | | | | Our HDMI output endpoint on the A10s DTSI has a warning under DTC: "graph node has single child node 'endpoint', #address-cells/#size-cells are not necessary". Fix this by removing those properties. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
* ARM: dts: sun5i: Change pinctrl nodes to avoid warningMaxime Ripard2018-11-281-6/+6
| | | | | | | | | | | | | All our pinctrl nodes were using a node name convention with a unit-address to differentiate the different muxing options. However, since those nodes didn't have a reg property, they were generating warnings in DTC. In order to accomodate for this, convert the old nodes to the syntax we've been using for the new SoCs, including removing the letter suffix of the node labels to the bank of those pins to make things more readable. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
* ARM: dts: sun5i: Remove redundant interrupt-controllerMaxime Ripard2018-11-281-2/+0
| | | | | | | | The interrupt-parent property is set in sun5i.dtsi, so there's no need to repeat it. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
* ARM: dts: sun5i: Remove SoC node unit-name to avoid warningsMaxime Ripard2018-11-281-1/+1
| | | | | | | | | | | Our main node for all the in-SoC controllers used to have a unit name. The unit-name, in addition to being actually false, would not match any reg property, which generates a warning. Remove it in order to remove those warnings. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
* ARM: dts: sun5i: Remove skeleton to avoid warningsMaxime Ripard2018-11-281-2/+0
| | | | | | | | | Using skeleton.dtsi will create a memory node that will generate a warning in DTC. However, that node will be created by the bootloader, so we can just remove it entirely in order to remove that warning. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
* ARM: dts: sun5i: Change framebuffer node names to avoid warningsMaxime Ripard2018-11-281-1/+1
| | | | | | | | | | | The simple-framebuffer nodes have a unit address, but no reg property which generates a warning when compiling it with DTC. Change the simple-framebuffer node names so that there is no warnings on this anymore. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
* ARM: dts: sunxi: Convert to CCU index macros for HDMI controllerChen-Yu Tsai2017-12-051-2/+2
| | | | | | | | | | | | When the HDMI controller device node was added, the needed PLL clock macros were not exported. A separate patch addresses that, but it is merged through a different tree. Now that both patches are in mainline proper, we can convert the raw numbers to proper macros. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* arm: dts: fix unit-address leading 0sRob Herring2017-10-201-3/+3
| | | | | | | | | | | | | Fix dtc warnings for 'simple_bus_reg' due to leading 0s. Converted using the following command: perl -p -i -e 's/\@0+([0-9a-f])/\@$1/g' `find arch/arm/boot/dts -type -f -name '*.dts*' Dropped changes to ARM, Ltd. boards LED nodes and manually fixed up some occurrences of uppercase hex. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* ARM: sun5i: a10s: Add the HDMI controller nodeMaxime Ripard2017-05-191-0/+47
| | | | | | | | | | | | The A10s has an HDMI controller connected to the second TCON channel. Add it to our DT. Since the TV Encoder was the only channel 1 user so far, also add the property now that we have several users. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> [wens@csie.org: Replaced CLK_PLL_VIDEO[01]_2X with raw numbers for now Signed-off-by: Chen-Yu Tsai <wens@csie.org>
* ARM: dts: sunxi: Remove no longer used pinctrl/sun4i-a10.h headerChen-Yu Tsai2017-03-271-1/+0
| | | | | | | | | | | | | | | | | All dts files for the sunxi platform have been switched to the generic pinconf bindings. As a result, the sunxi specific pinctrl macros are no longer used. Remove the #include entry with the following command: sed --follow-symlinks -i -e '/pinctrl\/sun4i-a10.h/D' \ arch/arm/boot/dts/sun?i*.* arch/arm/boot/dts/sun9i-a80.dtsi was then edited to remove the extra empty line. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: sun5i: a10s: Merge common controllers into the common DTSIMaxime Ripard2017-03-061-70/+0
| | | | | | | | | Some controllers found in the A10s DTSI actually apply to all of the sun5i family. Move those into the common DTSI so that all SoCs can benefit from it. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: sun5i: Add UART2 pin groupMaxime Ripard2017-03-061-1/+1
| | | | | | | | | | | There's one UART2 pin group that can be used across all sun5i SoCs. However, the A10s already has one pin group for that controller. Change the index of the one in the A10s DTSI, and add the common one to sun5i.dtsi Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: sun5i: a10s: switch simple framebuffer indicesMaxime Ripard2017-03-061-3/+3
| | | | | | | | | | | | | Of the three simple framebuffer setups we have in the A10s, two of them can be shared with the other SoCs from the sun5i family (LCD panel and composite output). However, the only one we cannot share is the HDMI, which is the first listed in the A10s DTSI. In order to make it more logical and so that we can share the framebuffer nodes in the common DTSI, reorder those nodes. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: sun5i: A10s: Switch the EMAC pins indicesMaxime Ripard2017-03-061-2/+2
| | | | | | | | | | | | One of the pins group for the EMAC can be used by all the SoCs of the sun5i family, and as such can be moved to the common DTSI. Unfortunately, this group is the second one we declare in our DT for now. Make it the first one so that it's more logical and consistent with the rest of our DTs before moving it. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* Merge tag 'clk-for-linus' of ↵Linus Torvalds2017-02-251-69/+16
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "The usual collection of new drivers, non-critical fixes, and updates to existing clk drivers. The bulk of the work is on Allwinner and Rockchip SoCs, but there's also an Intel Atom driver in here too. New Drivers: - Tegra BPMP firmware - Hisilicon hi3660 SoCs - Rockchip rk3328 SoCs - Intel Atom PMC - STM32F746 - IDT VersaClock 5P49V5923 and 5P49V5933 - Marvell mv98dx3236 SoCs - Allwinner V3s SoCs Removed Drivers: - Samsung Exynos4415 SoCs Updates: - Migrate ABx500 to OF - Qualcomm IPQ4019 CPU clks and general PLL support - Qualcomm MSM8974 RPM - Rockchip non-critical fixes and clk id additions - Samsung Exynos4412 CPUs - Socionext UniPhier NAND and eMMC support - ZTE zx296718 i2s and other audio clks - Renesas CAN and MSIOF clks for R-Car M3-W - Renesas resets for R-Car Gen2 and Gen3 and RZ/G1 - TI CDCE913, CDCE937, and CDCE949 clk generators - Marvell Armada ap806 CPU frequencies - STM32F4* I2S/SAI support - Broadcom BCM2835 DSI support - Allwinner sun5i and A80 conversion to new style clk bindings" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (130 commits) clk: renesas: mstp: ensure register writes complete clk: qcom: Do not drop device node twice clk: mvebu: adjust clock handling for the CP110 system controller clk: mvebu: Expand mv98dx3236-core-clock support clk: zte: add i2s clocks for zx296718 clk: sunxi-ng: sun9i-a80: Fix wrong pointer passed to PTR_ERR() clk: sunxi-ng: select SUNXI_CCU_MULT for sun5i clk: sunxi-ng: Check kzalloc() for errors and cleanup error path clk: tegra: Add BPMP clock driver clk: uniphier: add eMMC clock for LD11 and LD20 SoCs clk: uniphier: add NAND clock for all UniPhier SoCs ARM: dts: sun9i: Switch to new clock bindings clk: sunxi-ng: Add A80 Display Engine CCU clk: sunxi-ng: Add A80 USB CCU clk: sunxi-ng: Add A80 CCU clk: sunxi-ng: Support separately grouped PLL lock status register clk: sunxi-ng: mux: Get closest parent rate possible with CLK_SET_RATE_PARENT clk: sunxi-ng: mux: honor CLK_SET_RATE_NO_REPARENT flag clk: sunxi-ng: mux: Fix determine_rate for mux clocks with pre-dividers clk: qcom: SDHCI enablement on Nexus 5X / 6P ...
| * ARM: sun5i: Convert to CCUMaxime Ripard2017-01-231-69/+16
| | | | | | | | | | | | | | | | Now that we have drivers for all of them, convert all the SoCs that share the sun5i DTSI to the new CCU driver. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* | ARM: sunxi: Convert pinctrl nodes to generic bindingsMaxime Ripard2016-12-261-15/+15
| | | | | | | | | | | | | | | | Now that we can handle the generic pinctrl bindings, convert our DT to it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
* | ARM: sunxi: Remove useless allwinner,pull propertyMaxime Ripard2016-12-261-7/+0
| | | | | | | | | | | | | | | | | | | | | | | | The allwinner,pull property set to NO_PULL was really considered our default (and wasn't even changing the default value in the code). Remove these properties to make it obvious that we do not set anything in such a case. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
* | ARM: sunxi: Remove useless allwinner,drive propertyMaxime Ripard2016-12-261-6/+0
|/ | | | | | | | | The allwinner,drive property set to 10mA was really considered as our default. Remove all those properties entirely to make that obvious. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: sun5i: Rename A10s pinsMaxime Ripard2016-11-221-2/+2
| | | | | | | | | The SPI2 pins on the sun5i PB bank are only available on the A10s. Rename the A10s only bank so that it doesn't confuse people on the other SoCs whose indexing would start at b. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
* ARM: dts: sun5i: a10s: add spi2 pinsMichal Suchanek2016-07-041-0/+14
| | | | | | | Used on A10s Olinuxino. Signed-off-by: Michal Suchanek <hramrach@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sunxi: Add pll3 to simplefb nodes clocks listsHans de Goede2016-06-221-5/+6
| | | | | | | | | | | Now that we've a clock node describing pll3 we must add it to the simplefb nodes clocks lists to avoid it getting turned off when simplefb is used. This fixes the screen going black when using simplefb. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sun5i: Add PWM controller node for A13 / A10sHans de Goede2015-10-121-0/+8
| | | | | | | Add dts nodes for the PWM controller on the A13 / A10s. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: sun5i: dt: Move uart3 pinctrl node to common DTSIMaxime Ripard2015-10-111-7/+0
| | | | | | | | | The uart3 pins are shared between the A10s and A13, move the pinctrl node to the common DTSI to avoid duplication. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org>
* ARM: dts: sun5i: Add emac_pins_b definitionJelle van der Waa2015-09-271-0/+11
| | | | | | | | | The emac pins on an A10s can also be routed to the outside through PORTD rather then through PORTA, add a pinctrl node for this. Signed-off-by: Jelle van der Waa <jelle@vdwaa.nl> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sun5i: Add simplefb node for tvencoder outputHans de Goede2015-09-271-0/+9
| | | | | | | | Add a simplefb node for tvencoder / composite-video output, such as found on the Auxtek-T003 and the CHIP. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: sun5i: Add clock indicesMaxime Ripard2015-08-121-2/+21
| | | | | | | | The A10s and A13 gates have a non continuous set of clock IDs that are valid. Add the clock-indices property to the DT to express this. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com>
* ARM: dts: sun5i: Add A10s and A13 SRAM and SRAM controllerMaxime Ripard2015-06-011-0/+9
| | | | | | | | | | | | | The A10s and A13 have a few SRAM that can be mapped either to a device or to the CPU, with the mapping being controlled by a SRAM controller. Add the SRAM controller, the SRAM that it drives and the section that can be used by the various devices. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Tested-by: Hans de Goede <hdegoede@redhat.com>
* ARM: sunxi: DT: Fix lines over 80 charactersMaxime Ripard2015-05-101-11/+18
| | | | | | | | | A few lines in our DTSIs are over the 80 characters limit, making checkpatch complain about that. If possible (and relevant), wrap these lines to 80 characters. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: sunxi: dt: Remove the FSF addressMaxime Ripard2015-05-101-5/+0
| | | | | | | | | | The FSF address triggers a warning on checkpatch, saying that the FSF license is already present in the Linux source code, and that it has already changed in the past. Remove it from our DT, as suggested. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sun5i: Stop using different compatibles for ehci/ohci on a13 vs a10sHans de Goede2015-04-271-8/+0
| | | | | | | | | | | | | | | The A13 and the A10s use the same die (this has been confirmed by Allwinner), as such there is no need to differentiate between the ehci/ohci parts of both, the only reasons there were different allwinner,sun5i-a*-foo compatible between these 2 parts is costemetically and because we could when we still had 2 completely different dtsi files. The allwinner,sun5i-a*-foo compatible strings are not used for binding at all, the actual driver binds to the generic-?hci compatible, so we can safely remove this cosmetical difference and simplify the dtsi files. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: sun5i: a10s: Move to the common sun5i DTSIMaxime Ripard2015-04-271-534/+48
| | | | | | Now that we have a common DTSI for the sun5i family, move the A10s to use it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: sun5i: Relicense the A10s/A13 DTSI under GPLv2/X11Maxime Ripard2015-04-271-5/+41
| | | | | | | | | | | | | | | | | | The current GPL only licensing on the DTSI makes it very impractical for other software components licensed under another license. In order to make it easier for them to reuse our device trees, relicense our DTSI first under a GPL/X11 dual-license. Hopefully, the DTS will follow soon. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Chen-Yu Tsai <wens@csie.org> Acked-by: David Lanzendörfer <david.lanzendoerfer@o2s.ch> Acked-by: Emilio López <emilio@elopez.com.ar> Acked-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Oliver Schinagl <oliver@schinagl.nl> Acked-by: Roman Byshko <rbyshko@gmail.com>
* Merge tag 'clk-for-linus-3.20' of ↵Linus Torvalds2015-02-211-15/+39
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.linaro.org/people/mike.turquette/linux Pull clock framework updates from Mike Turquette: "The clock framework changes contain the usual driver additions, enhancements and fixes mostly for ARM32, ARM64, MIPS and Power-based devices. Additionally the framework core underwent a bit of surgery with two major changes: - The boundary between the clock core and clock providers (e.g clock drivers) is now more well defined with dedicated provider helper functions. struct clk no longer maps 1:1 with the hardware clock but is a true per-user cookie which helps us tracker users of hardware clocks and debug bad behavior. - The addition of rate constraints for clocks. Rate ranges are now supported which are analogous to the voltage ranges in the regulator framework. Unfortunately these changes to the core created some breakeage. We think we fixed it all up but for this reason there are lots of last minute commits trying to undo the damage" * tag 'clk-for-linus-3.20' of git://git.linaro.org/people/mike.turquette/linux: (113 commits) clk: Only recalculate the rate if needed Revert "clk: mxs: Fix invalid 32-bit access to frac registers" clk: qoriq: Add support for the platform PLL powerpc/corenet: Enable CLK_QORIQ clk: Replace explicit clk assignment with __clk_hw_set_clk clk: Add __clk_hw_set_clk helper function clk: Don't dereference parent clock if is NULL MIPS: Alchemy: Remove bogus args from alchemy_clk_fgcs_detr clkdev: Always allocate a struct clk and call __clk_get() w/ CCF clk: shmobile: div6: Avoid division by zero in .round_rate() clk: mxs: Fix invalid 32-bit access to frac registers clk: omap: compile legacy omap3 clocks conditionally clkdev: Export clk_register_clkdev clk: Add rate constraints to clocks clk: remove clk-private.h pci: xgene: do not use clk-private.h arm: omap2+ remove dead clock code clk: Make clk API return per-user struct clk instances clk: tegra: Define PLLD_DSI and remove dsia(b)_mux clk: tegra: Add support for the Tegra132 CAR IP block ...
| * Merge branch 'clk-next' into v3.19-rc7Michael Turquette2015-02-021-15/+39
| |\
| | * ARM: sunxi: dt: Add sample and output mmc clocksMaxime Ripard2015-01-141-15/+39
| | | | | | | | | | | | | | | | | | | | | | | | Add the sample and output clocks for the MMC phase support. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Chen-Yu Tsai <wens@csie.org>
* | | Merge tag 'dt-for-linus' of ↵Linus Torvalds2015-02-171-23/+45
|\ \ \ | |/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC DT updates from Olof Johansson: "DT changes continue to be the bulk of our merge window contents. We continue to have a large set of changes across the board as new platforms and drivers are added. Some of the new platforms are: - Alphascale ASM9260 - Marvell Armada 388 - CSR Atlas7 - TI Davinci DM816x - Hisilicon HiP01 - ST STiH418 There have also been some sweeping changes, including relicensing of DTS contents from GPL to GPLv2+/X11 so that the same files can be reused in other non-GPL projects more easily. There's also been changes to the DT Makefile to make it a little less conflict-ridden and churny down the road" * tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (330 commits) ARM: dts: Add PPMU node for exynos4412-trats2 ARM: dts: Add PPMU node for exynos3250-monk and exynos3250-rinato ARM: dts: Add PPMU dt node for exynos4 and exynos4210 ARM: dts: Add PPMU dt node for exynos3250 ARM: dts: add mipi dsi device node for exynos4415 ARM: dts: add fimd device node for exynos4415 ARM: dts: Add syscon phandle to the video-phy node for Exynos4 ARM: dts: Add sound nodes for exynos4412-trats2 ARM: dts: Fix CLK_MOUT_CAMn parent clocks assignment for exynos4412-trats2 ARM: dts: Fix CLK_UART_ISP_SCLK clock assignment in exynos4x12.dtsi ARM: dts: Add max77693 charger node for exynos4412-trats2 ARM: dts: Switch max77686 regulators to GPIO control for exynos4412-trats2 ARM: dts: Add suspend configuration for max77686 regulators for exynos4412-trats2 ARM: dts: Add Maxim 77693 fuel gauge node for exynos4412-trats2 ARM: dts: am57xx-beagle-x15: Fix USB2 mode ARM: dts: am57xx-beagle-x15: Add extcon nodes for USB ARM: dts: dra72-evm: Add extcon nodes for USB ARM: dts: dra7-evm: Add extcon nodes for USB ARM: dts: rockchip: move the hdmi ddc-i2c-bus property to the actual boards ARM: dts: rockchip: enable vops and hdmi output on rk3288-firefly and -evb ...
| * | ARM: dts: sunxi: Add missing mdio labelAleksei Mamlin2015-01-211-1/+1
| | | | | | | | | | | | | | | | | | | | | This patch add missing mdio label for sun[457]i. Signed-off-by: Aleksei Mamlin <mamlinav@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| * | ARM: dts: sunxi: Add simplefb nodes for de_be0-lcd0, de_be0-lcd0-tve0 pipelinesHans de Goede2015-01-211-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add simplefb nodes for "[de_fe0-]de_be0-lcd0" and "[de_fe0-]de_be0-lcd0-tve0" display pipelines for when u-boot has set up a pipeline to drive a LCD panel / VGA output rather then the HDMI output. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| * | ARM: dts: sunxi: Enable thermal sensor support for RTP on sun[457]iChen-Yu Tsai2015-01-211-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that the resistive touchpanel driver supports thermal sensors, add the "#thermal-sensor-cells" property as required by the thermal framework. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Eduardo Valentin <edubezval@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| * | ARM: sunxi: DT: Convert the DTs to use a header for the pinctrl nodesMaxime Ripard2015-01-211-18/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pinctrl nodes require some extra opaque arguments for the pull up and drive strength values. Introduce a new header file and convert the device trees to replace these opaque numbers by defines. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| * | ARM: sunxi: DT: Convert the DTs to use a header for the DMA argumentsMaxime Ripard2015-01-211-3/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | The DMA engine for the A10/A20 and derivatives require an opaque extra argument. Add a dt-bindings header, and convert the device trees to it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| * | ARM: sunxi: DT: Convert to device tree includesMaxime Ripard2015-01-211-1/+1
| | | | | | | | | | | | | | | | | | Prepare the device trees to use the C preprocessor. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| * | ARM: dts: sun5i: Add lradc nodeHans de Goede2015-01-211-0/+7
| | | | | | | | | | | | | | | Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* | | ARM: sunxi: dt: Fix aliasesMaxime Ripard2015-01-251-4/+0
|/ / | | | | | | | | | | | | | | | | | | Commit f77d55a3b56a ("serial: 8250_dw: get index of serial line from DT aliases") made the serial driver now use the serial aliases to get the tty number, pointing out that our aliases have been wrong all along. Remove them from the DTSI and add custom ones in the relevant boards. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* / ARM: dts: sunxi: Fix usb-phy support for sun4i/sun5iChen-Yu Tsai2014-12-211-2/+2
|/ | | | | | | | | | usbphy0 support in the sunxi usb-phy driver has been merged, but the dtsi's for sun4i/sun5i haven't been updated. This results in the phy driver failing to load, breaking usb support. Fixes: 6827a46f5994 ('phy: sun4i: add support for USB phy0') Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* Merge tag 'clk-for-linus-3.19' of ↵Linus Torvalds2014-12-211-10/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.linaro.org/people/mike.turquette/linux Pull clk framework updates from Mike Turquette: "This is much later than usual due to several last minute bugs that had to be addressed. As usual the majority of changes are new drivers and modifications to existing drivers. The core recieved many fixes along with the groundwork for several large changes coming in the future which will better parition clock providers from clock consumers" * tag 'clk-for-linus-3.19' of git://git.linaro.org/people/mike.turquette/linux: (86 commits) clk: samsung: Fix Exynos 5420 pinctrl setup and clock disable failure due to domain being gated ARM: OMAP3: clock: fix boot breakage in legacy mode ARM: OMAP2+: clock: fix DPLL code to use new determine rate APIs clk: Really fix deadlock with mmap_sem clk: mmp: fix sparse non static symbol warning clk: Change clk_ops->determine_rate to return a clk_hw as the best parent clk: change clk_debugfs_add_file to take a struct clk_hw clk: Don't expose __clk_get_accuracy clk: Don't try to use a struct clk* after it could have been freed clk: Remove unused function __clk_get_prepare_count clk: samsung: Fix double add of syscore ops after driver rebind clk: samsung: exynos4: set parent of sclk_hdmiphy to hdmi clk: samsung: exynos4415: Fix build with PM_SLEEP disabled clk: samsung: remove unnecessary inclusion of header files from clk.h clk: samsung: remove unnecessary CONFIG_OF from clk.c clk: samsung: Spelling s/bwtween/between/ clk: rockchip: Add support for the mmc clock phases using the framework clk: rockchip: add bindings for the mmc clocks clk: rockchip: rk3288 export i2s0_clkout for use in DT clk: rockchip: use clock ID for DMC (memory controller) on rk3288 ...
| * ARM: dts: sunxi: unify APB1 clockEmilio López2014-11-231-10/+2
| | | | | | | | | | | | | | | | | | | | With the new factors infrastructure in place, we can unify apb1 and apb1_mux as a single clock now. Signed-off-by: Emilio López <emilio@elopez.com.ar> [wens@csie.org: Change apb1 node label to "apb1"; reword commit title] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-04 20:15:53 +0100