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* Merge tag 'dt-for-linus' of ↵Linus Torvalds2015-02-171-32/+160
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC DT updates from Olof Johansson: "DT changes continue to be the bulk of our merge window contents. We continue to have a large set of changes across the board as new platforms and drivers are added. Some of the new platforms are: - Alphascale ASM9260 - Marvell Armada 388 - CSR Atlas7 - TI Davinci DM816x - Hisilicon HiP01 - ST STiH418 There have also been some sweeping changes, including relicensing of DTS contents from GPL to GPLv2+/X11 so that the same files can be reused in other non-GPL projects more easily. There's also been changes to the DT Makefile to make it a little less conflict-ridden and churny down the road" * tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (330 commits) ARM: dts: Add PPMU node for exynos4412-trats2 ARM: dts: Add PPMU node for exynos3250-monk and exynos3250-rinato ARM: dts: Add PPMU dt node for exynos4 and exynos4210 ARM: dts: Add PPMU dt node for exynos3250 ARM: dts: add mipi dsi device node for exynos4415 ARM: dts: add fimd device node for exynos4415 ARM: dts: Add syscon phandle to the video-phy node for Exynos4 ARM: dts: Add sound nodes for exynos4412-trats2 ARM: dts: Fix CLK_MOUT_CAMn parent clocks assignment for exynos4412-trats2 ARM: dts: Fix CLK_UART_ISP_SCLK clock assignment in exynos4x12.dtsi ARM: dts: Add max77693 charger node for exynos4412-trats2 ARM: dts: Switch max77686 regulators to GPIO control for exynos4412-trats2 ARM: dts: Add suspend configuration for max77686 regulators for exynos4412-trats2 ARM: dts: Add Maxim 77693 fuel gauge node for exynos4412-trats2 ARM: dts: am57xx-beagle-x15: Fix USB2 mode ARM: dts: am57xx-beagle-x15: Add extcon nodes for USB ARM: dts: dra72-evm: Add extcon nodes for USB ARM: dts: dra7-evm: Add extcon nodes for USB ARM: dts: rockchip: move the hdmi ddc-i2c-bus property to the actual boards ARM: dts: rockchip: enable vops and hdmi output on rk3288-firefly and -evb ...
| * ARM: dts: sun9i: Add 8 bit mmc pinmux setting for mmc2Chen-Yu Tsai2015-01-211-0/+9
| | | | | | | | | | | | | | | | mmc2 is available on port C. Add a pinmux setting for 8 bit wide eMMC. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| * ARM: dts: sun9i: Add mmc controller nodes to the A80 dtsiChen-Yu Tsai2015-01-211-0/+48
| | | | | | | | | | | | | | | | The A80 has 4 mmc controllers. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| * ARM: dts: sun9i: Add mmc config clock nodesChen-Yu Tsai2015-01-211-0/+13
| | | | | | | | | | | | | | Add the device tree nodes for the mmc config clock nodes. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| * ARM: dts: sun9i: Add pinmux setting for mmc0Chen-Yu Tsai2015-01-211-0/+8
| | | | | | | | | | | | | | | | | | mmc0 is only available on port F, and is always used with a 4 bit wide bus for the onboard micro-sd slot. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| * ARM: dts: sun9i: Add clock-indices property for bus gate clocksChen-Yu Tsai2015-01-211-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | of_clk_get_parent_name() uses the clock-indices property to resolve clock phandle arguments in case that the argument index does not match the clock-output-names sequence. This is the case on sunxi, where we use the actual bit index as the argument to the phandle. Add the clock-indices property so that of_clk_get_parent_name() resolves the names correctly. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| * ARM: dts: sun9i: Add mmc module clock nodes for A80Chen-Yu Tsai2015-01-211-0/+36
| | | | | | | | | | | | | | | | The mmc module clocks are A80 specific module 0 (storage) type clocks. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| * ARM: sunxi: DT: Convert the DTs to use the GIC headersMaxime Ripard2015-01-211-25/+27
| | | | | | | | | | | | | | | | The GIC requires some extra opaque arguments to set the IRQ type and flags. Convert the DTs to using the common defines. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| * ARM: sunxi: DT: Convert the DTs to use a header for the pinctrl nodesMaxime Ripard2015-01-211-6/+8
| | | | | | | | | | | | | | | | | | | | The pinctrl nodes require some extra opaque arguments for the pull up and drive strength values. Introduce a new header file and convert the device trees to replace these opaque numbers by defines. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| * ARM: sunxi: DT: Convert to device tree includesMaxime Ripard2015-01-211-1/+1
| | | | | | | | | | | | Prepare the device trees to use the C preprocessor. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* | ARM: sunxi: dt: Fix aliasesMaxime Ripard2015-01-251-10/+0
|/ | | | | | | | | | Commit f77d55a3b56a ("serial: 8250_dw: get index of serial line from DT aliases") made the serial driver now use the serial aliases to get the tty number, pointing out that our aliases have been wrong all along. Remove them from the DTSI and add custom ones in the relevant boards. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sun9i: Add uart4 pinmux setting for A80 SoCChen-Yu Tsai2014-10-311-0/+7
| | | | | | | uart4 only has one possible pinmux setting on the A80 SoC. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sun9i: Add i2c3 pinmux setting for A80 SoCChen-Yu Tsai2014-10-311-0/+7
| | | | | | | i2c3 has only one possible pinmux setting on the A80 SoC. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sun9i: Add i2c controller nodes to a80 dtsiChen-Yu Tsai2014-10-311-0/+55
| | | | | | | The A80 has 5 i2c controllers in the main processor block. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: sun9i: optimus: Set UART0 muxingMaxime Ripard2014-10-301-0/+7
| | | | | | | Enable the UART0 muxing, as set up by the bootloader. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: sun9i: Enable the A80 pinctrl driverMaxime Ripard2014-10-301-0/+16
| | | | | | | | | | The A80 pinctrl driver is just as usual our pinctrl/gpio/external interrupt controller. Nothing really out of the extraordinary here... Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: sunxi: Fix GPLv2 wordingMaxime Ripard2014-10-271-3/+3
| | | | | | | | | During the GPL to GPL/X11 licensing migration, the GPL notice introduced mentionned the device trees as a library, which is not really accurate. It began to spread by copy and paste. Fix all these library mentions to reflect the file that it's actually just a file. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sun9i: Add basic clocks and reset controlsChen-Yu Tsai2014-10-211-6/+171
| | | | | | | | Now that we have driver support for the basic clocks, add them to the dtsi and update existing peripherals. Also add reset controls to match. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sunxi: Add Allwinner A80 dtsiChen-Yu Tsai2014-10-201-0/+257
The Allwinner A80 is a new multi-purpose SoC with 4 Cortex-A7 and 4 Cortex-A15 cores in a big.LITTLE architecture, and a 64-core PowerVR G6230 GPU. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Tested-by: Andreas Färber <afaerber@suse.de>
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