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* ARM: dts: Move .dts files to vendor sub-directoriesRob Herring2023-06-211-539/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The arm dts directory has grown to 1559 boards which makes it a bit unwieldy to maintain and use. Past attempts stalled out due to plans to move .dts files out of the kernel tree. Doing that is no longer planned (any time soon at least), so let's go ahead and group .dts files by vendors. This move aligns arm with arm64 .dts file structure. There's no change to dtbs_install as the flat structure is maintained on install. The naming of vendor directories is roughly in this order of preference: - Matching original and current SoC vendor prefix/name (e.g. ti, qcom) - Current vendor prefix/name if still actively sold (SoCs which have been aquired) (e.g. nxp/imx) - Existing platform name for older platforms not sold/maintained by any company (e.g. gemini, nspire) The whole move was scripted with the exception of MAINTAINERS and a few makefile fixups. Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Michal Simek <michal.simek@amd.com> #Xilinx Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Neil Armstrong <neil.armstrong@linaro.org> Acked-by: Paul Barker <paul.barker@sancloud.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Wei Xu <xuwei5@hisilicon.com> #hisilicon Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Nick Hawkins <nick.hawkins@hpe.com> Acked-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Acked-by: Peter Rosin <peda@axentia.se> Acked-by: Jesper Nilsson <jesper.nilsson@axis.com> Acked-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> #broadcom Acked-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Jisheng Zhang <jszhang@kernel.org> Acked-by: Patrice Chotard <patrice.chotard@foss.st.com> Acked-by: Romain Perier <romain.perier@gmail.com> Acked-by: Alexandre TORGUE <alexandre.torgue@st.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Acked-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com> Signed-off-by: Rob Herring <robh@kernel.org>
* ARM: zynq: dts: Setting default i2c clock frequency to 400kHzVaralaxmi Bingi2023-05-121-0/+2
| | | | | | | | | | Setting default i2c clock frequency for Zynq to maximum rate of 400kHz. Current default value is 100kHz. Signed-off-by: Varalaxmi Bingi <varalaxmi.bingi@amd.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/4dde5d1eb8e4572dae4295a19a4c83002a58e5da.1683035611.git.michal.simek@amd.com
* ARM: zynq: Use recommended dma-controller name instead of dmacMichal Simek2023-01-191-1/+1
| | | | | | | | | | Use standard name for dma controller. Issue is reported by dtbs_check as dmac@f8003000: $nodename:0: 'dmac@f8003000' does not match '^dma-controller(@.*)?$' Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/5637d7e3464fbc1b2b269a7df35e24edc2c8d4ac.1672908080.git.michal.simek@amd.com
* ARM: dts: zynq: Add xlnx prefix to GEM compatible stringHarini Katakam2023-01-191-2/+2
| | | | | | | | | | cdns,zynq/zynqmp/versal-gem was recently deprecated in Linux in favour of xlnx prefix. Add this new compatible string and remove the existing cdns,zynq-gem compatible string. Signed-off-by: Harini Katakam <harini.katakam@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/7768d5d68fe38dd8e9300e9c6e09c228e79b2862.1672909533.git.michal.simek@amd.com
* ARM: zynq: Comment interrupt names IRQs for pl330Michal Simek2023-01-191-2/+4
| | | | | | | | pl330 DT yaml description doesn't define interrupt-names property that's why comment it but keep it as comment. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/8e5a921c16efe09030fda036340186c11dd990bf.1672908030.git.michal.simek@amd.com
* ARM: dts: zynq: add QSPI controller nodeSteffen Trumtrar2023-01-051-0/+12
| | | | | | | | | The driver and binding for the Zynq QSPI is already present in the kernel. The node is not added to the zynq-7000.dtsi, however. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Link: https://lore.kernel.org/r/20220811092036.3689983-1-s.trumtrar@pengutronix.de Signed-off-by: Michal Simek <michal.simek@amd.com>
* ARM: dts: zynq-7000: drop useless 'dma-channels/requests' propertiesKrzysztof Kozlowski2022-05-041-2/+0
| | | | | | | | | | | | | | | The pl330 DMA controller provides number of DMA channels and requests through its registers, so duplicating this information (with a chance of mistakes) in DTS is pointless. Additionally the DTS used always wrong property names which causes DT schema check failures - the bindings documented 'dma-channels' and 'dma-requests' properties without leading hash sign. Reported-by: Rob Herring <robh@kernel.org> Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/20220430121902.59895-2-krzysztof.kozlowski@linaro.org
* ARM: dts: zynq: add NAND flash controller nodeMichael Walle2021-08-061-0/+21
| | | | | | | | | | Recently, a driver for the ARM Primecell PL35x static memory controller (including NAND controller) was added in linux. Add the corresponding device tree node. Signed-off-by: Michael Walle <michael@walle.cc> Link: https://lore.kernel.org/r/20210616155437.27378-3-michael@walle.cc Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM: zynq: Rename bus to be align with simple-bus yamlMichal Simek2020-12-091-1/+1
| | | | | | | | | | | | | | | | | Rename amba to AXI. Based on Xilinx Zynq TRM (Chapter 5) chip is "AXI point-to-point channels for communicating addresses, data, and response transactions between master and slave clients. This ARM AMBA 3.0..." Issues are reported as: .. amba: $nodename:0: 'amba' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$' >From schema: ../github.com/devicetree-org/dt-schema/dtschema/schemas/simple-bus.yaml Similar change has been done for Xilinx ZynqMP SoC. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/8a4bc80debfbb79c296e76fc1e4c173e62657286.1606397101.git.michal.simek@xilinx.com
* ARM: dts: zynq: enablement of coresight topologyZumeng Chen2019-12-181-0/+135
| | | | | | | | | | This patch is to build the coresight topology structure of zynq-7000 series according to the docs of coresight and userguide of zynq-7000. Signed-off-by: Zumeng Chen <zumeng.chen@windriver.com> Signed-off-by: Quanyang Wang <quanyang.wang@windriver.com> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM: dts: Use mmc@ instead sdhci@Michal Simek2018-11-051-2/+2
| | | | | | mmc name is recommended based on devicetree specification. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: dts: zynq: Use SPDX-License-IdentifierMichal Simek2018-03-081-10/+2
| | | | | | Follow trend and use the SPDX License description. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Label whole PL part as fpga_full regionMichal Simek2017-08-211-0/+8
| | | | | | This will simplify dt overlay structure for the whole PL. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM: zynq: Fix pmu register description coding styleMichal Simek2016-11-161-1/+2
| | | | | | | | | | Drop the space before/after '<' and '>'; and separate the entries to be a bit more readable. Reported-by: Julia Cartwright <julia@ni.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Series-to: arm-soc Series-cc: julia@ni.com
* ARM: zynq: Fix W=1 dtc 1.4 warningsMichal Simek2016-11-161-2/+2
| | | | | | | | | | | | | | The patch removes these warnings reported by dtc 1.4: Warning (unit_address_vs_reg): Node /pmu has a reg or ranges property, but no unit name Warning (unit_address_vs_reg): Node /fixedregulator@0 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Julia Cartwright <julia@ni.com> Series-to: arm-soc
* ARM: zynq: Remove skeleton.dtsiMichal Simek2016-11-161-1/+2
| | | | | | | | | | | Based on "ARM: dts: explicitly mark skeleton.dtsi as deprecated" (sha1: 9c0da3cc61f1233c2782e2d3d91e3d0707dd4ba5) skeleton.dtsi is deprecated. Move address and size-cells directly to zynq-7000.dtsi. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Julia Cartwright <julia@ni.com>
* ARM: dt: zynq: Add labels to cpu nodes to allow overriding OPPs.Moritz Fischer2015-12-141-2/+2
| | | | | | | | | | By adding labels to the cpu nodes in the dtsi, a dts that includes it can change the OPPs by referencing the cpu0 through the label. Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Reviewed-by: Sören Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM: dts: zynq: describe SLCR as simple-mfd rather than simple-busMasahiro Yamada2015-12-141-1/+1
| | | | | | | | | | The SLCR (System-Level Control Registers) block is an MFD (Multi Function Device) rather than a bus. "simple-mfd" seems a more suitable compatible string than "simple-bus". Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM: zynq: DT: Add interrupt-controller property to GPIOSoren Brinkmann2015-12-141-0/+2
| | | | | | | | | | GPIO can be used as interrupt-controller. Add the missing properties to the GPIO node. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Reviewed-by: Moritz Fischer <moritz.fischer@ettus.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM: zynq: dt: Updated devicetree for Zynq 7000 platform.Moritz Fischer2015-10-181-0/+5
| | | | | | | | | Added addtional nodes required for FPGA Manager operation of the Xilinx Zynq Devc configuration interface. Reviewed-by: Sören Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* ARM: dts: zynq: Add devicetree entry for Xilinx Zynq reset controller.Moritz Fischer2015-08-211-0/+7
| | | | | | Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* ARM: zynq: DT: Add missing interrupt for L2 pl310Alex Wilson2015-07-311-0/+1
| | | | | | | Add pl310 interrupt to the Zynq devicetree. Signed-off-by: Alex Wilson <alex.david.wilson@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM: dts: zynq: Add OCM nodeMichal Simek2015-07-311-1/+1
| | | | | | | | Add OCM node for all zynq boards. OCM location can changed but for all current boards this is the location where OCM is.` Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM: zynq: DT: Use the zynq binding with macbNathan Sullivan2015-05-281-2/+2
| | | | | | | | | | Use the new zynq binding for macb ethernet, since it will disable half duplex gigabit like the Zynq TRM says to do. Also allow the compatible cadence gem binding that won't disable half duplex but works otherwise. Signed-off-by: Nathan Sullivan <nathan.sullivan@ni.com> Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM: zynq: DT: Fix binding for cadence WDTMichal Simek2015-01-281-3/+1
| | | | | | | | | | | | | | Based on: "devicetree: Add Cadence WDT devicetree bindings documentation" (sha1: 191891c0378f44aec8e06e889a08d0b76fe6c5cb) - compatible string is cdns,wdt-r1p2 - remove device_type property - remove int reset property (reset-on-timeout is bool) Signed-off-by: Michal Simek <michal.simek@xilinx.com> Series-to: arm-soc Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM: zynq: DT: Add pinctrl informationSoren Brinkmann2015-01-121-1/+7
| | | | | | | | | Add pinctrl descriptions to the zc702 and zc706 device trees. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Tested-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM: zynq: DT: Add USB to device treeSoren Brinkmann2015-01-081-0/+20
| | | | | | | Add USB nodes to zc702, zc706 and zed device trees. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* Merge tag 'zynq-dt-for-3.19' of https://github.com/Xilinx/linux-xlnx into ↵Arnd Bergmann2014-12-041-1/+0
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | next/dt Pull "arm: Xilinx Zynq dt patches for v3.19" from Michal Simek: - Declare Digilent and vendor - Add Zybo board support - Fix VDMA documentation to be align with the driver * tag 'zynq-dt-for-3.19' of https://github.com/Xilinx/linux-xlnx: arm: dts: zynq: Add Digilent ZYBO board arm: dts: zynq: Move crystal freq. to board level doc: dt: vendor-prefixes: Add Digilent Inc Documentation: devicetree: Fix Xilinx VDMA specification Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * arm: dts: zynq: Move crystal freq. to board levelPeter Crosthwaite2014-12-011-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The fact that all supported boards use the same 33MHz crystal is a co-incidence. The Zynq PS support a range of crystal freqs so the hardcoded setting should be removed from the dtsi. Re-implement it on the board level. This prepares support for Zynq boards with different crystal frequencies (e.g. the Digilent ZYBO). Acked-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | ARM: zynq: DT: trivial: Fix mc nodeMichal Simek2014-10-201-1/+1
| | | | | | | | | | | | sed -i 's/}\ ;/};/g' Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | ARM: zynq: DT: Add cadence watchdog nodeMichal Simek2014-10-201-0/+11
| | | | | | | | | | | | Add the cadence watchdog node to the Zynq devicetree. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | ARM: zynq: DT: Add missing reference for memory-controllerMichal Simek2014-10-201-1/+1
| | | | | | | | | | | | Add missing reference for memory-controller. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | ARM: zynq: DT: Add missing reference for ADCMichal Simek2014-10-201-1/+1
| | | | | | | | | | | | Add missing reference for ADC node. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | ARM: zynq: DT: Add missing address for L2 pl310Michal Simek2014-10-201-1/+1
| | | | | | | | | | | | | | By in sync with others node and add also baseaddr to the node name. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | ARM: zynq: DT: Remove 222 MHz OPPSoren Brinkmann2014-10-201-1/+0
| | | | | | | | | | | | | | | | | | | | Due to dependencies between timer and CPU frequency, only changes by powers of two are allowed. The clocksource driver prevents other changes, but with cpufreq and its governors it can result in being spammed with error messages constantly. Hence, remove the 222 MHz OPP. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | ARM: zynq: DT: Fix GEM register area sizeSoren Brinkmann2014-10-201-2/+2
|/ | | | | | | The size of the GEM's register area is only 0x1000 bytes. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* Merge tag 'dt-for-linus' of ↵Linus Torvalds2014-10-081-4/+10
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC DT updates from Arnd Bergmann: "As usual, this is the largest branch, though this time a little under half of the total changes with 307 individual non-merge changesets. The largest changes are the addition of new machines, in particular the Tegra based Chromebook, the Renesas r8a7794 SoC, and DT support for the old i.MX1 platform. Other changes include - at91: various sam9 and sama5 updates - exynos: much extended Peach Pi/Pit (Chromebook 2) support - keystone: new peripherals - meson: added DT for meson6 SoC - mvebu: new device support for Armada 370/375 - qcom: improved support for IPQ8064 and MSM8x60 - rockchip: much improved support for rk3288 - shmobile: lots of updates all over the place - sunxi: dts license change - sunxi: more a23 device support - vexpress: CLCD DT description" * tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (308 commits) ARM: DTS: meson: update DTSI to add watchdog node ARM: dts: keystone-k2l: fix mdio io start address ARM: dts: keystone-k2e: fix mdio io start address ARM: dts: keystone-k2e: update usb1 node for dma properties ARM: dts: keystone: fix io range for usb_phy0 Revert "Merge tag 'hix5hd2-dt-for-3.18' of git://github.com/hisilicon/linux-hisi into next/dt" Revert "ARM: dts: hix5hd2: add wdg node" ARM: dts: add rk3288 i2s controller ARM: vexpress: Add CLCD Device Tree properties ARM: bcm2835: add I2S pinctrl to device tree ARM: meson: documentation: add bindings documentation ARM: meson: dts: add basic Meson/Meson6/Meson6-atv1200 DTSI/DTS ARM: dts: mt6589: Change compatible string for GIC ARM: dts: mediatek: Add compatible property for aquaris5 ARM: dts: mt6589-aquaris5: Add boot argument earlyprintk ARM: dts: mt6589: Fix typo in GIC unit address ARM: dts: Build dtb for Mediatek board ARM: dts: keystone: fix bindings for pcie and usb clock nodes ARM: dts: keystone: k2l: Fix chip selects for SPI devices ARM: dts: keystone: add dsp gpio controllers nodes ...
| * ARM: zynq: DT: Fix coding style issues in dtsiMichal Simek2014-09-011-4/+4
| | | | | | | | | | | | | | Remove space before semicolon. sed -i 's/}\ ;/};/g' arch/arm/boot/dts/zynq-* Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: DT: Describe interrupt-names for pl330Michal Simek2014-09-011-0/+2
| | | | | | | | Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: DT: Move size/address properties to dtsiSoren Brinkmann2014-09-011-0/+4
| | | | | | | | | | | | | | | | | | | | Move the GEM's size and address cells properties to the common dtsi file. Cc: Andreas Färber <afaerber@suse.de> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | ARM: zynq: DT: Add DDRC nodeSoren Brinkmann2014-09-161-0/+5
|/ | | | | | | | Add the DDR controller to the Zynq devicetree. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM: zynq: DT: Add CAN nodeMichal Simek2014-07-291-1/+25
| | | | | | | Add node describing Zynq's CAN controller. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
* ARM: dts: zynq: Add SPIAndreas Färber2014-07-281-0/+24
| | | | | | Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM: dts: zynq: Add DMAC for ParallellaAndreas Färber2014-07-251-0/+16
| | | | | | Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM: zynq: DT: Add GPIO nodeSoren Brinkmann2014-07-231-0/+10
| | | | | | | Add node describing Zynq's GPIO controller. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM: zynq: DT: Add XADC nodeSoren Brinkmann2014-07-231-0/+8
| | | | | | | | Add node for the Xilinx A/D Converter. Cc: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM: zynq: DT: Migrate UART to Cadence bindingSoren Brinkmann2014-07-181-4/+4
| | | | | | | | | | | The Zynq UART is Cadence IP and the driver has been renamed accordingly. Migrate the DT to use the new binding for the UART driver. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Acked-by: Rob Herring <robh@kernel.org> Tested-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* Merge tag 'dt-for-3.16' of ↵Linus Torvalds2014-06-031-15/+25
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc into next Pull ARM SoC devicetree updates from Olof Johansson: "As with previous release, this continues to be among the largest branches we merge, with lots of new contents. New things for this release are among other things: - DTSI contents for the new SoCs supported in 3.16 (see SoC pull request) - Qualcomm APQ8064 and APQ8084 SoCs and eval boards - Nvidia Jetson TK1 development board (Tegra T124-based) Two new SoCs that didn't need enough new platform code to stand out enough for me to notice when writing the SoC tag, but that adds new DT contents are: - TI DRA72 - Marvell Berlin 2Q" * tag 'dt-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (500 commits) ARM: dts: add secure firmware support for exynos5420-arndale-octa ARM: dts: add pmu sysreg node to exynos3250 ARM: dts: correct the usb phy node in exynos5800-peach-pi ARM: dts: correct the usb phy node in exynos5420-peach-pit ARM: dts: add dts files for exynos5410 and exynos5410-smdk5410 ARM: dts: add dts files for exynos3250 SoC ARM: dts: add mfc node for exynos5800 ARM: dts: add Vbus regulator for USB 3.0 on exynos5800-peach-pi ARM: dts: enable fimd for exynos5800-peach-pi ARM: dts: enable display controller for exynos5800-peach-pi ARM: dts: enable hdmi for exynos5800-peach-pi ARM: dts: add dts file for exynos5800-peach-pi board ARM: dts: add dts file for exynos5800 SoC ARM: dts: add dts file for exynos5260-xyref5260 board ARM: dts: add dts files for exynos5260 SoC ARM: dts: update watchdog node name in exynos5440 ARM: dts: use key code macros on Origen and Arndale boards ARM: dts: enable RTC and WDT nodes on Origen boards ARM: dts: qcom: Add APQ8084-MTP board support ARM: dts: qcom: Add APQ8084 SoC support ...
| * ARM: zynq: dt: Add a fixed regulator for CPU voltageSoren Brinkmann2014-05-161-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | To silence the warning cpufreq_cpu0: failed to get cpu0 regulator: -19 from the cpufreq driver regarding a missing regulator, add a fixed regulator to the DT. Zynq does not support voltage scaling and the CPU rail should always be supplied with 1 V, hence it is added in the SOC-level dtsi. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: dt: Clean up device treeSoren Brinkmann2014-05-061-14/+15
| | | | | | | | | | | | | | | | - Use generic node names - Fix up some weird formatting and white spaces - Update copyright info Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-28 10:44:30 +0100