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* Merge tag 'imx-fixes-4.18-4' of ↵Olof Johansson2018-07-201-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes i.MX fixes for 4.18, round 4: - A fix for i.MX6 RDU2 board on the wrong IRQ type of Marvell switch, which might result in a race condition in the interrupt handler and cause the OS to miss all future events. * tag 'imx-fixes-4.18-4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: dts: imx6: RDU2: fix irq type for mv88e6xxx switch Signed-off-by: Olof Johansson <olof@lixom.net>
| * ARM: dts: imx6: RDU2: fix irq type for mv88e6xxx switchUwe Kleine-König2018-07-201-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Marvell switches report their interrupts in a level sensitive way. When using edge sensitive detection a race condition in the interrupt handler of the swich might result in the OS to miss all future events which might make the switch non-functional. The problem is that both mv88e6xxx_g2_irq_thread_fn() and mv88e6xxx_g1_irq_thread_work() sample the irq cause register (MV88E6XXX_G2_INT_SRC and MV88E6XXX_G1_STS respectively) once and then handle the observed sources. If after sampling but before all observed irq sources are handled a new irq source gets active this is not noticed by the handler which returns unsuspecting, but the interrupt line stays active which prevents the edge detector to kick in. All device trees but imx6qdl-zii-rdu2 get this right (most of them by not specifying an interrupt parent). So fix imx6qdl-zii-rdu2 accordingly. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Fixes: f64992d1a916 ("ARM: dts: imx6: RDU2: Add Switch interrupts") Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* | Merge tag 'omap-for-v4.18/fixes-rc5-signed' of ↵Olof Johansson2018-07-201-6/+3
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes One omap dts mismerge fix The dts patch for droid4 PWM vibrator has added gpio6 entries to the wrong node. Let's fix it with a note that there seems to be also other GPIO PWM issues to fix still to get the PWM vibrator working. So this can wait for v4.19 merge cycle if necessary. * tag 'omap-for-v4.18/fixes-rc5-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: omap4-droid4: fix dts w.r.t. pwm Signed-off-by: Olof Johansson <olof@lixom.net>
| * | ARM: dts: omap4-droid4: fix dts w.r.t. pwmPavel Machek2018-07-171-6/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pwm node should not be under gpio6 node in the device tree. This fixes detection of the pwm on Droid 4. Fixes: 6d7bdd328da4 ("ARM: dts: omap4-droid4: update touchscreen") Signed-off-by: Pavel Machek <pavel@ucw.cz> Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk> [tony@atomide.com: added fixes tag] Signed-off-by: Tony Lindgren <tony@atomide.com>
* | | Merge tag 'omap-for-v4.18/fixes-rc4-signed' of ↵Olof Johansson2018-07-151-0/+5
|\| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes Two omap fixes for v4.18-rc cycle Turns out the recent patches for ARM branch predictor hardening are not working on omap5 and dra7 as planned because the secondary CPU is parked to the bootrom code. We can't configure it in the bootloader. So we must enable invalidates of BTB for omap5 and dra7 secondary core in the kernel. And there's a fix for reserved register access for am3517. The usb otg module on am3517 is not the same as for other omap3. * tag 'omap-for-v4.18/fixes-rc4-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: am3517.dtsi: Disable reference to OMAP3 OTG controller ARM: DRA7/OMAP5: Enable ACTLR[0] (Enable invalidates of BTB) for secondary cores Signed-off-by: Olof Johansson <olof@lixom.net>
| * | ARM: dts: am3517.dtsi: Disable reference to OMAP3 OTG controllerAdam Ford2018-07-121-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The AM3517 has a different OTG controller location than the OMAP3, which is included from omap3.dtsi. This results in a hwmod error. Since the AM3517 has a different OTG controller address, this patch disabes one that is isn't available. Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | | Merge tag 'mvebu-fixes-4.18-1' of git://git.infradead.org/linux-mvebu into fixesOlof Johansson2018-07-151-1/+1
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mvebu fixes for 4.18 (part 1) Use the new thermal binding on Armada 38x allowing to use a driver fix which is already part of the kernel. * tag 'mvebu-fixes-4.18-1' of git://git.infradead.org/linux-mvebu: ARM: dts: armada-38x: use the new thermal binding Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | ARM: dts: armada-38x: use the new thermal bindingBaruch Siach2018-07-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 2f28e4c24b10e (thermal: armada: Clarify control registers accesses) introduced the new thermal binding. The new binding extends the second registers field size to 8. Switch to the new binding to fix thermal reading values. Without this change the fix for errata #132698 introduced in commit 8c0b888f661 (thermal: armada: Change sensors trim default value) has no effect. Cc: stable@vger.kernel.org # v4.16+ Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
* | | | Merge tag 'omap-for-v4.18/fixes-signed' of ↵Olof Johansson2018-07-054-2/+7
|\ \ \ \ | | |/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes Fixes for omap for v4.18-rc cycle Few dts fixes for regressions for various SoCs and devices for touchscreen wake, dra7 USB quirk, pinmux for beaglebone mmc, and emac clock. Also included is a change for ti-sysc to use kcalloc that Kees wanted to get into v4.18 as that's the last one he wanted to fix for improved defense against allocation overflows. * tag 'omap-for-v4.18/fixes-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: omap3: Fix am3517 mdio and emac clock references ARM: dts: am335x-bone-common: Fix mmc0 Write Protect bus: ti-sysc: Use 2-factor allocator arguments ARM: dts: dra7: Disable metastability workaround for USB2 ARM: dts: am437x: make edt-ft5x06 a wakeup source Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | ARM: dts: omap3: Fix am3517 mdio and emac clock referencesAdam Ford2018-07-031-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A previous patch removed OMAP clock aliases that were perceived to be unnecessary. Unfortunately, it broke the ethernet on the am3517-evm. This patch enables the MDIO clock and EMAC clock. Fixes: 0ed266d7ae5e ("clk: ti: omap3: cleanup unnecessary clock aliases") Cc: stable@vger.kernel.org #4.16+ Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | ARM: dts: am335x-bone-common: Fix mmc0 Write ProtectRobert Nelson2018-07-031-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Mainline Commit b74c2b21e1551018af53ee6c1efc051dfce2d788 added the pinmux settings for mmc1, however this pin (0x9a0) is routed to P9_42 on the cape header. Thus any BeagleBone cape that utilizes P9_42 triggers mmc0's Write Protect. Fixes: b74c2b21e155 ("ARM: dts: am33xx: Add pinmux data for mmc1 in am335x-evm, evmsk and beaglebone") Signed-off-by: Robert Nelson <robertcnelson@gmail.com> CC: Faiz Abbas <faiz_abbas@ti.com> CC: Tony Lindgren <tony@atomide.com> CC: Jason Kridner <jkridner@beagleboard.org> CC: Drew Fustini <drew@beagleboard.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | ARM: dts: dra7: Disable metastability workaround for USB2Roger Quadros2018-07-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Disable the metastability workaround for USB2. The original patch disabled the workaround on the wrong USB port. Fixes: b8c9c6fa2002 ("ARM: dts: dra7: Disable USB metastability workaround for USB2") Cc: <stable@vger.kernel.org> [4.16+] Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | ARM: dts: am437x: make edt-ft5x06 a wakeup sourceDaniel Mack2018-06-251-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The touchscreen driver no longer configures the device as wakeup source by default. A "wakeup-source" property is needed. Signed-off-by: Daniel Mack <daniel@zonque.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | | | Merge tag 'imx-fixes-4.18-2' of ↵Olof Johansson2018-07-031-1/+1
|\ \ \ \ | |_|/ / |/| | / | | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes i.MX fixes for 4.18, round 2: - A couple of imx defconfig updates selecting USB ULPI support to fix a regression seen with USB driver, which is caused by commit 03e6275ae381 ("usb: chipidea: Fix ULPI on imx51"). - A fix on imx51-zii-rdu1 board touchscreen pinctrl setting, which causes an interrupt storm. * tag 'imx-fixes-4.18-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: imx_v4_v5_defconfig: Select ULPI support ARM: imx_v6_v7_defconfig: Select ULPI support ARM: dts: imx51-zii-rdu1: fix touchscreen pinctrl Signed-off-by: Olof Johansson <olof@lixom.net>
| * | ARM: dts: imx51-zii-rdu1: fix touchscreen pinctrlNick Dyer2018-07-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pinctrl settings were incorrect for the touchscreen interrupt line, causing an interrupt storm. This change has been tested with both the atmel_mxt_ts and RMI4 drivers on the RDU1 units. The value 0x4 comes from the value of register IOMUXC_SW_PAD_CTL_PAD_CSI1_D8 from the old vendor kernel. Signed-off-by: Nick Dyer <nick@shmanahar.org> Fixes: ceef0396f367 ("ARM: dts: imx: add ZII RDU1 board") Cc: <stable@vger.kernel.org> # 4.15+ Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Tested-by: Chris Healy <cphealy@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* | | Merge tag 'davinci-fixes-for-v4.18' of ↵Olof Johansson2018-06-291-5/+1
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into fixes This fixes polarity of SD card write-protect pin on DA850 EVM and fixes interrupt property for DA850 SoC GPIO as defined in device-tree. Both of these are not introduced with v4.18 merge but have existed prior. * tag 'davinci-fixes-for-v4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci: ARM: dts: da850: Fix interrups property for gpio ARM: davinci: board-da850-evm: fix WP pin polarity for MMC/SD Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | ARM: dts: da850: Fix interrups property for gpioKeerthy2018-06-271-5/+1
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | The intc #interrupt-cells is equal to 1. Currently gpio node has 2 cells per IRQ which is wrong. Remove the additional cell for each of the interrupts. Signed-off-by: Keerthy <j-keerthy@ti.com> Fixes: 2e38b946dc54 ("ARM: davinci: da850: add GPIO DT node") Signed-off-by: Sekhar Nori <nsekhar@ti.com>
* | | ARM: dts: Fix SPI node for Arria10Thor Thayer2018-06-261-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the unused bus-num node and change num-chipselect to num-cs to match SPI bindings. Cc: stable@vger.kernel.org Fixes: f2d6f8f817814 ("ARM: dts: socfpga: Add SPI Master1 for Arria10 SR chip") Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> Signed-off-by: Olof Johansson <olof@lixom.net>
* | | Merge tag 'socfpga_nand_fix_v4.17' of ↵Olof Johansson2018-06-242-3/+3
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into fixes ARM: dts: socfpga: fix NAND support - NAND should be using nand_x_clk, not nand_clk - fix NAND node compatible for Cyclone5 and Arria10 * tag 'socfpga_nand_fix_v4.17' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: ARM: dts: socfpga: Fix NAND controller node compatible for Arria10 ARM: dts: socfpga: Fix NAND controller node compatible ARM: dts: socfpga: Fix NAND controller clock supply Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | ARM: dts: socfpga: Fix NAND controller node compatible for Arria10Dinh Nguyen2018-05-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The NAND compatible "denali,denal-nand-dt" property has never been used and is obsolete. Remove it. Cc: stable@vger.kernel.org Fixes: f549af06e9b6("ARM: dts: socfpga: Add NAND device tree for Arria10") Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
| * | | ARM: dts: socfpga: Fix NAND controller node compatibleMarek Vasut2018-05-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The compatible string for the Denali NAND controller is incorrect, fix it by replacing it with one matching the DT bindings and the driver. Cc: stable@vger.kernel.org Signed-off-by: Marek Vasut <marex@denx.de> Fixes: d837a80d19 ("ARM: dts: socfpga: add nand controller nodes") Cc: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
| * | | ARM: dts: socfpga: Fix NAND controller clock supplyMarek Vasut2018-05-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Denali NAND x-clock should be supplied by nand_x_clk, not by nand_clk. Fix this, otherwise the Denali driver gets incorrect clock frequency information and incorrectly configures the NAND timing. Cc: stable@vger.kernel.org Signed-off-by: Marek Vasut <marex@denx.de> Fixes: d837a80d19 ("ARM: dts: socfpga: add nand controller nodes") Cc: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
* | | | Merge tag 'arm-soc/for-4.18/devicetree-fixes' of ↵Olof Johansson2018-06-234-41/+41
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://github.com/Broadcom/stblinux into fixes This pull request contains Broadcom ARM-based SoCs Device Tree fixes for 4.18, please pull the following: - Ray fixes the I2C and PCIe interrupt types for the Cygnus SoC - Florian fixes the I2C and PCIe interrupts for the Northstar (BCM5301x), Northstar Plus and Hurricane 2 SoCs * tag 'arm-soc/for-4.18/devicetree-fixes' of https://github.com/Broadcom/stblinux: ARM: dts: Cygnus: Fix PCIe controller interrupt type ARM: dts: Cygnus: Fix I2C controller interrupt type ARM: dts: BCM5301x: Fix i2c controller interrupt type ARM: dts: HR2: Fix interrupt types for i2c and PCIe ARM: dts: NSP: Fix PCIe controllers interrupt types ARM: dts: NSP: Fix i2c controller interrupt type Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | | ARM: dts: Cygnus: Fix PCIe controller interrupt typeRay Jui2018-06-181-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix PCIe controller interrupt to use IRQ_TYPE_LEVEL_HIGH for Broadcom Cygnus SoC Fixes: cd590b50a936 ("ARM: dts: enable PCIe support for Cygnus") Fixes: f6b889358a82 ("ARM: dts: Enable MSI support for Broadcom Cygnus") Signed-off-by: Ray Jui <ray.jui@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
| * | | | ARM: dts: Cygnus: Fix I2C controller interrupt typeRay Jui2018-06-181-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix I2C controller interrupt to use IRQ_TYPE_LEVEL_HIGH for Broadcom Cygnus SoC. Fixes: b51c05a331ff ("ARM: dts: add I2C device nodes for Broadcom Cygnus") Signed-off-by: Ray Jui <ray.jui@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
| * | | | ARM: dts: BCM5301x: Fix i2c controller interrupt typeFlorian Fainelli2018-06-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The i2c controller should be using IRQ_TYPE_LEVEL_HIGH, fix that. Fixes: bb097e3e0045 ("ARM: dts: BCM5301X: Add I2C support to the DT") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
| * | | | ARM: dts: HR2: Fix interrupt types for i2c and PCIeFlorian Fainelli2018-06-181-12/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The i2c and PCIe controllers had an incorrect type which should have been set to IRQ_TYPE_LEVEL_HIGH, fix that. Fixes: b9099ec754b5 ("ARM: dts: Add Broadcom Hurricane 2 DTS include file") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
| * | | | ARM: dts: NSP: Fix PCIe controllers interrupt typesFlorian Fainelli2018-06-181-15/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The interrupts for the PCIe controllers should all be of type IRQ_TYPE_LEVEL_HIGH instead of IRQ_TYPE_NONE. Fixes: d71eb9412088 ("ARM: dts: NSP: Add MSI support on PCI") Fixes: 522199029fdc ("ARM: dts: NSP: Fix PCIE DT issue") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
| * | | | ARM: dts: NSP: Fix i2c controller interrupt typeFlorian Fainelli2018-06-181-1/+1
| | |/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | The i2c controller should use IRQ_TYPE_LEVEL_HIGH instead of IRQ_TYPE_NONE. Fixes: 0f9f27a36d09 ("ARM: dts: NSP: Add I2C support to the DT") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* | | | Merge tag 'imx-fixes-4.18' of ↵Olof Johansson2018-06-232-2/+2
|\ \ \ \ | | |_|/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes i.MX fixes for 4.18: - Fix i.MX6SX PCIe MSI interrupt number, so that MSI IRQs can be properly propagated to the upstream interrupt controller. - Fix GPCv2 MIPI/PCIe/USB_HSIC's PGC offset. The values in Reference Manual are incorrect. - Correct SDMA setting for i.MX6Q SPI5 device to fix the issue, that the SPI controller RX FIFO was not empty after a DMA transfer, and the driver gets stuck in the next PIO transfer when reading one word more than expected. * tag 'imx-fixes-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: dts: imx6sx: fix irq for pcie bridge soc: imx: gpcv2: correct PGC offset ARM: dts: imx6q: Use correct SDMA script for SPI5 core Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | ARM: dts: imx6sx: fix irq for pcie bridgeOleksij Rempel2018-06-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the correct IRQ line for the MSI controller in the PCIe host controller. Apparently a different IRQ line is used compared to other i.MX6 variants. Without this change MSI IRQs aren't properly propagated to the upstream interrupt controller. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Fixes: b1d17f68e5c5 ("ARM: dts: imx: add initial imx6sx device tree source") Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * | | ARM: dts: imx6q: Use correct SDMA script for SPI5 coreSean Nyekjaer2018-06-171-1/+1
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to the reference manual the shp_2_mcu / mcu_2_shp scripts must be used for devices connected through the SPBA. This fixes an issue we saw with DMA transfers. Sometimes the SPI controller RX FIFO was not empty after a DMA transfer and the driver got stuck in the next PIO transfer when it read one word more than expected. commit dd4b487b32a35 ("ARM: dts: imx6: Use correct SDMA script for SPI cores") is fixing the same issue but only for SPI1 - 4. Fixes: 677940258dd8e ("ARM: dts: imx6q: enable dma for ecspi5") Signed-off-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* | | Merge tag 'mvebu-fixes-4.17-2' of git://git.infradead.org/linux-mvebu into fixesOlof Johansson2018-06-231-1/+1
|\ \ \ | |/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mvebu fixes for 4.17 (part 2) - Use correct size for ICU nodes (irq controller) on Armada 7K/8K - Fix "#cooling-cells" property's name on Synology DS116 (Armada 385) * tag 'mvebu-fixes-4.17-2' of git://git.infradead.org/linux-mvebu: arm: dts: armada: Fix "#cooling-cells" property's name arm64: dts: marvell: fix CP110 ICU node size Signed-off-by: Olof Johansson <olof@lixom.net>
| * | arm: dts: armada: Fix "#cooling-cells" property's nameViresh Kumar2018-05-281-1/+1
| | | | | | | | | | | | | | | | | | | | | It should be "#cooling-cells" instead of "cooling-cells". Fix it. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
* | | Merge tag 'armsoc-late' of ↵Linus Torvalds2018-06-1227-554/+1235
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC late updates from Olof Johansson: "This is a branch with a few merge requests that either came in late, or took a while longer for us to review and merge than usual and thus cut it a bit close to the merge window. We stage them in a separate branch and if things look good, we still send them up -- and that's the case here. This is mostly DT additions for Renesas platforms, adding IP block descriptions for existing and new SoCs. There are also some driver updates for Qualcomm platforms for SMEM/QMI and GENI, which is their generalized serial protocol interface" * tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (186 commits) soc: qcom: smem: introduce qcom_smem_virt_to_phys() soc: qcom: qmi: fix a buffer sizing bug MAINTAINERS: Update pattern for qcom_scm soc: Unconditionally include qcom Makefile soc: qcom: smem: check sooner in qcom_smem_set_global_partition() soc: qcom: smem: fix qcom_smem_set_global_partition() soc: qcom: smem: fix off-by-one error in qcom_smem_alloc_private() soc: qcom: smem: byte swap values properly soc: qcom: smem: return proper type for cached entry functions soc: qcom: smem: fix first cache entry calculation soc: qcom: cmd-db: Make endian-agnostic drivers: qcom: add command DB driver arm64: dts: renesas: salvator-common: Add ADV7482 support ARM: dts: r8a7740: Add CEU1 ARM: dts: r8a7740: Add CEU0 arm64: dts: renesas: salvator-common: enable VIN arm64: dts: renesas: r8a77970: add VIN and CSI-2 nodes arm64: dts: renesas: r8a77965: add VIN and CSI-2 nodes arm64: dts: renesas: r8a7796: add VIN and CSI-2 nodes arm64: dts: renesas: r8a7795-es1: add CSI-2 node ...
| * \ \ Merge tag 'renesas-dt-for-v4.18' of ↵Olof Johansson2018-06-0227-554/+1235
| |\ \ \ | | |_|/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/late Renesas ARM Based SoC DT Updates for v4.18 * R-Mobile A1 (r8a7740) SoC - Describe CEU, IRQC, SYS-DMAC and USB devices - Cleanup for consistency with other Renesas SoCs and enhanced maintainability * RZ/A1H (r7s72100) SoC - Describe CEU device * R-Car Gen2, RZ/G1 and RZ/A1H SoCs - Add PMU device nodes * RZ/A1H (r7s72100) SoC - Correct interrupt types * R-Mobile APE6 (r8a73a4) APE4EVM board and SH-Mobile AG5 (sh73a0) SoC - Use generic disable-wp instead of now deprecated toshiba,mmc-wrprotect-disable property * EMMA Mobile EV2 (emev2) and SH-Mobile AG5 (sh73a0) SoCs - Add missing interrupt-affinity to PMU * R-Car H2 (r8a7790) and R-Mobile APE6 (r8a73a4) SoCs - Correct mask for GIC PPI interrupts * R-Car H2 (r8a7790), M2-W (r8a7791), M2-N (r8a7793) and E2 (r8a7794) SoCs - Describe FDP1 instances * R-Car Gen2 and RZ/G1 SoCs - Describe watchdog devices - For R-Car Gen2 this involves updating the SMP routine side as it is changed by a driver updated to allow watchdog device support * Alt board for R-Car E2 (r8a7794) SoC * RBoards for -Car Gen2 SoCs and kzm9d board for EMMA Mobile EV2 (emev2) SoC * iW-RainboW-G23S board for RZ/G1C (r8a77470) SoC - Initial SoC and board support - Enable EtherAVB - Describe all SCIF devices * Boards for R-Car Gen2 SoCs - Enable watchdog support * Wheat board for V2H (r8a7792) SoC - Correct ADV7513 address usage * tag 'renesas-dt-for-v4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (69 commits) ARM: dts: r8a7740: Add CEU1 ARM: dts: r8a7740: Add CEU0 ARM: dts: r8a7745: Add PMU device node ARM: dts: r8a7743: Add PMU device node ARM: dts: r8a7794: Add PMU device node ARM: dts: r8a7793: Add PMU device node ARM: dts: r8a7792: Add PMU device node ARM: dts: r8a7791: Add PMU device node ARM: dts: r8a7790: Add PMU device nodes ARM: dts: r7s72100: Add PMU device node ARM: dts: r7s72100: Correct RTC interrupt types ARM: dts: r7s72100: Correct watchdog timer interrupt type ARM: dts: emev2: Add missing interrupt-affinity to PMU node ARM: dts: sh73a0: Add missing interrupt-affinity to PMU node ARM: dts: r8a73a4: Correct mask for GIC PPI interrupts ARM: dts: r8a7790: Correct mask for GIC PPI interrupts ARM: shmobile: r8a7794: alt: add EEPROM to DTS ARM: dts: kzm9d: Drop unnecessary address properties from gpio_keys node ARM: dts: silk: Drop unnecessary address properties from vin port node ARM: dts: alt: Drop unnecessary address properties from vin port node ... Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | ARM: dts: r8a7740: Add CEU1Simon Horman2018-05-161-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Describe CEU1 peripheral for Renesas R-Mobile A1 R8A7740 Soc. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
| | * | ARM: dts: r8a7740: Add CEU0Jacopo Mondi2018-05-161-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Describe CEU0 peripheral for Renesas R-Mobile A1 R8A7740 Soc. Reported-by: Geert Uytterhoeven <geert@glider.be> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> [simon: dropped clock-names property] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | ARM: dts: r8a7745: Add PMU device nodeGeert Uytterhoeven2018-05-141-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable support for the ARM Performance Monitor Units in the Cortex-A7 CPU cores on RZ/G1E by adding a device node for the PMU. New Linux output: hw perfevents: enabled with armv7_cortex_a7 PMU driver, 5 counters available Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | ARM: dts: r8a7743: Add PMU device nodeGeert Uytterhoeven2018-05-141-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable support for the ARM Performance Monitor Units in the Cortex-A15 CPU cores on RZ/G1M by adding a device node for the PMU. New Linux output: hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | ARM: dts: r8a7794: Add PMU device nodeGeert Uytterhoeven2018-05-141-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable support for the ARM Performance Monitor Units in the Cortex-A7 CPU cores on R-Car E2 by adding a device node for the PMU. New Linux output: hw perfevents: enabled with armv7_cortex_a7 PMU driver, 5 counters available Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | ARM: dts: r8a7793: Add PMU device nodeGeert Uytterhoeven2018-05-141-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable support for the ARM Performance Monitor Units in the Cortex-A15 CPU cores on R-Car M2-N by adding a device node for the PMU. New Linux output: hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | ARM: dts: r8a7792: Add PMU device nodeGeert Uytterhoeven2018-05-141-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable support for the ARM Performance Monitor Units in the Cortex-A15 CPU cores on R-Car V2H by adding a device node for the PMU. New Linux output: hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | ARM: dts: r8a7791: Add PMU device nodeGeert Uytterhoeven2018-05-141-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable support for the ARM Performance Monitor Units in the Cortex-A15 CPU cores on R-Car M2-W by adding a device node for the PMU. New Linux output: hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | ARM: dts: r8a7790: Add PMU device nodesGeert Uytterhoeven2018-05-141-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable support for the ARM Performance Monitor Units in the Cortex-A15 and Cortex-A7 CPU cores on R-Car H2 by adding device nodes for the two PMUs. New Linux output: hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available hw perfevents: /pmu-1: failed to probe PMU! hw perfevents: /pmu-1: failed to register PMU devices! The last two lines are due to the Cortex-A7 CPU cores being described in DT, but not enabled by the firmware. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | ARM: dts: r7s72100: Add PMU device nodeGeert Uytterhoeven2018-05-141-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable support for the ARM Performance Monitor Units in the Cortex-A9 CPU core on RZ/A1H by adding a device node for the PMU. New Linux output: hw perfevents: enabled with armv7_cortex_a9 PMU driver, 7 counters available Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | ARM: dts: r7s72100: Correct RTC interrupt typesGeert Uytterhoeven2018-05-141-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to table 7.3 ("List of Interrupt IDs") in the RZ/A1H Hardware User's Manual rev. 3.00, the realtime clock interrupts are level not edge interrupts. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | ARM: dts: r7s72100: Correct watchdog timer interrupt typeGeert Uytterhoeven2018-05-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to table 7.3 ("List of Interrupt IDs") in the RZ/A1H Hardware User's Manual rev. 3.00, the watchdog timer interrupt is a level interrupt. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | ARM: dts: emev2: Add missing interrupt-affinity to PMU nodeGeert Uytterhoeven2018-05-141-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PMU node references two interrupts, but lacks the interrupt-affinity property, which is required in that case: hw perfevents: no interrupt-affinity property for /pmu, guessing. Add the missing property to fix this. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | ARM: dts: sh73a0: Add missing interrupt-affinity to PMU nodeGeert Uytterhoeven2018-05-141-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PMU node references two interrupts, but lacks the interrupt-affinity property, which is required in that case: hw perfevents: no interrupt-affinity property for /pmu, guessing. Add the missing property to fix this. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>