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* Merge branch 'at91-3.4-cleanup2-DT2' of ↵Arnd Bergmann2012-03-1630-115/+252
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://github.com/at91linux/linux-at91 into next/dt * 'at91-3.4-cleanup2-DT2' of git://github.com/at91linux/linux-at91: (23 commits) ARM: at91: dt: enable usb ehci for sam9g45 and sam9x5 ARM: at91: usb ehci add dt support ARM: at91: dt: enable usb ohci for sam9g20, sam9g45 amd sam9x5 ARM: at91: usb ohci add dt support ARM: at91: add Shutdown Controller (SHDWC) DT support ARM: at91: add ram controller DT support ARM: at91: add RSTC (Reset Controller) dt support ARM: at91: always enable sam9 restart ARM: at91: add pmc DT support ARM: at91/dt: add specific DT soc init ARM: at91/dt: add Calao DAB-MMX daugther board support for USB-A9G20 ARM: at91: sam9x5 add i2c DT support ARM: at91: sam9g45 add i2c DT support ARM: at91: usb_a9g20 add DT i2c support ARM: at91: sam9g20 add i2c DT support i2c/gpio: add DT support ARM: at91: sam9x5 add nand support atmel/nand: add DT support of/mtd/nand: add generic bindings and helpers of: introduce helper to manage boolean ...
| * ARM: at91: dt: enable usb ehci for sam9g45 and sam9x5Jean-Christophe PLAGNIOL-VILLARD2012-03-152-0/+2
| | | | | | | | | | | | | | | | make the ECHI depends on ARCH_AT91 Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: devicetree-discuss@lists.ozlabs.org
| * ARM: at91: dt: enable usb ohci for sam9g20, sam9g45 amd sam9x5Jean-Christophe PLAGNIOL-VILLARD2012-03-153-1/+5
| | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: devicetree-discuss@lists.ozlabs.org
| * ARM: at91: add Shutdown Controller (SHDWC) DT supportJean-Christophe PLAGNIOL-VILLARD2012-03-152-1/+80
| | | | | | | | | | | | | | | | | | | | | | Use a string to specific the wakeup mode to make it more readable. Add the Real-time Clock Wake-up support too for sam9g45 and sam9x5. Add AT91_SHDW_CPTWK0_MAX to specific the Max of the Wakeup Counter. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| * ARM: at91: add ram controller DT supportJean-Christophe PLAGNIOL-VILLARD2012-03-154-27/+37
| | | | | | | | | | | | | | | | | | | | | | We can now drop the call to ioremap_registers() as we have the binding for the SDRAM/DDR Controller. Drop ioremap_registers() for sam9x5 too. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| * ARM: at91: add RSTC (Reset Controller) dt supportJean-Christophe PLAGNIOL-VILLARD2012-03-152-1/+30
| | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| * ARM: at91: always enable sam9 restartJean-Christophe PLAGNIOL-VILLARD2012-03-151-8/+2
| | | | | | | | | | | | | | | | | | This is need for multiple SoC in the same kernel image and DT. As we will chose the restart function via binding. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| * ARM: at91: add pmc DT supportJean-Christophe PLAGNIOL-VILLARD2012-03-153-7/+53
| | | | | | | | | | | | | | | | | | Specified the main Oscillator via clock binding. This will allow to do not hardcode it anymore in the DT board at 12MHz. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| * ARM: at91/dt: add specific DT soc initJean-Christophe PLAGNIOL-VILLARD2012-03-153-7/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This will allow to have static Device mapping and DT probe mapping for the System Controller. Temporary keep the call to ioremap_registers() until we have the binding for the SDRAM/DDR Controller. Temporary keep the main clock hardcoded to 12MHz until we have the binding for the PMC. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| * atmel/nand: add DT supportJean-Christophe PLAGNIOL-VILLARD2012-03-152-56/+0
| | | | | | | | | | | | | | | | Use a local copy of board informatin and fill with DT data. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
| * ARM: at91: enable on flash bbt for Atmel Reference and DT boardsJean-Christophe PLAGNIOL-VILLARD2012-03-1510-0/+10
| | | | | | | | | | | | Enable it on Calao board too as they are in DT too. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * ATMEL: fix nand ecc supportJean-Christophe PLAGNIOL-VILLARD2012-03-1520-14/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | So we can now choose for the board the ecc mode (ecc soft, soft bch, no ecc and hardware). Set ecc mode in the boards to soft as currently in the driver. Move platform data to a common header include/linux/platform_data/atmel_nand.h Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Hans-Christian Egtvedt <egtvedt@samfundet.no> Acked-by: David Woodhouse <dwmw2@infradead.org>
* | Merge branch 'at91-3.4-cleanup2+DT' of git://github.com/at91linux/linux-at91 ↵Arnd Bergmann2012-03-0214-143/+810
|\| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into next/dt * 'at91-3.4-cleanup2+DT' of git://github.com/at91linux/linux-at91: (22 commits) ARM: at91: at91sam9x5cm/dt: add leds support ARM: at91: usb_a9g20/dt: add gpio-keys support ARM: at91: at91sam9m10g45ek/dt: add gpio-keys support ARM: at91: at91sam9m10g45ek/dt: add leds support ARM: at91: usb_a9g20/dt: add leds support ARM: at91/pio: add new PIO3 features ARM: at91: add sam9_smc.o to at91sam9x5 build ARM: at91/tc/clocksource: Add 32 bit variant to Timer Counter ARM: at91/tc: add device tree support to atmel_tclib ARM: at91/tclib: take iomem size from resource ARM: at91/pit: add traces in case of error ARM: at91: pit add DT support ARM: at91: AIC and GPIO IRQ device tree initialization ARM: at91/board-dt: remove AIC irq domain from board file ARM: at91/gpio: remove the static specification of gpio_chip.base ARM: at91/gpio: add .to_irq gpio_chip handler ARM: at91/gpio: non-DT builds do not have gpio_chip.of_node field ARM: at91/gpio: add irqdomain and DT support ARM: at91/gpio: change comments and one variable name ARM/USB: at91/ohci-at91: remove the use of irq_to_gpio ...
| * ARM: at91/pio: add new PIO3 featuresNicolas Ferre2012-03-014-16/+277
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the support for new PIO controller found on some at91sam SOCs. - more peripheral multiplexing - more features to configure on a PIO (pull-down, Schmitt trigger, debouncer) - support for several IRQ triggering features (type and polarity) Support for those new features are retrieved from the device tree compatibility string. Debugfs at91_gpio file is updated to monitor configuration. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| * ARM: at91: add sam9_smc.o to at91sam9x5 buildNicolas Ferre2012-03-011-1/+1
| | | | | | | | | | | | | | Add these SMC accessors to the at91sam9x5 as we will need them for NAND flash (for instance). Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| * ARM: at91/tc: add device tree support to atmel_tclibNicolas Ferre2012-03-014-0/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Device tree support added to atmel_tclib: the generic Timer Counter library. This is used by the clocksource/clockevent driver tcb_clksrc. The current DT enabled platforms are also modified to use it: - .dtsi files are modified to add Timer Counter Block entries - alias are created to allow identification of each block - clkdev lookup tables are added for clocks identification. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Grant Likely <grant.likely@secretlab.ca>
| * ARM: at91/tclib: take iomem size from resourceNicolas Ferre2012-03-012-4/+4
| | | | | | | | | | | | | | | | | | | | | | Requesting iomem region and ioremaping is now done using the resource size specified instead of a constant value. Each <SoC>_device.c file is modified accordingly to reflect actual user interface size. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * ARM: at91/pit: add traces in case of errorNicolas Ferre2012-03-011-2/+7
| | | | | | | | | | | | | | Traces related to IRQ management are useful for timers in case of non-working IRQ subsystem (switch to irq_domain for instance). Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| * ARM: at91: pit add DT supportJean-Christophe PLAGNIOL-VILLARD2012-03-012-4/+61
| | | | | | | | | | | | | | | | | | | | Retreive registers address and IRQ from device tree entry. Called from at91_dt_init_irq() so that timers are up-n-running when timers initialization will occur. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> [nicolas.ferre@atmel.com: change error path and interrupts property handling] Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| * ARM: at91: AIC and GPIO IRQ device tree initializationNicolas Ferre2012-03-014-61/+168
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Both AIC and GPIO controllers are now using the standard of_irq_init() function to initialize IRQs in case of DT use. The DT specific initialization functions are now separated from the non-DT case and are now using "linear" irq domains. The .map() irqdomain operation is responsible for positioning the IRQ handlers. In AIC case, the Linux IRQ number is directly programmed in the hardware to avoid an additional reverse mapping operation. The AIC position its irq domain as the "default" irq domain. For DT case, the priority is not yet filled in the SMR. It will be the subject of another patch. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| * ARM: at91/board-dt: remove AIC irq domain from board fileNicolas Ferre2012-03-011-8/+0
| | | | | | | | | | | | | | | | Adding of irqdomain in AIC code make the specification of the irq domain in board file useless. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * ARM: at91/gpio: remove the static specification of gpio_chip.baseNicolas Ferre2012-03-011-7/+6
| | | | | | | | | | | | | | | | This value is determined at runtime using device tree or platform data information. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * ARM: at91/gpio: add .to_irq gpio_chip handlerNicolas Ferre2012-03-012-12/+13
| | | | | | | | | | | | | | | | | | | | Replace the gpio_to_irq() macro by a plain gpiolib .to_irq() handler. This call is using the irqdomain to translate hardware to Linux IRQ numbers. The irq_to_gpio() macro is completely removed. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * ARM: at91/gpio: non-DT builds do not have gpio_chip.of_node fieldNicolas Ferre2012-03-011-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | Protect build failure in case of non-DT configuration: the gpio_chip structure does not have a of_node field in case of !CONFIG_OF_GPIO. Keep this in a separate patch as it can be reverted if the field is added for both DT/non-DT cases. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * ARM: at91/gpio: add irqdomain and DT supportNicolas Ferre2012-03-011-46/+187
| | | | | | | | | | | | | | | | | | | | Add "legacy" type of irqdomain to preserve old-style numbering and allow smooth transition for both DT and non-DT cases. Original idea and code by Jean-Christophe Plagniol-Villard. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * ARM: at91/gpio: change comments and one variable nameNicolas Ferre2012-03-011-11/+14
| | | | | | | | | | | | | | | | | | | | | | What was true only on at91sam9263 about the sharing of a single AIC IRQ line for several GPIO banks is now used by several Atmel SoCs. Change a variable name to allow better understanding while introducing IRQ domains in following patches. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * ARM: at91/snapper9260: move gpio_to_irq out of structure initializationNicolas Ferre2012-03-011-3/+7
| | | | | | | | | | | | | | | | | | | | gpio_to_irq() implementation will be moved from a macro to a plain function: we cannot use it in a structure initialization anymore. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Reviewed-by: Ryan Mallon <rmallon@gmail.com>
| * ARM: at91/aic: add irq domain and device tree supportNicolas Ferre2012-03-011-13/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | Add an irqdomain for the AIC interrupt controller. The device tree support is mapping the registers and is using the irq_domain_add_legacy() to manage hwirq translation. The documentation is describing the meaning of the two cells required for using this "interrupt-controller" in a device tree node. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| |
| \
*-. | Merge branches 'depends/irqdomain' and 'at91/base2+cleanup' into next/dtArnd Bergmann2012-03-0271-3143/+1743
|\ \| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These two branches are a dependency for the at91 device tree changes, so we pull them in here. at91/base2+cleanup will get merged through the arm-soc cleanup2 branch, while the irqdomain tree will be sent by Grant before this one gets integrated. Conflicts: drivers/rtc/rtc-at91sam9.c Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * ARM: at91: properly sort dtb files in Makefile.bootJean-Christophe PLAGNIOL-VILLARD2012-02-231-1/+6
| | | | | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| | * ARM: at91: add at91sam9g25ek.dts in Makefile.bootNicolas Ferre2012-02-231-0/+1
| | | | | | | | | | | | | | | Reported-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| | * ARM: at91/board-dt: drop default consoleJean-Christophe PLAGNIOL-VILLARD2012-02-232-9/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This default console mechanism is not used if the console is selected by command line (console= parameter). Dropping this will simplify the compilation of multiple SoC in the same kernel image. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| | * Atmel: move console default platform_device to serial driverJean-Christophe PLAGNIOL-VILLARD2012-02-237-7/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This variable spread on every SoC that is using the atmel_serial.c driver can be included directly into the latter. This will allow to compile multiple soc in the same kernel. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Hans-Christian Egtvedt <egtvedt@samfundet.no> Cc: kernel@avr32linux.org
| | * ARM: at91: merge SRAM Memory banks thanks to mirroringJean-Christophe PLAGNIOL-VILLARD2012-02-232-8/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | On at91sam9260 and at91sam9g20 the SRAM banks are mirrored. We can merge them together to be able to have bigger and continuous internal RAM. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| | * ARM: at91: finally drop at91_sys_read/writeJean-Christophe PLAGNIOL-VILLARD2012-02-231-18/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | Remove at91_sys_read/write() from io.h file. This function is not used anymore and was a stopper on the way to single zImage kernel for AT91. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| | * ARM: at91/rtc-at91sam9: pass the GPBR to use via resourcesJean-Christophe PLAGNIOL-VILLARD2012-02-2310-27/+95
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The GPBR registers are used for storing RTC values. The GPBR registers to use are now provided using standard resource entry. The array is filled in SoC specific code. rtc-at91sam9 RTT as RTC driver is modified to retrieve this information. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> [nicolas.ferre@atmel.com: rework resources assignment] Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Reviewed-by: Ryan Mallon <rmallon@gmail.com>
| | * ARM: at91/rtc-at91sam9: each SoC can select the RTT device to useJean-Christophe PLAGNIOL-VILLARD2012-02-235-0/+66
| | | | | | | | | | | | | | | | | | | | | | | | | | | For the RTT as RTC driver rtc-at91sam9, the platform_device structure is filled during SoC initialization. This will allow to convert this RTC driver as a standard platform driver. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| | * ARM: at91/PMC: make register base soc independentJean-Christophe PLAGNIOL-VILLARD2012-02-2313-92/+101
| | | | | | | | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Reviewed-by: Ryan Mallon <rmallon@gmail.com>
| | * ARM: at91/PMC: move assignment out of printfNicolas Ferre2012-02-231-5/+10
| | | | | | | | | | | | | | | | | | | | | | | | We move the assignment of values of register out of the seq_printf() calls: It is obviously more readable. Reported-by: Ryan Mallon <rmallon@gmail.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| | * ARM: at91/pm_slowclock: add runtime detection of memory contollerJean-Christophe PLAGNIOL-VILLARD2012-02-233-22/+68
| | | | | | | | | | | | | | | | | | | | | This will allow to have all SoC in one kernel image. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| | * ARM: at91: make sdram/ddr register base soc independentJean-Christophe PLAGNIOL-VILLARD2012-02-2333-87/+111
| | | | | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| | * ARM: at91: move at91rm9200 sdramc defines to at91rm9200_sdramc.hJean-Christophe PLAGNIOL-VILLARD2012-02-235-49/+70
| | | | | | | | | | | | | | | | | | | | | This cleanup is done to allow to have multiple SoC in the same image. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| | * ARM: at91/pm_slowclock: function slow_clock() accepts parametersJean-Christophe PLAGNIOL-VILLARD2012-02-232-35/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change slow_clock()/at91_slow_clock() prototype to accept the PMC base address and one or two RAM controller addresses by parameters. The r0, r1 and r2 registers are used differently and preserved during function call. Those values are defined in pm.c and slow_clock() function is called from there with its new parameters. This will allow to have a soc independent pm_slowclock. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Ached-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| | * ARM: at91/pm_slowclock: rename register to named defineJean-Christophe PLAGNIOL-VILLARD2012-02-231-86/+91
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch will give a name to ARM registers in the assembly source code. It is done to simplify the code reading and the passing of parameters to functions. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| | * ARM: at91/ST: remove not needed castsNicolas Ferre2012-02-231-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | Remove the unnecessary (void) cast on at91_st_read() return value. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Ryan Mallon <rmallon@gmail.com>
| | * ARM: at91: make ST (System Timer) soc independentJean-Christophe PLAGNIOL-VILLARD2012-02-235-27/+50
| | | | | | | | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Reviewed-by: Ryan Mallon <rmallon@gmail.com>
| | * ARM: at91: make matrix register base soc independentJean-Christophe PLAGNIOL-VILLARD2012-02-2325-150/+194
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Reviewed-by: Ryan Mallon <rmallon@gmail.com> Cc: linux-usb@vger.kernel.org Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| | * ARM: at91/at91x40: remove use of at91_sys_read/writeJean-Christophe PLAGNIOL-VILLARD2012-02-173-21/+27
| | | | | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| | * ARM: at91: factorise duplicated at91sam9 idleJean-Christophe PLAGNIOL-VILLARD2012-02-177-35/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove duplicated at91sam9xxxx_idle() functions introduced by commit c9dfafb "ARM: mach-at91: move special idle code out of line". Replace by a generic at91sam9_idle() function in setup.c common location. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| | * Merge remote-tracking branch 'armsoc/at91/9x5' into at91-3.4-base2Nicolas Ferre2012-02-119-31/+631
| | |\
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