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* ARM: exynos: correct kernel doc in platsmpKrzysztof Kozlowski2021-04-061-15/+13
| | | | | | | | | | Correct few kerneldoc issues, including W=1 compile warning: arch/arm/mach-exynos/platsmp.c:89: warning: expecting prototype for exynos_core_power_down(). Prototype was for exynos_cpu_power_down() instead Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20210405181605.52612-1-krzysztof.kozlowski@canonical.com
* soc: samsung: exynos-chipid: convert to driver and merge exynos-asvKrzysztof Kozlowski2021-01-031-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Exynos Chip ID driver on Exynos SoCs has so far only informational purpose - to expose the SoC device in sysfs. No other drivers depend on it so there is really no benefit of initializing it early. The code would be the most flexible if converted to a regular driver. However there is already another driver - Exynos ASV (Adaptive Supply Voltage) - which binds to the device node of Chip ID. The solution is to convert the Exynos Chip ID to a built in driver and merge the Exynos ASV into it. This has several benefits: 1. Although the Exynos ASV driver binds to a device node present in all Exynos DTS (generic compatible), it fails to probe except on the supported ones (only Exynos5422). This means that the regular boot process has a planned/normal device probe failure. Merging the ASV into Chip ID will remove this probe failure because the final driver will always bind, just with disabled ASV features. 2. Allows to use dev_info() as the SoC bus is present (since core_initcall). 3. Could speed things up because of execution of Chip ID code in a SMP environment (after bringing up secondary CPUs, unlike early_initcall), This reduces the amount of work to be done early, when the kernel has to bring up critical devices. 5. Makes the Chip ID code defer-probe friendly, Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20201207190517.262051-5-krzk@kernel.org Reviewed-by: Pankaj Dubey <pankaj.dubey@samsung.com>
* Merge tag 'arm-soc-5.11' of ↵Linus Torvalds2020-12-172-4/+5
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC updates from Arnd Bergmann: "These are updates for SoC specific code, mostly in the 32-bit architecture: - A rework for handling MMIO accesses in Renesas SoCs in a more portable way - Updates to SoC version detection in NXP i.MX SoCs. - Smaller bug fixes for OMAP, Samsung, Marvell, Amlogic" * tag 'arm-soc-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (24 commits) arm64: Kconfig: meson: drop pinctrl ARM: mxs: Add serial number support for i.MX23, i.MX28 SoCs MAINTAINERS: switch mvebu tree to kernel.org MAINTAINERS: Add an entry for MikroTik CRS3xx 98DX3236 boards ARM: shmobile: Stop using __raw_*() I/O accessors ARM: shmobile: sh73a0: Remove obsolete static mapping ARM: shmobile: sh73a0: Use ioremap() to map SMP registers ARM: shmobile: sh73a0: Use ioremap() to map L2C registers ARM: shmobile: r8a7779: Remove obsolete static mappings ARM: shmobile: r8a7779: Use ioremap() to map SMP registers ARM: shmobile: r8a7779: Use ioremap() to map INTC2 registers ARM: shmobile: r8a7778: Introduce HPBREG_BASE ARM: OMAP1: clock: Use IS_ERR_OR_NULL() to clean code ARM: OMAP2+: Remove redundant null check before clk_prepare_enable/clk_disable_unprepare ARM: OMAP2+: Remove redundant assignment to variable ret ARM: OMAP2+: Fix kfree NULL pointer in omap2xxx_clkt_vps_init ARM: OMAP2+: Fix memleak in omap2xxx_clkt_vps_init ARM: exynos: extend cpuidle support to P4 Note boards ARM: imx: mach-imx6q: correctly identify i.MX6QP SoCs ARM: imx: imx7ulp: Add a comment explaining the B2 silicon version ...
| * ARM: exynos: extend cpuidle support to P4 Note boardsMartin Jücker2020-11-161-1/+2
| | | | | | | | | | | | | | | | | | The P4 Note family supports cpuidle, so allow it to make use of this feature. Signed-off-by: Martin Jücker <martin.juecker@gmail.com> Link: https://lore.kernel.org/r/20201113212525.13455-6-martin.juecker@gmail.com Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
| * ARM: exynos: clear prefetch bits in default l2c_aux_valGuillaume Tucker2020-10-311-2/+2
| | | | | | | | | | | | | | | | | | | | Clear the L310_AUX_CTRL_DATA_PREFETCH and L310_AUX_CTRL_INSTR_PREFETCH bits in the l2c_aux_val defaults for Exynos since they can now be set using the standard l2c2x0 devicetree bindings. Signed-off-by: Guillaume Tucker <guillaume.tucker@collabora.com> Link: https://lore.kernel.org/r/e44b5226f3ad1551459830c678ed183762d8e458.1597061474.git.guillaume.tucker@collabora.com Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
| * ARM: exynos: Simplify code in Exynos3250 CPU core restart pathMarek Szyprowski2020-10-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | exynos_core_restart() is called by secondary CPU boot procedure, used by CPU hotplug and coupled CPU idle. Replace of_machine_is_compatible() call with a simple SoC revision check. of_machine_is_compatible() function performs a dozen of string comparisons during the full device tree walk, while soc_is_exynos3250() is a simple integer check on SoC revision variable. This change also fixes the following warning: ============================= WARNING: suspicious RCU usage 5.10.0-rc1-00001-g6f65599d1f4f-dirty #1800 Not tainted ----------------------------- ./include/trace/events/lock.h:37 suspicious rcu_dereference_check() usage! other info that might help us debug this: rcu_scheduler_active = 2, debug_locks = 1 RCU used illegally from extended quiescent state! no locks held by swapper/0/0. stack backtrace: CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.10.0-rc1-00001-g6f65599d1f4f-dirty #1800 Hardware name: Samsung Exynos (Flattened Device Tree) [<c0111514>] (unwind_backtrace) from [<c010ceb8>] (show_stack+0x10/0x14) [<c010ceb8>] (show_stack) from [<c0b1d8dc>] (dump_stack+0xb4/0xd4) [<c0b1d8dc>] (dump_stack) from [<c0194acc>] (lock_acquire+0x418/0x584) [<c0194acc>] (lock_acquire) from [<c0b29e58>] (_raw_spin_lock_irqsave+0x4c/0x60) [<c0b29e58>] (_raw_spin_lock_irqsave) from [<c0897af4>] (of_device_is_compatible+0x1c/0x4c) [<c0897af4>] (of_device_is_compatible) from [<c01216d8>] (exynos_core_restart+0x14/0xb0) [<c01216d8>] (exynos_core_restart) from [<c0120a78>] (exynos_cpu0_enter_aftr+0x1d0/0x1dc) [<c0120a78>] (exynos_cpu0_enter_aftr) from [<c08575b0>] (exynos_enter_coupled_lowpower+0x44/0x74) [<c08575b0>] (exynos_enter_coupled_lowpower) from [<c085477c>] (cpuidle_enter_state+0x178/0x660) [<c085477c>] (cpuidle_enter_state) from [<c08572dc>] (cpuidle_enter_state_coupled+0x35c/0x378) [<c08572dc>] (cpuidle_enter_state_coupled) from [<c0854cc8>] (cpuidle_enter+0x50/0x54) [<c0854cc8>] (cpuidle_enter) from [<c0164854>] (do_idle+0x224/0x2a4) [<c0164854>] (do_idle) from [<c0164c88>] (cpu_startup_entry+0x18/0x1c) [<c0164c88>] (cpu_startup_entry) from [<c1100fa0>] (start_kernel+0x640/0x67c) [<c1100fa0>] (start_kernel) from [<00000000>] (0x0) Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Link: https://lore.kernel.org/r/20201027201716.15745-1-m.szyprowski@samsung.com Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
* | arm: remove CONFIG_ARCH_HAS_HOLES_MEMORYMODELMike Rapoport2020-12-151-1/+0
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ARM is the only architecture that defines CONFIG_ARCH_HAS_HOLES_MEMORYMODEL which in turn enables memmap_valid_within() function that is intended to verify existence of struct page associated with a pfn when there are holes in the memory map. However, the ARCH_HAS_HOLES_MEMORYMODEL also enables HAVE_ARCH_PFN_VALID and arch-specific pfn_valid() implementation that also deals with the holes in the memory map. The only two users of memmap_valid_within() call this function after a call to pfn_valid() so the memmap_valid_within() check becomes redundant. Remove CONFIG_ARCH_HAS_HOLES_MEMORYMODEL and memmap_valid_within() and rely entirely on ARM's implementation of pfn_valid() that is now enabled unconditionally. Link: https://lkml.kernel.org/r/20201101170454.9567-9-rppt@kernel.org Signed-off-by: Mike Rapoport <rppt@linux.ibm.com> Cc: Alexey Dobriyan <adobriyan@gmail.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Greg Ungerer <gerg@linux-m68k.org> Cc: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de> Cc: Jonathan Corbet <corbet@lwn.net> Cc: Matt Turner <mattst88@gmail.com> Cc: Meelis Roos <mroos@linux.ee> Cc: Michael Schmitz <schmitzmic@gmail.com> Cc: Russell King <linux@armlinux.org.uk> Cc: Tony Luck <tony.luck@intel.com> Cc: Vineet Gupta <vgupta@synopsys.com> Cc: Will Deacon <will@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge tag 'samsung-soc-5.10' of ↵Olof Johansson2020-09-261-2/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/soc Samsung mach/soc changes for v5.10 1. Clear unneeded L2C-310 flag which presenc was triggering warning message. 2. Fix build of SAMSUNG_PM_DEBUG without MMU. 3. Minor cleanups and update of linux-samsung-soc mailing list in Maintainers. * tag 'samsung-soc-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: ARM: s3c64xx: bring back notes from removed debug-macro.S ARM: s3c24xx: fix Wunused-variable warning on !MMU ARM: samsung: fix PM debug build with DEBUG_LL but !MMU MAINTAINERS: mark linux-samsung-soc list non-moderated ARM: exynos: clear L310_AUX_CTRL_NS_LOCKDOWN in default l2c_aux_val Signed-off-by: Olof Johansson <olof@lixom.net>
| * ARM: exynos: clear L310_AUX_CTRL_NS_LOCKDOWN in default l2c_aux_valGuillaume Tucker2020-08-171-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The L310_AUX_CTRL_NS_LOCKDOWN flag is set during the L2C enable sequence. There is no need to set it in the default register value, this was done before support for it was implemented in the code. It is not set in the hardware initial value either. Clean this up by removing this flag from the default l2c_aux_val, and add it to the l2c_aux_mask to print an alert message if it was already set before the kernel initialisation. Signed-off-by: Guillaume Tucker <guillaume.tucker@collabora.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
* | ARM: exynos: stop selecting PLAT_SAMSUNGArnd Bergmann2020-08-191-4/+0
| | | | | | | | | | | | | | | | | | | | Now that no code in arch/arm is shared between mach-exynos and the others, make the split formal. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Link: https://lore.kernel.org/r/20200806182059.2431-15-krzk@kernel.org Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
* | ARM: exynos: use private samsung_cpu_id copyArnd Bergmann2020-08-195-32/+25
| | | | | | | | | | | | | | | | | | | | | | | | The only part of plat-samsung that is shared with arch-exynos is the CPU identification code. Having a separate exynos_cpu_id variable makes the two completely independent and is actually a bit less code in total. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20200806182059.2431-14-krzk@kernel.org Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
* | ARM: samsung: remove HAVE_S3C2410_WATCHDOG and use direct dependenciesKrzysztof Kozlowski2020-08-191-1/+0
|/ | | | | | | | | | | | | | | | A separate Kconfig option HAVE_S3C2410_WATCHDOG for Samsung SoCs is not really needed and the s3c24xx watchdog driver can depend on Samsung ARM architectures instead. The "HAVE_xxx_WATCHDOG" pattern of dependency is not popular and Samsung platforms are here exceptions. All others just depend on CONFIG_ARCH_xxx. This makes the code slightly smaller without any change in functionality. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Guenter Roeck <linux@roeck-us.net>
* Merge tag 'arm-drivers-5.9' of ↵Linus Torvalds2020-08-041-0/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC driver updates from Arnd Bergmann: "A couple of subsystems have their own subsystem maintainers but choose to have the code merged through the soc tree as upstream, as the code tends to be used across multiple SoCs or has SoC specific drivers itself: - memory controllers: Krzysztof Kozlowski takes ownership of the drivers/memory subsystem and its drivers, starting out with a set of cleanup patches. A larger driver for the Tegra memory controller that was accidentally missed for v5.8 is now added. - reset controllers: Only minor updates to drivers/reset this time - firmware: The "turris mox" firmware driver gains support for signed firmware blobs The tegra firmware driver gets extended to export some debug information Various updates to i.MX firmware drivers, mostly cosmetic - ARM SCMI/SCPI: A new mechanism for platform notifications is added, among a number of minor changes. - optee: Probing of the TEE bus is rewritten to better support detection of devices that depend on the tee-supplicant user space. A new firmware based trusted platform module (fTPM) driver is added based on OP-TEE - SoC attributes: A new driver is added to provide a generic soc_device for identifying a machine through the SMCCC ARCH_SOC_ID firmware interface rather than by probing SoC family specific registers. The series also contains some cleanups to the common soc_device code. There are also a number of updates to SoC specific drivers, the main ones are: - Mediatek cmdq driver gains a few in-kernel interfaces - Minor updates to Qualcomm RPMh, socinfo, rpm drivers, mostly adding support for additional SoC variants - The Qualcomm GENI core code gains interconnect path voting and performance level support, and integrating this into a number of device drivers. - A new driver for Samsung Exynos5800 voltage coupler for - Renesas RZ/G2H (R8A774E1) SoC support gets added to a couple of SoC specific device drivers - Updates to the TI K3 Ring Accelerator driver" * tag 'arm-drivers-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (164 commits) soc: qcom: geni: Fix unused label warning soc: qcom: smd-rpm: Fix kerneldoc memory: jz4780_nemc: Only request IO memory the driver will use soc: qcom: pdr: Reorder the PD state indication ack MAINTAINERS: Add Git repository for memory controller drivers memory: brcmstb_dpfe: Fix language typo memory: samsung: exynos5422-dmc: Correct white space issues memory: samsung: exynos-srom: Correct alignment memory: pl172: Enclose macro argument usage in parenthesis memory: of: Correct kerneldoc memory: omap-gpmc: Fix language typo memory: omap-gpmc: Correct white space issues memory: omap-gpmc: Use 'unsigned int' for consistency memory: omap-gpmc: Enclose macro argument usage in parenthesis memory: omap-gpmc: Correct kerneldoc memory: mvebu-devbus: Align with open parenthesis memory: mvebu-devbus: Add missing braces to all arms of if statement memory: bt1-l2-ctl: Add blank lines after declarations soc: TI knav_qmss: make symbol 'knav_acc_range_ops' static firmware: ti_sci: Replace HTTP links with HTTPS ones ...
| * soc: samsung: exynos-regulator-coupler: Add simple voltage coupler for ↵Marek Szyprowski2020-07-221-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Exynos5800 Add a simple custom voltage regulator coupler for Exynos5800 SoCs, which require coupling between "vdd_arm" and "vdd_int" regulators. This coupler ensures that the voltage values don't go below the bootloader-selected operation point during the boot process until the clients set their constraints. It is achieved by assuming minimal voltage value equal to the current value if no constraints are set. This also ensures proper voltage balancing if any of the client driver is missing. The balancing code comes from the regulator/core.c with the additional logic for handling regulators without client constraints applied added. Link: https://lore.kernel.org/r/20200721180900.13844-5-krzk@kernel.org Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* | ARM: exynos: MCPM: Restore big.LITTLE cpuidle supportMarek Szyprowski2020-06-291-3/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Call exynos_cpu_power_up(cpunr) unconditionally. This is needed by the big.LITTLE cpuidle driver and has no side-effects on other code paths. The additional soft-reset call during little core power up has been added to properly boot all cores on the Exynos5422-based boards with secure firmware (like Odroid XU3/XU4 family). This however broke big.LITTLE CPUidle driver, which worked only on boards without secure firmware (like Peach-Pit/Pi Chromebooks). Apply the workaround only when board is running under secure firmware. Fixes: 833b5794e330 ("ARM: EXYNOS: reset Little cores when cpu is up") Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Lukasz Luba <lukasz.luba@arm.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
* | ARM: exynos: clear L310_AUX_CTRL_FULL_LINE_ZERO in default l2c_aux_valGuillaume Tucker2020-06-231-1/+1
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This "alert" error message can be seen on exynos4412-odroidx2: L2C: platform modifies aux control register: 0x02070000 -> 0x3e470001 L2C: platform provided aux values permit register corruption. Followed by this plain error message: L2C-310: enabling full line of zeros but not enabled in Cortex-A9 To fix it, don't set the L310_AUX_CTRL_FULL_LINE_ZERO flag (bit 0) in the default value of l2c_aux_val. It may instead be enabled when applicable by the logic in l2c310_enable() if the attribute "arm,full-line-zero-disable" was set in the device tree. The initial commit that introduced this default value was in v2.6.38 commit 1cf0eb799759 ("ARM: S5PV310: Add L2 cache init function in cpu.c"). However, the code to set the L310_AUX_CTRL_FULL_LINE_ZERO flag and manage that feature was added much later and the default value was not updated then. So this seems to have been a subtle oversight especially since enabling it only in the cache and not in the A9 core doesn't actually prevent the platform from running. According to the TRM, the opposite would be a real issue, if the feature was enabled in the A9 core but not in the cache controller. Reported-by: "kernelci.org bot" <bot@kernelci.org> Signed-off-by: Guillaume Tucker <guillaume.tucker@collabora.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
* arm: Unplug KVM from the build systemMarc Zyngier2020-03-241-1/+1
| | | | | | | | | | | | | | As we're about to drop KVM/arm on the floor, carefully unplug it from the build system. Signed-off-by: Marc Zyngier <maz@kernel.org> Acked-by: Olof Johansson <olof@lixom.net> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Will Deacon <will@kernel.org> Acked-by: Vladimir Murzin <vladimir.murzin@arm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Christoffer Dall <christoffer.dall@arm.com>
* Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds2020-02-087-26/+25
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM SoC platform updates from Olof Johansson: "Most of these are smaller fixes that have accrued, and some continued cleanup of OMAP platforms towards shared frameworks. One new SoC from Atmel/Microchip: sam9x60" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (35 commits) ARM: OMAP2+: Fix undefined reference to omap_secure_init ARM: s3c64xx: Drop unneeded select of TIMER_OF ARM: exynos: Drop unneeded select of MIGHT_HAVE_CACHE_L2X0 ARM: s3c24xx: Switch to atomic pwm API in rx1950 ARM: OMAP2+: sleep43xx: Call secure suspend/resume handlers ARM: OMAP2+: Use ARM SMC Calling Convention when OP-TEE is available ARM: OMAP2+: Introduce check for OP-TEE in omap_secure_init() ARM: OMAP2+: Add omap_secure_init callback hook for secure initialization ARM: at91: Documentation: add sam9x60 product and datasheet ARM: at91: pm: use of_device_id array to find the proper shdwc node ARM: at91: pm: use SAM9X60 PMC's compatible ARM: imx: only select ARM_ERRATA_814220 for ARMv7-A ARM: zynq: use physical cpuid in zynq_slcr_cpu_stop/start ARM: tegra: Use clk_m CPU on Tegra124 LP1 resume ARM: tegra: Modify reshift divider during LP1 ARM: tegra: Enable PLLP bypass during Tegra124 LP1 ARM: samsung: Rename Samsung and Exynos to lowercase ARM: exynos: Correct the help text for platform Kconfig option ARM: bcm: Select ARM_AMBA for ARCH_BRCMSTB ARM: brcmstb: Add debug UART entry for 7216 ...
| * ARM: exynos: Drop unneeded select of MIGHT_HAVE_CACHE_L2X0Geert Uytterhoeven2020-01-211-1/+0
| | | | | | | | | | | | | | | | | | | | Support for Samsung Exynos SoCs depends on ARCH_MULTI_V7, which selects ARCH_MULTI_V6_V7. As the latter selects MIGHT_HAVE_CACHE_L2X0, there is no need for ARCH_EXYNOS4 to select MIGHT_HAVE_CACHE_L2X0. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
| * ARM: samsung: Rename Samsung and Exynos to lowercaseKrzysztof Kozlowski2020-01-077-25/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix up inconsistent usage of upper and lowercase letters in "Samsung" and "Exynos" names. "SAMSUNG" and "EXYNOS" are not abbreviations but regular trademarked names. Therefore they should be written with lowercase letters starting with capital letter. The lowercase "Exynos" name is promoted by its manufacturer Samsung Electronics Co., Ltd., in advertisement materials and on website. Although advertisement materials usually use uppercase "SAMSUNG", the lowercase version is used in all legal aspects (e.g. on Wikipedia and in privacy/legal statements on https://www.samsung.com/semiconductor/privacy-global/). Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
| * ARM: exynos: Correct the help text for platform Kconfig optionKrzysztof Kozlowski2020-01-071-1/+1
| | | | | | | | | | | | | | ARCH_EXYNOS option is used for entire ARMv7 Exynos family, including also Exynos3 SoCs. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
* | irqchip: Define EXYNOS_IRQ_COMBINERHyunki Koo2020-01-201-0/+1
|/ | | | | | | | | | | | | | This patch is written to clean up dependency of ARCH_EXYNOS Not all exynos device have IRQ_COMBINER, especially aarch64 EXYNOS but it is built for all exynos devices. Thus add the config for EXYNOS_IRQ_COMBINER remove direct dependency between ARCH_EXYNOS and exynos-combiner.c and only selected on the aarch32 devices Signed-off-by: Hyunki Koo <hyunki00.koo@samsung.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20191224211108.7128-1-hyunki00.koo@gmail.com
* ARM: exynos: Enable exynos-asv driver for ARCH_EXYNOSSylwester Nawrocki2019-10-281-0/+1
| | | | | | | Enable exynos-asv driver for Exynos 32-bit SoCs. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
* ARM: exynos: Enable support for ARM architected timersMarek Szyprowski2019-09-091-0/+1
| | | | | | | | | | ARM architected timer can be used together with Exynos MultiCore Timer driver, so enable support for it. Support for ARM architected timers is essential for enabling proper KVM support. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
* ARM: exynos: Enable exynos-chipid driverPankaj Dubey2019-08-151-0/+1
| | | | | | | | | | As now we have Chipid driver to initialize and expose SoC related information let's include it in build by default. Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
* Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds2019-07-205-12/+15
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM SoC platform updates from Olof Johansson: "SoC platform changes. Main theme this merge window: - The Netx platform (Netx 100/500) platform is removed by Linus Walleij-- the SoC doesn't have active maintainers with hardware, and in discussions with the vendor the agreement was that it's OK to remove. - Russell King has a series of patches that cleans up and refactors SA1101 and RiscPC support" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (47 commits) ARM: stm32: use "depends on" instead of "if" after prompt ARM: sa1100: convert to common clock framework ARM: exynos: Cleanup cppcheck shifting warning ARM: pxa/lubbock: remove lubbock_set_misc_wr() from global view ARM: exynos: Only build MCPM support if used arm: add missing include platform-data/atmel.h ARM: davinci: Use GPIO lookup table for DA850 LEDs ARM: OMAP2: drop explicit assembler architecture ARM: use arch_extension directive instead of arch argument ARM: imx: Switch imx7d to imx-cpufreq-dt for speed-grading ARM: bcm: Enable PINCTRL for ARCH_BRCMSTB ARM: bcm: Enable ARCH_HAS_RESET_CONTROLLER for ARCH_BRCMSTB ARM: riscpc: enable chained scatterlist support ARM: riscpc: reduce IRQ handling code ARM: riscpc: move RiscPC assembly files from arch/arm/lib to mach-rpc ARM: riscpc: parse video information from tagged list ARM: riscpc: add ecard quirk for Atomwide 3port serial card MAINTAINERS: mvebu: Add git entry soc: ti: pm33xx: Add a print while entering RTC only mode with DDR in self-refresh ARM: OMAP2+: Make some variables static ...
| * Merge tag 'samsung-soc-5.3' of ↵Olof Johansson2019-06-273-6/+11
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/soc Samsung mach/soc changes for v5.3 Only cleanups and minor fixes. * tag 'samsung-soc-5.3' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: ARM: exynos: Cleanup cppcheck shifting warning ARM: exynos: Only build MCPM support if used ARM: exynos: Make ARCH_EXYNOS3 a default option Signed-off-by: Olof Johansson <olof@lixom.net>
| | * ARM: exynos: Cleanup cppcheck shifting warningPhong Tran2019-06-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Fix warning from cppcheck tool: "Shifting signed 32-bit value by 31 bits is undefined behaviour errors" Signed-off-by: Phong Tran <tranmanphong@gmail.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
| | * ARM: exynos: Only build MCPM support if usedArnd Bergmann2019-06-213-5/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We get a link error for configurations that enable an Exynos SoC that does not require MCPM, but then manually enable MCPM anyway without also turning on the arm-cci: arch/arm/mach-exynos/mcpm-exynos.o: In function `exynos_pm_power_up_setup': mcpm-exynos.c:(.text+0x8): undefined reference to `cci_enable_port_for_self' Change it back to only build the code we actually need, by introducing a CONFIG_EXYNOS_MCPM that serves the same purpose as the older CONFIG_EXYNOS5420_MCPM. Fixes: 2997520c2d4e ("ARM: exynos: Set MCPM as mandatory for Exynos542x/5800 SoCs") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
| | * ARM: exynos: Make ARCH_EXYNOS3 a default optionKrzysztof Kozlowski2019-05-301-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | By default for ARMv7 Exynos platform we select all flavors. One kernel image simplifies testing and maintenance. However Exynos3 was not selected by default so far (thus it was not present in multi_v7 kernel). Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
| * | ARM: use arch_extension directive instead of arch argumentStefan Agner2019-06-193-6/+4
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The LLVM Target parser currently does not allow to specify the security extension as part of -march (see also LLVM Bug 40186 [0]). When trying to use Clang with LLVM's integrated assembler, this leads to build errors such as this: clang-8: error: the clang compiler does not support '-Wa,-march=armv7-a+sec' Use ".arch_extension sec" to enable the security extension in a more portable fasion. Also make sure to use ".arch armv7-a" in case a v6/v7 multi-platform kernel is being built. Note that this is technically not exactly the same as the old code checked for availabilty of the security extension by calling as-instr. However, there are already other sites which use ".arch_extension sec" unconditionally, hence de-facto we need an assembler capable of ".arch_extension sec" already today (arch/arm/mm/proc-v7.S). The arch extension "sec" is available since binutils 2.21 according to its documentation [1]. [0] https://bugs.llvm.org/show_bug.cgi?id=40186 [1] https://sourceware.org/binutils/docs-2.21/as/ARM-Options.html Signed-off-by: Stefan Agner <stefan@agner.ch> Acked-by: Mans Rullgard <mans@mansr.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Olof Johansson <olof@lixom.net>
* / docs: arm: convert docs to ReST and rename to *.rstMauro Carvalho Chehab2019-07-151-1/+1
|/ | | | | | | | | | | | | | | | | | Converts ARM the text files to ReST, preparing them to be an architecture book. The conversion is actually: - add blank lines and identation in order to identify paragraphs; - fix tables markups; - add some lists markups; - mark literal blocks; - adjust title markups. At its new index.rst, let's add a :orphan: while this is not linked to the main index.rst file, in order to avoid build warnings. Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org> Reviewed-by Corentin Labbe <clabbe.montjoie@gmail.com> # For sun4i-ss
* ARM: exynos: Set MCPM as mandatory for Exynos542x/5800 SoCsMarek Szyprowski2019-04-103-13/+7
| | | | | | | | | | | | Support for Exynos5420/5422/5800 SoCs requires MCPM to properly boot all CPU cores on all currectly supported platforms: Peach Pit (Exynos5420), Odroid XU3/XU3lite/XU4/HC1 (Exynos5422) and Peach Pi (Exynos5800). Without it some CPU cores fail to come online. Remove then the ability to disable MCPM and make it mandatory when Exynos542x/5800 support is enabled. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
* ARM: exynos: Fix infinite loops on CPU powerup failureMarek Szyprowski2019-04-092-2/+20
| | | | | | | | | Add timeout to infinite loops during the CPU powerup procedures. It is better to report an error instead of busylooping for infinite time in case of failure. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
* ARM: exynos: Fix a leaked reference by adding missing of_node_putWen Yang2019-03-192-0/+3
| | | | | | | | | | | | | | | The call to of_get_next_child returns a node pointer with refcount incremented thus it must be explicitly decremented after the last usage. Detected by coccinelle with warnings like: arch/arm/mach-exynos/firmware.c:201:2-8: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 193, but without a corresponding object release within this function. Cc: stable@vger.kernel.org Signed-off-by: Wen Yang <wen.yang99@zte.com.cn> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
* ARM: exynos: Fix undefined instruction during Exynos5422 resumeMarek Szyprowski2019-03-191-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | During early system resume on Exynos5422 with performance counters enabled the following kernel oops happens: Internal error: Oops - undefined instruction: 0 [#1] PREEMPT SMP ARM Modules linked in: CPU: 0 PID: 1433 Comm: bash Tainted: G W 5.0.0-rc5-next-20190208-00023-gd5fb5a8a13e6-dirty #5480 Hardware name: SAMSUNG EXYNOS (Flattened Device Tree) ... Flags: nZCv IRQs off FIQs off Mode SVC_32 ISA ARM Segment none Control: 10c5387d Table: 4451006a DAC: 00000051 Process bash (pid: 1433, stack limit = 0xb7e0e22f) ... (reset_ctrl_regs) from [<c0112ad0>] (dbg_cpu_pm_notify+0x1c/0x24) (dbg_cpu_pm_notify) from [<c014c840>] (notifier_call_chain+0x44/0x84) (notifier_call_chain) from [<c014cbc0>] (__atomic_notifier_call_chain+0x7c/0x128) (__atomic_notifier_call_chain) from [<c01ffaac>] (cpu_pm_notify+0x30/0x54) (cpu_pm_notify) from [<c055116c>] (syscore_resume+0x98/0x3f4) (syscore_resume) from [<c0189350>] (suspend_devices_and_enter+0x97c/0xe74) (suspend_devices_and_enter) from [<c0189fb8>] (pm_suspend+0x770/0xc04) (pm_suspend) from [<c0187740>] (state_store+0x6c/0xcc) (state_store) from [<c09fa698>] (kobj_attr_store+0x14/0x20) (kobj_attr_store) from [<c030159c>] (sysfs_kf_write+0x4c/0x50) (sysfs_kf_write) from [<c0300620>] (kernfs_fop_write+0xfc/0x1e0) (kernfs_fop_write) from [<c0282be8>] (__vfs_write+0x2c/0x160) (__vfs_write) from [<c0282ea4>] (vfs_write+0xa4/0x16c) (vfs_write) from [<c0283080>] (ksys_write+0x40/0x8c) (ksys_write) from [<c0101000>] (ret_fast_syscall+0x0/0x28) Undefined instruction is triggered during CP14 reset, because bits: #16 (Secure privileged invasive debug disabled) and #17 (Secure privileged noninvasive debug disable) are set in DSCR. Those bits depend on SPNIDEN and SPIDEN lines, which are provided by Secure JTAG hardware block. That block in turn is powered from cluster 0 (big/Eagle), but the Exynos5422 boots on cluster 1 (LITTLE/KFC). To fix this issue it is enough to turn on the power on the cluster 0 for a while. This lets the Secure JTAG block to propagate the needed signals to LITTLE/KFC cores and change their DSCR. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
* ARM: exynos: Add CPU state management for Exynos542x under secure firmwareJoonyoung Shim2019-03-193-2/+21
| | | | | | | | | | | | Add required CPU state management done via secure monitor call for Exynos542x running unsed Secure Firmware. Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com> [mszyprow: rewrote code to use defines and sysram base address instead of the magic numbers, added second smc call in pm_resume, rephrased subject and commit message] Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
* ARM: exynos: Add Exynos SMC values for secure memory writeMarek Szyprowski2019-03-191-0/+7
| | | | | | | | Add defines for the (secure)-memory write for Exynos Secure Monitor Call. The values comes from the vendor kernel. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
* ARM: exynos: Move Exynos542x CPU state reset to pm_prepare()Marek Szyprowski2019-03-191-2/+1
| | | | | | | | | | | | Reset the CPU state entry in sysram in pm_prepare() callback. That entry doesn't need to be reset for every suspended CPU, so make it symmetic with the code, which restores it in pm_resume() callback. Tested on Samsung Chromebook2 Pit (Exynos5420) and Pi (Exynos5800) boards. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
* Merge tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-armLinus Torvalds2019-03-152-14/+19
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM updates from Russell King: - An improvement from Ard Biesheuvel, who noted that the identity map setup was taking a long time due to flush_cache_louis(). - Update a comment about dma_ops from Wolfram Sang. - Remove use of "-p" with ld, where this flag has been a no-op since 2004. - Remove the printing of the virtual memory layout, which is no longer useful since we hide pointers. - Correct SCU help text. - Remove legacy TWD registration method. - Add pgprot_device() implementation for mapping PCI sysfs resource files. - Initialise PFN limits earlier for kmemleak. - Fix argument count to match macro definition (affects clang builds) - Use unified assembler language almost everywhere for clang, and other clang improvements (from Stefan Agner, Nathan Chancellor). - Support security extension for noMMU and other noMMU cleanups (from Vladimir Murzin). - Remove unnecessary SMP bringup code (which was incorrectly copy'n' pasted from the ARM platform implementations) and remove it from the arch code to discourge further copys of it appearing. - Add Cortex A9 erratum preventing kexec working on some SoCs. - AMBA bus identification updates from Mike Leach. - More use of raw spinlocks to avoid -RT kernel issues (from Yang Shi and Sebastian Andrzej Siewior). - MCPM hyp/svc mode mismatch fixes from Marek Szyprowski. * tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm: (32 commits) ARM: 8849/1: NOMMU: Fix encodings for PMSAv8's PRBAR4/PRLAR4 ARM: 8848/1: virt: Align GIC version check with arm64 counterpart ARM: 8847/1: pm: fix HYP/SVC mode mismatch when MCPM is used ARM: 8845/1: use unified assembler in c files ARM: 8844/1: use unified assembler in assembly files ARM: 8843/1: use unified assembler in headers ARM: 8841/1: use unified assembler in macros ARM: 8840/1: use a raw_spinlock_t in unwind ARM: 8839/1: kprobe: make patch_lock a raw_spinlock_t ARM: 8837/1: coresight: etmv4: Update ID register table to add UCI support ARM: 8836/1: drivers: amba: Update component matching to use the CoreSight UCI values. ARM: 8838/1: drivers: amba: Updates to component identification for driver matching. ARM: 8833/1: Ensure that NEON code always compiles with Clang ARM: avoid Cortex-A9 livelock on tight dmb loops ARM: smp: remove arch-provided "pen_release" ARM: actions: remove boot_lock and pen_release ARM: oxnas: remove CPU hotplug implementation ARM: qcom: remove unnecessary boot_lock ARM: 8832/1: NOMMU: Limit visibility for CONFIG_FLASH_{MEM_BASE,SIZE} ARM: 8831/1: NOMMU: pmsa-v8: remove unneeded semicolon ...
| * ARM: smp: remove arch-provided "pen_release"Russell King2019-02-012-14/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Consolidating the "pen_release" stuff amongst the various SoC implementations gives credence to having a CPU holding pen for secondary CPUs. However, this is far from the truth. Many SoC implementations cargo-cult copied various bits of the pen release implementation from the initial Realview/Versatile Express implementation without understanding what it was or why it existed. The reason it existed is because these are _development_ platforms, and some board firmware is unable to individually control the startup of secondary CPUs. Moreover, they do not have a way to power down or reset secondary CPUs for hot-unplug. Hence, the pen_release implementation was designed for ARM Ltd's development platforms to provide a working implementation, even though it is very far from what is required. It was decided a while back to reduce the duplication by consolidating the "pen_release" variable, but this only made the situation worse - we have ended up with several implementations that read this variable but do not write it - again, showing the cargo-cult mentality at work, lack of proper review of new code, and in some cases a lack of testing. While it would be preferable to remove pen_release entirely from the kernel, this is not possible without help from the SoC maintainers, which seems to be lacking. However, I want to remove pen_release from arch code to remove the credence that having it gives. This patch removes pen_release from the arch code entirely, adding private per-SoC definitions for it instead, and explicitly stating that write_pen_release() is cargo-cult copied and should not be copied any further. Rename write_pen_release() in a similar fashion as well. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
* | ARM: exynos: Fix timeout when booting secondary CPUsStuart Menefy2019-02-011-2/+2
|/ | | | | | | | Without this fix the loop waiting for the timeout exits, but the subsequent test to see if the timeout occurred fails. Signed-off-by: Stuart Menefy <stuart.menefy@mathembedded.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
* ARM: exynos: Remove secondary startup initialization from smp_prepare_cpusPankaj Dubey2018-11-181-26/+0
| | | | | | | | | | | We are taking care of setting secondary cpu boot address in exynos_boot_secondary just before sending ipi to secondary CPUs, so we can safely remove this setting from smp_prepare_cpus. Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
* ARM: samsung: Limit SAMSUNG_PM_DEBUG config option to non-Exynos platformsBartlomiej Zolnierkiewicz2018-11-181-10/+4
| | | | | | | | | | | | | | | | "Samsung PM Suspend debug" feature (controlled by SAMSUNG_PM_DEBUG config option) is not working properly (debug messages are not displayed after resume) on Exynos platforms because GPIOs restore code is not implemented. Add PLAT_S3C24XX, ARCH_S3C64XX and ARCH_S5PV210 dependencies to SAMSUNG_PM_DEBUG config option to hide it on Exynos platforms. Then convert Exynos code to not require <plat/pm-common.h> header (use pr_debug() directly instead of S3C_PMDBG() macro and remove redundant s3c_pm_*() calls). Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
* ARM: exynos: Remove no longer needed s3c_pm_check_*() callsBartlomiej Zolnierkiewicz2018-11-121-7/+0
| | | | | | | | | Since commit 6862fdf2201a ("ARM: samsung: Limit SAMSUNG_PM_CHECK config option to non-Exynos platforms") s3c_pm_check_*() calls are redundant and can be removed. Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
* ARM: exynos: Remove legacy setting of external wakeup interruptsKrzysztof Kozlowski2018-11-122-6/+12
| | | | | | | | | | Since Exynos/S5Pv210 pin-controller driver is taking care about setting the external wakeup interrupts mask, the legacy code can be removed. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Cc: Tomasz Figa <tomasz.figa@gmail.com> Cc: Sylwester Nawrocki <snawrocki@kernel.org> Acked-by: Tomasz Figa <tomasz.figa@gmail.com>
* ARM: exynos: Fix imprecise abort during Exynos5422 suspend to RAMKrzysztof Kozlowski2018-08-303-6/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Suspend to RAM on Odroid XU3/XU4/HC1 family (Exynos5422) causes imprecise abort: PM: Syncing filesystems ... done. Freezing user space processes ... (elapsed 0.003 seconds) done. OOM killer disabled. Freezing remaining freezable tasks ... (elapsed 0.003 seconds) done. wake enabled for irq 139 Disabling non-boot CPUs ... IRQ51 no longer affine to CPU1 IRQ52 no longer affine to CPU2 IRQ53 no longer affine to CPU3 IRQ54 no longer affine to CPU4 IRQ55 no longer affine to CPU5 IRQ56 no longer affine to CPU6 cpu cpu4: Dropping the link to regulator.40 IRQ57 no longer affine to CPU7 Unhandled fault: external abort on non-linefetch (0x1008) at 0xf081a028 Internal error: : 1008 [#1] PREEMPT SMP ARM with last call trace in exynos_suspend_enter(). The abort is caused by writing to register in secure part of sysram. Boards booted under secure firmware (e.g. Hardkernel Odroid boards) should access non-secure sysram. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
* ARM: exynos: Store Exynos5420 register state in one variableKrzysztof Kozlowski2018-08-301-8/+12
| | | | | | | Instead of keeping two static variables put them into one struct which later can grow. This will reduce number of file-scope symbols. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
* Merge tag 'armsoc-soc' of ↵Linus Torvalds2018-08-232-2/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM 32-bit SoC platform updates from Olof Johansson: "Most of the SoC updates in this cycle are cleanups and moves to more modern infrastructure: - Davinci was moved to common clock framework - OMAP1-based Amstrad E3 "Superphone" saw a bunch of cleanups to the keyboard interface (bitbanged AT keyboard via GPIO). - Removal of some stale code for Renesas platforms - Power management improvements for i.MX6LL" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (112 commits) ARM: uniphier: select RESET_CONTROLLER arm64: uniphier: select RESET_CONTROLLER ARM: uniphier: remove empty Makefile ARM: exynos: Clear global variable on init error path ARM: exynos: Remove outdated maintainer information ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15 ARM: shmobile: r8a7779: hide unused r8a7779_platform_cpu_kill soc: r9a06g032: don't build SMP files for non-SMP config ARM: shmobile: Add the R9A06G032 SMP enabler driver ARM: at91: pm: configure wakeup sources for ULP1 mode ARM: at91: pm: add PMC fast startup registers defines ARM: at91: pm: Add ULP1 mode support ARM: at91: pm: Use ULP0 naming instead of slow clock ARM: hisi: handle of_iomap and fix missing of_node_put ARM: hisi: check of_iomap and fix missing of_node_put ARM: hisi: fix error handling and missing of_node_put ARM: mx5: Set the DBGEN bit in ARM_GPC register ARM: imx51: Configure M4IF to avoid visual artifacts ARM: imx: call imx6sx_cpuidle_init() conditionally for 6sll ARM: imx: fix i.MX6SLL build ...
| * ARM: exynos: Clear global variable on init error pathKrzysztof Kozlowski2018-07-241-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | For most of Exynos SoCs, Power Management Unit (PMU) address space is mapped into global variable 'pmu_base_addr' very early when initializing PMU interrupt controller. A lot of other machine code depends on it so when doing iounmap() on this address, clear the global as well to avoid usage of invalid value (pointing to unmapped memory region). Properly mapped PMU address space is a requirement for all other machine code so this fix is purely theoretical. Boot will fail immediately in many other places after following this error path. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
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