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* msm: gpiomux: Move public API to public headerDavid Brown2011-08-013-17/+40
| | | | | | | | | | | The gpiomux.h header contains some SOC ifdefs. However, the API that is actually used by the GPIO driver only uses two functions that are general. Move these general definitions into a public header file. Change-Id: Ia5df8af87dba268225598d56908e523bcfc24ef6 Signed-off-by: David Brown <davidb@codeaurora.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
* msm: gpio: Remove ifdefs on gpio chip registersDavid Brown2011-08-011-7/+26
| | | | | | | | | | Select the GPIO register configuration at runtime rather than through idefs. Change-Id: I02ea0a3d61bc81669f32097c32420f0688552231 Signed-off-by: David Brown <davidb@codeaurora.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
* msm: gpio: Remove chip-specific register definitionsDavid Brown2011-08-012-226/+220
| | | | | | | | | | Put an SOC prefix on each GPIO register definition, eliminating the need to have SOC ifdefs around the definitions. Change-Id: I5a01fd328a89ce1be610847934d6e118f5465e42 Signed-off-by: David Brown <davidb@codeaurora.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
* msm: Remove chip-ifdefs for GPIO io mappingsDavid Brown2011-08-015-24/+20
| | | | | | | | | | | | | The two GPIO controllers are always mapped to the same virtual address across all MSM devices. Instead of selecting this at compile time, determine the physical address at runtime, eliminating yet something else preventing multiple MSM targets from being compiled into the same kernel. Change-Id: I1672219d978ab6243526adeda6badf49472baa27 Signed-off-by: David Brown <davidb@codeaurora.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
* msm: gpio: Remove unsupported devicesDavid Brown2011-08-011-7/+0
| | | | | | | | | | The MSM7x25 and MSM7x27 devices are not yet supported in the kernel. Remove #ifdef-based tables supporting these chips for now. Change-Id: I4d9f5abc4cc0942ce75a067097b072489493c1b8 Signed-off-by: David Brown <davidb@codeaurora.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
* msm: timer: Fix DGT rate on 8960 and 8660Stephen Boyd2011-06-211-2/+4
| | | | | | | The DGT runs at 27 MHz divided by 4 on 8660 and 8960. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
* msm: timer: compensate for timer shift in msm_read_timer_countJeff Ohlstein2011-06-171-1/+5
| | | | | | | | | | | Some msm targets have timers whose lower bits are unreliable. So, we present our timers as lower frequency than they actually are, and ignore the bottom 5 bits on such targets. This compensation was erroneously removed from the msm_read_timer_count function, so restore it. This was broken by 94790ec25 "msm: timer: SMP timer support for msm". Signed-off-by: Jeff Ohlstein <johlstei@codeaurora.org>
* msm: timer: Fix SMP build errorStephen Boyd2011-06-011-0/+2
| | | | | | | | | | | | Fix build breakage on SMP=y builds due to 0f7b332 (ARM: consolidate SMP cross call implementation, 2011-04-03) arch/arm/mach-msm/timer.c: In function 'local_timer_setup': arch/arm/mach-msm/timer.c:295: error: implicit declaration of function 'gic_enable_ppi' Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
* Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2011-05-243-26/+11
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (137 commits) ARM: bcmring: convert to use sp804 clockevents ARM: bcmring: convert to sp804 clocksource ARM: 6912/1: bcmring: Add clkdev table in init_early clockevents: ARM sp804: obtain sp804 timer rate via clks clockevents: ARM sp804: allow clockevent name to be specified clocksource: ARM sp804: obtain sp804 timer rate via clks clocksource: ARM sp804: allow clocksource name to be specified clocksource: convert OMAP1 to 32-bit down counting clocksource clocksource: convert MXS timrotv2 to 32-bit down counting clocksource clocksource: convert SPEAr platforms 16-bit up counting clocksource clocksource: convert Integrator/AP 16-bit down counting clocksource clocksource: convert W90x900 24-bit down counting clocksource clocksource: convert ARM 32-bit down counting clocksources clocksource: convert ARM 32-bit up counting clocksources clocksource: add common mmio clocksource ARM: update sa1100 to reflect PXA updates ARM: omap1: convert to using readl/writel instead of volatile struct ARM: omap1: delete useless interrupt handler ARM: s5p: consolidate selection of timer register ARM: 6939/1: fix missing 'cpu_relax()' declaration ...
| * Merge branch 'devel-stable' into for-linusRussell King2011-05-231-2/+8
| |\ | | | | | | | | | | | | | | | Conflicts: arch/arm/Kconfig arch/arm/mach-ns9xxx/include/mach/uncompress.h
| | * ARM: msm: update GPIO chained IRQ handler to use entry/exit functionsWill Deacon2011-05-111-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch updates the MSM gpio chained IRQ handler to use the chained IRQ enter/exit functions in order to function correctly on primary controllers with different methods of flow control. Tested-and-reviewed-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Acked-by: David Brown <davidb@codeaurora.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
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| | \
| *-. \ Merge branches 'consolidate-clksrc', 'consolidate-flash', ↵Russell King2011-05-232-24/+3
| |\ \ \ | | |_|/ | |/| | | | | | 'consolidate-generic', 'consolidate-smp', 'consolidate-stmp' and 'consolidate-zones' into consolidate
| | | * ARM: consolidate SMP cross call implementationRussell King2011-05-232-24/+3
| | |/ | | | | | | | | | | | | | | | | | | | | | Rather than having each platform class provide a mach/smp.h header for smp_cross_call(), arrange for them to register the function with the core ARM SMP code instead. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | / treewide: fix a few typos in commentsJustin P. Mattock2011-05-101-1/+1
|/ / | | | | | | | | | | | | | | | | | | - kenrel -> kernel - whetehr -> whether - ttt -> tt - sss -> ss Signed-off-by: Justin P. Mattock <justinmattock@gmail.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
* | Merge branch 'for-39-rc4' of git://codeaurora.org/quic/kernel/davidb/linux-msmLinus Torvalds2011-04-192-5/+2
|\ \ | | | | | | | | | | | | | | | * 'for-39-rc4' of git://codeaurora.org/quic/kernel/davidb/linux-msm: msm: timer: fix missing return value msm: Remove extraneous ffa device check
| * | msm: timer: fix missing return valueDavid Brown2011-03-311-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change af90f10d38 "ARM: 6759/1: smp: Select local timers vs broadcast timer support runtime" missed a return statement, causing a compile warning: arch/arm/mach-msm/timer.c:272: warning: 'return' with no value, in function returning non-void Trivially return 0 for success when running on cpu 0 (to match the comment and previous behavior). Signed-off-by: David Brown <davidb@codeaurora.org>
| * | msm: Remove extraneous ffa device checkDavid Brown2011-03-311-4/+1
| |/ | | | | | | | | | | | | | | | | | | | | The qsd8x50 board file contains a few references to machine_is_... macros that are otherwise unused, and contain no machine definition. The recent purge of unused machine definitions breaks the compilation of this target. Since the machine cannot ever be used, just remove the bogus checks. Signed-off-by: David Brown <davidb@codeaurora.org>
* / Fix common misspellingsLucas De Marchi2011-03-312-2/+2
|/ | | | | | Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
* arm: Fold irq_set_chip/irq_set_handlerThomas Gleixner2011-03-296-12/+9
| | | | | | Use irq_set_chip_and_handler() instead. Converted with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* arm: Cleanup the irq namespaceThomas Gleixner2011-03-299-29/+29
| | | | | | Convert to the new function names. Automated with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* arm: msm: Use proper irq accessor functionsThomas Gleixner2011-03-295-10/+10
| | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* arm: msm: Convert to new irq chip functionsThomas Gleixner2011-03-291-16/+17
| | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2011-03-241-1/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (35 commits) ARM: Update (and cut down) mach-types ARM: 6771/1: vexpress: add support for multiple core tiles ARM: 6797/1: hw_breakpoint: Fix newlines in WARNings ARM: 6751/1: vexpress: select applicable errata workarounds in Kconfig ARM: 6753/1: omap4: Enable ARM local timers with OMAP4430 es1.0 exception ARM: 6759/1: smp: Select local timers vs broadcast timer support runtime ARM: pgtable: add pud-level code ARM: 6673/1: LPAE: use phys_addr_t instead of unsigned long for start of membanks ARM: Use long long format when printing meminfo physical addresses ARM: integrator: add Integrator/CP sched_clock support ARM: realview/vexpress: consolidate SMP bringup code ARM: realview/vexpress: consolidate localtimer support ARM: integrator/versatile: consolidate FPGA IRQ handling code ARM: rationalize versatile family Kconfig/Makefile ARM: realview: remove old AMBA device DMA definitions ARM: versatile: remove old AMBA device DMA definitions ARM: vexpress: use new init_early for clock tree and sched_clock init ARM: realview: use new init_early for clock tree and sched_clock init ARM: versatile: use new init_early for clock tree and sched_clock init ARM: integrator: use new init_early for clock tree init ...
| *---. Merge branches 'fixes', 'pgt-next' and 'versatile' into develRussell King2011-03-201-1/+2
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| | | | * ARM: 6759/1: smp: Select local timers vs broadcast timer support runtimeSantosh Shilimkar2011-02-231-1/+2
| | | |/ | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current code support of dummy timers in absence of local timer is compile time. This is an attempt to convert it to runtime so that on few SOC version if the local timers aren't supported kernel can switch to dummy timers. OMAP4430 ES1.0 does suffer from this limitation. This patch should not have any functional impact on affected files. Cc: Daniel Walker <dwalker@codeaurora.org> Cc: Bryan Huntsman <bryanh@codeaurora.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Colin Cross <ccross@android.com> Cc: Erik Gilling <konkers@android.com> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: David Brown <davidb@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | | Merge remote branch 'rmk/for-linus' into for-linusDavid Brown2011-03-175-17/+17
|\| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * rmk/for-linus: (1557 commits) ARM: 6806/1: irq: introduce entry and exit functions for chained handlers ARM: 6781/1: Thumb-2: Work around buggy Thumb-2 short branch relocations in gas ARM: 6747/1: P2V: Thumb2 support ARM: 6798/1: aout-core: zero thread debug registers in a.out core dump ARM: 6796/1: Footbridge: Fix I/O mappings for NOMMU mode ARM: 6784/1: errata: no automatic Store Buffer drain on Cortex-A9 ARM: 6772/1: errata: possible fault MMU translations following an ASID switch ARM: 6776/1: mach-ux500: activate fix for errata 753970 ARM: 6794/1: SPEAr: Append UL to device address macros. ARM: 6793/1: SPEAr: Remove unused *_SIZE macros from spear*.h files ARM: 6792/1: SPEAr: Replace SIZE macro's with SZ_4K macros ARM: 6791/1: SPEAr3xx: Declare device structures after shirq code ARM: 6790/1: SPEAr: Clock Framework: Rename usbd clock and align apb_clk entry ARM: 6789/1: SPEAr3xx: Rename sdio to sdhci ARM: 6788/1: SPEAr: Include mach/hardware.h instead of mach/spear.h ARM: 6787/1: SPEAr: Reorder #includes in .h & .c files. ARM: 6681/1: SPEAr: add debugfs support to clk API ARM: 6703/1: SPEAr: update clk API support ARM: 6679/1: SPEAr: make clk API functions more generic ARM: 6737/1: SPEAr: formalized timer support ... Conflicts: arch/arm/mach-msm/board-msm7x27.c arch/arm/mach-msm/board-msm7x30.c arch/arm/mach-msm/board-qsd8x50.c arch/arm/mach-msm/board-sapphire.c arch/arm/mach-msm/include/mach/memory.h
| * | | ARM: P2V: avoid initializers and assembly using PHYS_OFFSETRussell King2011-02-184-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As PHYS_OFFSET will be becoming a variable, we can't have it used in initializers nor assembly code. Replace those in generic code with a run-time initialization. Replace those in platform code using the individual platform specific PLAT_PHYS_OFFSET. Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Acked-by: David Brown <davidb@codeaurora.org> Acked-by: Eric Miao <eric.y.miao@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | ARM: P2V: separate PHYS_OFFSET from platform definitionsRussell King2011-02-182-6/+6
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This uncouple PHYS_OFFSET from the platform definitions, thereby facilitating run-time computation of the physical memory offset. Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Magnus Damm <damm@opensource.se> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Wan ZongShun <mcuos.com@gmail.com> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Acked-by: Eric Miao <eric.y.miao@gmail.com> Acked-by: Jiandong Zheng <jdzheng@broadcom.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | msm: scm: Check for interruption immediatelyStephen Boyd2011-03-101-24/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | When we're interrupted on the secure side, we should just issue another smc instruction again instead of replaying the arguments to smc. Fix it. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
* | | msm: scm: Fix improper register assignmentStephen Boyd2011-03-101-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Assign the registers used in the inline assembly immediately before the inline assembly block. This ensures the compiler doesn't optimize away dead register assignments when it shouldn't. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Nicolas Pitre <nico@fluxnic.net> Signed-off-by: David Brown <davidb@codeaurora.org>
* | | msm: scm: Mark inline asm as volatileStephen Boyd2011-03-101-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | We don't want the compiler to remove these asm statements or reorder them in any way. Mark them as volatile to be sure. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: David Brown <davidb@codeaurora.org>
* | | msm: iommu: Enable HTW L2 redirection on MSM8960Stepan Moskovchenko2011-03-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Allow the MSM8960 IOMMU to access its page tables directly through the L2 cache. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
* | | msm: iommu: Don't read from write-only registersStepan Moskovchenko2011-03-082-29/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Don't read from V2Pxx command registers when doing iova-to-phys operations. These registers are write-only and reading the value before modifying the VA bits is unnecessary. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
* | | msm: iommu: Remove dependency on IDRStepan Moskovchenko2011-03-084-22/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the depencency on the IOMMU IDR register, as it may not be accessible depending on the security configuraton. This involves moving the NCB field of IDR into the platform data. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
* | | msm: iommu: Use ASID tagging instead of VMID taggingStepan Moskovchenko2011-03-083-10/+14
| | | | | | | | | | | | | | | | | | | | | | | | Use ASID tags in the TLB instead of VMID tags in preparation for changes to the secure environment. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
* | | msm: iommu: Rework clock logic and add IOMMU bus clock controlStepan Moskovchenko2011-03-083-95/+121
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clean up the clock control code in the probe calls, and add support for controlling the clock for the IOMMU bus interconnect. With the (proper) clock driver in place, the clock control logic in the probe function can be made much cleaner since it does not have to deal with the placeholder driver anymore. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Reviewed-by: Trilok Soni <tsoni@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
* | | msm: iommu: Clock control for the IOMMU driverStepan Moskovchenko2011-03-082-5/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add clock control to the IOMMU driver. The IOMMU bus clock (and potentially an AXI clock) need to be on to gain access to IOMMU registers. Actively control these clocks when needed instead of leaving them on. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
* | | msm: clock: Migrate to clkdevStephen Boyd2011-02-2814-86/+97
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Migrating to clkdev has several advantages: * Less code in mach-msm/clock.c * A more robust clk_get() implementation * clk_add_alias() support * clk_get_sys() support In general, this will help board authors setup clock aliases and break the dependency on device pointers in the clock tables. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
* | | msm: clock: Remove references to clk_ops_pcomStephen Boyd2011-02-287-77/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Not all devices use proc_comm and determining if a clock is local vs. remote is fragile when done by comparing clk_ops pointers. Instead, implement an is_local() function for all clk_ops to determine if the clock is local. Doing this allows us to remove the last references to clk_ops_pcom from clock.c and compile it for targets with CONFIG_MSM_PROC_COMM=n. We don't need to set the clk_ops at runtime until 7x30 local clock detection comes in. Right now it's just complicating things so just set the ops pointer statically. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
* | | msm: headsmp.S: Fix section mismatchStephen Boyd2011-02-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | WARNING: vmlinux.o(.cpuinit.text+0xc80): Section mismatch in reference from the function boot_secondary() to the variable .init.text:msm_secondary_startup The function __cpuinit boot_secondary() references a variable __init msm_secondary_startup. If msm_secondary_startup is only used by boot_secondary then annotate msm_secondary_startup with a matching annotation. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
* | | msm: Use explicit GPLv2 licensesDavid Brown2011-02-2810-236/+70
| | | | | | | | | | | | | | | | | | | | | Replace a BSD-style license in Code Aurora Forum authored files with an explicit GPLv2. Signed-off-by: David Brown <davidb@codeaurora.org>
* | | Merge branch 'msm-core' into for-nextDavid Brown2011-02-144-66/+40
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | * msm-core: msm: iommu: Enable IOMMU support for MSM8960 msm: iommu: Generalize platform data for multiple targets msm: iommu: Create a Kconfig item for the IOMMU driver
| * | | msm: iommu: Enable IOMMU support for MSM8960Stepan Moskovchenko2011-02-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow IOMMU to be selected for MSM8960 now that the platform data has been generalized. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
| * | | msm: iommu: Generalize platform data for multiple targetsStepan Moskovchenko2011-02-143-66/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make the IOMMU platform data target-independent in preparation for adding MSM8960 IOMMU support. The IOMMU configuration on MSM8x60 and MSM8960 is identical and the same platform data can be used for both. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
| * | | msm: iommu: Create a Kconfig item for the IOMMU driverStepan Moskovchenko2011-02-142-2/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Break the IOMMU driver out as a Kconfig item. Initially it was decided to always build this in for 8x60, but this driver is not strictly necessary and should be optionally selectable. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
* | | | Merge branch 'msm-core' into for-nextDavid Brown2011-01-284-1/+111
|\| | | | | | | | | | | | | | | | | | | * msm-core: msm: serial: Add MSM8960 serial support
| * | | msm: serial: Add MSM8960 serial supportStepan Moskovchenko2011-01-284-1/+111
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the device definitions and platform data to support the console serial port on MSM8960 Simulator and RUMI3 targets. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
* | | | Merge branch 'msm-core' into for-nextDavid Brown2011-01-2820-224/+165
|\| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * msm-core: msm: Clean up useless ifdefs msm: clock: Add support for more proc_comm clocks msm: clock: Invert debugfs directory layout msm: clock: Move debugfs code from clock.c to clock-debug.c msm: clock: Remove 7x30 and pcom includes from clock.h msm: clock: Remove unused code and definitions msm: Warning fix in trout gpio board file msm: Remove broken register definition from trout
| * | | msm: Clean up useless ifdefsStepan Moskovchenko2011-01-288-32/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove ifdefs that do nothing, either from having the code between them previously removed, or from having been accidentally added to the wrong file. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
| * | | msm: clock: Add support for more proc_comm clocksStephen Boyd2011-01-283-1/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the ce, codec_ssbi, uart clocks, and i2c clocks. Reviewed-by: Saravana Kannan <skannan@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
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