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| * omap3: rx51: Add SDRAM initTero Kristo2009-11-223-1/+228
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds board specific SDRAM init for RX51. This patch is a collaboration of work from following people: Juha Yrjola: Original code Lauri Leukkunen: Port to RX51 Tero Kristo: Support for multiple OPP:s, merge of patches Samu Onkalo: Fixed SDRAM parameters according to specs Kalle Jokiniemi: A fix for rounding error Signed-off-by: Tero Kristo <tero.kristo@nokia.com> Cc: Samu Onkalo <samu.p.onkalo@nokia.com> Cc: Kalle Jokiniemi <kalle.jokiniemi@digia.com> Cc: Lauri Leukkunen <lauri.leukkunen@nokia.com> Cc: Juha Yrjola <juha.yrjola@solidboot.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * omap3: zoom: Introduce zoom3 board supportvikram pandita2009-11-224-0/+118
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Zoom3 is the next version of Zoom2 board. There has been a silicon update from zoom2 to zoom3. Zoom2 has OMAP34xx Zoom3 has OMAP3630 [1] Zoom3 = OMAP3630 SOM board [2] + same zoom2 main board [3] + same debugboard Zoom3 has a SDRAM part from Hynix Zoom2 had SDRAM part from micron Hynix memory timings are contributed by: Chalhoub, Nicole and Bour, Vincent Reuse the zoom2 files as much for zoom3, as at board level, there is no change at all. References: (courtesy Nishant Menon) [1] OMAP3630 http://focus.ti.com/general/docs/wtbu/wtbuproductcontent.tsp?templateId=6123&navigationId=12836&contentId=52606 [2] SOM boards http://logicpd.com/products/system-modules/texas-instruments-omap35x-som-lv [3] Zoom2 boards http://logicpd.com/products/development-kits/texas-instruments-zoom%E2%84%A2-omap34x-ii-mdp OMAP3630: Signed-off-by: Vikram Pandita <vikram.pandita@ti.com> Cc: Nicole Chalhoub <n-chalhoub@ti.com> Cc: Vincent Bour <v-bour@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * omap3: zoom: Drop i2c-1 speed to 2400vikram pandita2009-11-221-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The I2C-1 bus frequency on zoom2/zoom3/sdp3630 should be 2.4 MHz. The speed is limited by TWL5030/GAIA; a higher speed could lead to errors on the interface. The maximum I2C speed depends on the system clock for GAIA: 2.2 MHz (sys-clk = 19.2 MHz) 2.4 MHz (sys-clk = 26 MHz) 2.9 MHz (sys-clk = 38.4 MHz) For Zoom2/Zoom3/SDP3630 the system clock is 26Mhz and hence choose 2.4Mhz for I2C1 bus speed Signed-off-by: Vikram Pandita <vikram.pandita@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * omap3: zoom: rename zoom2 name to generic zoomvikram pandita2009-11-224-78/+81
| | | | | | | | | | | | | | | | | | | | | | Replace zoom2 with zoom name in board-zoom-peripherals.c file and board-zoom-debugboard.c. Create mach/board-zoom.h. This file has functions reused for boards: Zoom2/Zoom3/sdp3630. Hence have all functions commonly named as zoom Signed-off-by: Vikram Pandita <vikram.pandita@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * omap3: zoom: split board file for software reusevikram pandita2009-11-223-225/+275
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Split zoom2 board file into a base board file and a board-zoom-peripherals.c file. That way the same peripherals file can be reused for zoom3 and sdp3630 in addition to zoom2. Also remove unused struct omap_board_config_kernel entry. NOTE: Keep the twl4030_madc_platform_data and twl4030_platform_data entries in board-zoom2.c to avoid merge conflicts with the pending patches in MFD tree. These entries will be removed later as a fix. Following list shows the commonality across the three platforms and hence the case for software reuse: Peripheral zoom2 zoom3 sdp3630 --------------------------------------- Ethernet smsc smsc smc NOR n/a n/a B Onenand n/a n/a B HDMI A A B (present on different i2c) NAND A A A (same nand) SDRAM A A A (same sdram) Keypad A A A (same twl) Camera A A A (same sensor can be mounted) LCD Display A A A (same wvga display) OPPs A A A (same chip feature) Audio A A A (same audio via twl5030) Signed-off-by: Vikram Pandita <vikram.pandita@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * omap3evm: MIgrate to smsc911x ethernet driverSriram2009-11-221-13/+30
| | | | | | | | | | | | | | | | | | | | Migrate to smsc911x ethernet driver instead of smc911x driver. The smsc911x ethernet driver supports NAPI and performs better under heavy traffic. With the smc911x driver we were witnessing very high iowait time for high IO load over NFS. Signed-off-by: Sriramakrishnan <srk@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * omap3evm: Initialize vmmc and vmmc_aux regulatorsMike Rapoport2009-11-221-0/+51
| | | | | | | | | | | | | | | | | | | | | | | | Initialize vmmc and vmmc_aux regulators Note that the omap3evm_twldata.vmmc1 and omap3evm_twldata.vsim are set in omap3_evm_i2c_init() to avoid a merge conflict with the MFD tree. These will be initialized in omap3evm_i2c_boardinfo as a fix later on. Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * omap3evm: ehci: Update EHCI support on OMAP3EVM (Rev >= E)Ajay Kumar Gupta2009-11-222-3/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Added runtime programming for the differences in EHCI interface between OMAP3EVM revisions (Rev >= E) and (Rev < E). Changes: - EHCI PHY reset GPIO pin is 21 on Rev >= E while Rev < E uses GPIO pin 135. - Rev >= E uses EHCI Vbus enable GPIO22 line. - Rev >= E uses GPIO61 to select EHCI port either on main board or on Mistral Daughter Card (MDC). OMAP3EVM Rev < E doesn't have EHCI port on main board. - Currently GPIO61 it programmed to enable EHCI port on main board only. Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
| * omap3evm: Add board revision functionAjay Kumar Gupta2009-11-221-0/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | Added function to differentiate between the OMAP3EVM revisions. The chip-id of the ethernet PHY is being used for this purpose. Rev A to D : 0x01150000 Rev >= E : 0x92200000 Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com> Signed-off-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * omap: Cleanup the coding style in id.cFelipe Balbi2009-11-221-40/+21
| | | | | | | | | | | | | | | | Cleanup the coding style in id.c while avoiding unneeded switch() statements. Signed-off-by: Felipe Balbi <felipe.balbi@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * omap: mailbox: Adds code changes to support OMAP4 mailboxC A Subramaniam2009-11-221-24/+116
| | | | | | | | | | | | | | | | | | | | | | This patch adds code changes in the mailbox driver module to add support for OMAP4 mailbox. Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com> Signed-off-by: C A Subramaniam <subramaniam.ca@ti.com> Signed-off-by: Ramesh Gupta G <grgupta@ti.com> Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * omap: mailbox: Add resources and mailbox register base address for OMAP4 mailboxC A Subramaniam2009-11-221-9/+27
| | | | | | | | | | | | | | | | | | | | This patch adds resource information of mailbox driver for OMAP4 mailbox module. Register base address also added Signed-off-by: C A Subramaniam <subramaniam.ca@ti.com> Signed-off-by: Ramesh Gupta G <grgupta@ti.com> Acked-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * omap: mailbox: Add build specific changes to support omap mailboxC A Subramaniam2009-11-221-0/+3
| | | | | | | | | | | | | | | | | | | | This patch adds changes to the build related files of mailbox driver Signed-off-by: C A Subramaniam <subramaniam.ca@ti.com> Signed-off-by: Ramesh Gupta G <grgupta@ti.com> Acked-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * omap3: keep SoC features on the same lineKevin Hilman2009-11-221-6/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When listing the various SoC features, print them on the same line. So, instead of this OMAP3430/3530 ES3.1 - l2cache : Y - iva : Y - sgx : Y - neon : Y - isp : Y you get this: OMAP3430/3530 ES3.1 (l2cache iva sgx neon isp ) Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * omap3: move check_revision above check_featuresNishanth Menon2009-11-221-1/+1
| | | | | | | | | | | | | | | | | | | | omap3_check_revision() does not depend on omap3_check_features() move this above so that we can add logic based on revision detected in check_features. Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Mika Westerberg <mika.westerberg@iki.fi> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * omap3: HSMMC2 8-bit mux configurationMadhu2009-11-222-0/+14
| | | | | | | | | | | | | | Add support for omap hsmmc2 8-bit mux configuration. Signed-off-by: Madhusudhan Chikkature <madhu.cr@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * omap3630: Set omap3630 MMC1 I/O speed to 52MhzMadhu2009-11-221-2/+9
| | | | | | | | | | | | | | | | The speed ctrl bit for MMC I/O is part of CONTROL_PROG_IO1 register in omap3630.This patch sets it up accordingly. Signed-off-by: Madhusudhan Chikkature <madhu.cr@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * omap3630: Configure HSMMC1 to 4-bitMadhu2009-11-221-0/+6
| | | | | | | | | | | | | | | | The HSMMC1 controller on omap3630 supprts only 4-bit mode. If cpu is 3630 configure HSMMC1 wires to 4-bit. Signed-off-by: Madhusudhan Chikkature <madhu.cr@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * omap3630: Add HSMMC related checksMadhu2009-11-221-1/+1
| | | | | | | | | | | | | | | | Change the cpu_is_omap3430() check to cpu_is_omap34xx() to allow HSMMC1/2 mux configuration for omap3630. Signed-off-by: Madhusudhan Chikkature <madhu.cr@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * omap: iommu: reorganizeFelipe Contreras2009-11-221-31/+31
| | | | | | | | | | | | | | | | This way it's more object oriented and easier to see what is happening. No functional changes. Signed-off-by: Felipe Contreras <felipe.contreras@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * omap: Add platform init code for EHCI driverFelipe Balbi2009-11-227-8/+260
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add platform init code for EHCI driver. Various fixes to the original patch by Ajay Kumar Gupta <ajay.gupta@ti.com> and Anand Gadiyar <gadiyar@ti.com>. Overo support added by Olof Johansson <olof@lixom.net> Beagle support added by Koen Kooi <koen@beagleboard.org> CM-T32 support added by Mike Rapoport <mike@compulab.co.il> Signed-off-by: Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Koen Kooi <koen@beagleboard.org> Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com> Signed-off-by: Anand Gadiyar <gadiyar@ti.com> Signed-off-by: Felipe Balbi <felipe.balbi@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * omap3: AM35xx: Initialize omap_chip bitsRanjith Lohithakshan2009-11-221-0/+2
| | | | | | | | | | | | | | | | | | AM35xx is functionally similar to OMAP3430 ES3.1 from a powerdomain/clockdomain perspective. This patch initializes the omap_chip bits on AM35xx for use by powerdomain and clockdomain code. Signed-off-by: Ranjith Lohithakshan <ranjithl@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * omap3: AM35xx: Runtime detection of the deviceSanjeev Premi2009-11-221-6/+30
| | | | | | | | | | | | | | | | Add support to detect AM3505/AM3517 devices at runtime. Also updates the CPU names printed during boot. Signed-off-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * omap3: 3630: update is_chip variablevikram pandita2009-11-221-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 3630 is getting treated like next rev of 3430 omap_chip.oc variable has to be updated for 3630 version Otherwise the Core power domain is not getting registered. This gets used in the registration of power domains in: "arch/arm/mach-omap2/powerdomains34xx.h" core_34xx_es3_1_pwrdm OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES3_1) Core power doman will get registered for 3630 only when .oc is populated correctly. Tested on Zoom3(3630) board Signed-off-by: Vikram Pandita <vikram.pandita@ti.com> Acked-by: Alexander Shishkin <virtuoso@slind.org> Acked-by: Ari Kauppi <kauppi@papupata.org> Acked-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * omap3: Introduce OMAP3630Nishanth Menon2009-11-221-3/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP3630 is the latest in the family of OMAP3 devices and among the changes it introduces are: New OPP levels for new voltage and frequency levels. a bunch of Bug fixes to various modules feature additions, notably with ISP, sDMA etc. Details about the chip is available here: http://focus.ti.com/general/docs/wtbu/wtbuproductcontent.tsp?templateId=6123&navigationId=12836&contentId=52606 Strategy used: Strategy to introduce this device into Linux was discussed here: Ref: http://marc.info/?t=125343303400003&r=1&w=2 Two approaches were available: a) Consider 3630 generation of devices as a new family of silicon b) Consider 3630 as an offshoot of 3430 family of devices As a common consensus, (b) seems to be more valid for 3630 as: * There are changes which are easily handled by using "FEATURES" infrastructure. For details how to do this, see thread: http://marc.info/?t=125050998500001&r=1&w=2 * Most of existing 34xx infrastructure can be reused(almost 90%+) - so no ugly if (cpu_is_omap34xx() || cpu_is_omap36xx()) all over the place - lesser chance of bugs due to reuse of proven code flow - 36xx specific handling can still be done where required within the existing infrastructure NOTE: * If additional 34xx series are added, OMAP3430_REV_ESXXXX can be added on top of the existing 3630 ones are renumbered This patch was tested on SDP3430, boot tested on 3630 platform using 3430sdp defconfig Signed-off-by: Madhusudhan Chikkature Rajashekar <madhu.cr@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Vikram Pandita <vikram.pandita@ti.com> Cc: Allen Pais <allen.pais@ti.com> Cc: Anand Gadiyar <gadiyar@ti.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Felipe Balbi <felipe.balbi@nokia.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Sanjeev Premi <premi@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Sergio Alberto Aguirre Rodriguez <saaguirre@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * omap3: Runtime detection of OMAP35x devicesSanjeev Premi2009-11-221-11/+54
| | | | | | | | | | | | | | | | | | | | | | | | Add runtime check for these OMAP35x variations based on the detected Si features: OMAP3503, OMAP3515, OMAP3525 and OMA3530. Also, delayed the call to pr_info() into actual variant is detected in omap3_cpuinfo() Signed-off-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * omap3: Runtime detection of Si featuresSanjeev Premi2009-11-221-3/+49
| | | | | | | | | | | | | | | | | | | | | | | | The OMAP35x family has multiple variants differing in the HW features. This patch detects these features at runtime and prints information during the boot. Since most of the code seemed repetitive, macros have been used for readability. Signed-off-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * omap: Eliminate OMAP_MAX_NR_PORTSAlexander Shishkin2009-11-221-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Eliminate OMAP_MAX_NR_PORTS Note that also the null terminator entry for omap1 serial_platform_data needs to be now removed to avoid oopsing. Note that mach-omap1 uses struct plat_serial8250_port array, which requires a null terminator at the end, and that's why we need to use ARRAY_SIZE - 1. This is not needed on mach-omap2 as the array used is struct omap_uart_state, and does not use a null terminator. Signed-off-by: Alexander Shishkin <virtuoso@slind.org> Acked-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM OMAP3: RX-51 board - add initialization of gpio keysJani Nikula2009-11-221-0/+82
| | | | | | | | | | | | | | | | | | Initialize some of the RX-51 input GPIO lines as gpio keys. Enable gpio keys as a module in rx51_defconfig. Signed-off-by: Jani Nikula <ext-jani.1.nikula@nokia.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Dmitry Torokhov <dtor@mail.ru>
| * OMAP: Configure audio_mclk for twl4030-codec MFDPeter Ujfalusi2009-11-226-0/+6
| | | | | | | | | | | | | | | | | | | | audio_mclk value is going to be handled by the twl4030-codec MFD driver, configure the correct value for boards, which is using the twl4030 audio. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
| * OMAP: Platform support for twl4030_codec MFDPeter Ujfalusi2009-11-226-0/+54
| | | | | | | | | | | | | | | | | | Add needed platform data for the twl4030_codec MFD on boards, where the audio part of the twl4030 codec is used. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
| * Merge 7xx-iosplit-plat-merge with omap-fixesTony Lindgren2009-11-2282-355/+2480
| |\ | | | | | | | | | Merge branch '7xx-iosplit-plat-merge' into omap-for-linus
| | * OMAP3: PM: Added resched check into idle callsTero Kristo2009-11-112-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes a bug where scheduling is delayed until next wakeup due to race condition (e.g. interrupt requests scheduling just before omap_sram_idle is entered.) Signed-off-by: Tero Kristo <tero.kristo@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| | * OMAP3: PM: idle: Remove fclk check for idle loopPeter 'p2' De Schrijver2009-11-111-42/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes the check to see if some functional clocks are still enabled before entering sleep. This is no longer needed when using safe state (C1) that keeps CORE active. Signed-off-by: Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| | * OMAP3: PM: Use pwrdm_set_next_pwrst instead of set_pwrdm_state in idle loopJouni Hogander2009-11-112-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | It is more efficient to use pwrdm_set_next_pwrst for mpu, core and neon instead of set_pwrdm_state in idle loop. It is anyway known that those are active in idle loop. So no need to use set_pwrdm_state. Signed-off-by: Jouni Hogander <jouni.hogander@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| | * OMAP3: PM: CPUidle: Start C-state definitions from base 0Sanjeev Premi2009-11-111-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current definition of C-states starts from base 1. Whereas, the cpuidle driver uses base 0. This patch eliminates need for explicit mapping (add/ sbutract) due to different base values. Signed-off-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| | * OMAP3: PM: CPUidle: Add new lower-latency C1 statePeter 'p2' De Schrijver2009-11-111-44/+81
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch introduces a new C state which allows MPU to go to WFI but keeps the core domain active. This offers a much better wakeup latency (3us vs 10s of us for the current C1) at the cost of a higher power consumption. Signed-off-by: Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| | * OMAP3: PM: CPUidle: fix init sequencingKalle Jokiniemi2009-11-113-4/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously omap3_idle_init() was called in device_init, while omap_pm_init() is called at late_initcall. This causes the cpu idle driver to call omap_sram_idle before it is properly initialized. This patch fixes the issue by moving omap3_idle_init into omap3_pm_init. Signed-off-by: Kalle Jokiniemi <ext-kalle.jokiniemi@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| | * OMAP3: PM: CPUidle: check activity for C2, C3, correct accountingKevin Hilman2009-11-111-6/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the activity check for states C2 and C3 as well. This is primarily to prevent deeper states during UART activity. Also, if a different state is chosen than the target state, update the 'last_state' accordingly so that CPUidle state accounting is coorect. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| | * OMAP3: PM: CPUidle: obey enable_off_mode flagKevin Hilman2009-11-111-2/+12
| | | | | | | | | | | | | | | | | | | | | If 'enable_off_mode' is not set, force powerdomain states to RET instead of OFF. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| | * OMAP3: PM: CPUidle: support retention and off-mode C-statesRajendra Nayak2009-11-113-16/+20
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds support and enables state C4(MPU RET + CORE RET) and MPU OFF states (C3 and C5.) Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| | * OMAP3: PM: CPUidle: base driver and support for C1-C2Rajendra Nayak2009-11-114-2/+260
| | | | | | | | | | | | | | | | | | | | | | | | Basic CPUidle driver for OMAP3 with deepest sleep state supported being MPU CSWR. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| | * OMAP3: PM: Program SDRC to send self refresh on timeout of AUTO_CNTRajendra Nayak2009-11-112-18/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Due to an OMAP3 errata (1.142), on HS/EMU devices SDRC should be programed to issue automatic self refresh on timeout of AUTO_CNT = 1 prior to any transition to OFF mode. This is needed only on sil rev's ES3.0 and above. This patch enables the above needed WA in the SDRC power register value stored in scratchpad, so that ROM code restores this value in SDRC POWER on the wakeup path. The original SDRC POWER register value is stored and restored back in omap_sram_idle() function. This fixes some random crashes observed while stressing suspend on HS/EMU devices. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Kalle Jokiniemi <kalle.jokiniemi@digia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| | * OMAP3: PM: Enable IO-CHAIN wakeupKalle Jokiniemi2009-11-112-3/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP 3430 ES3.1 chips have a separate bit for IO daisy-chain wake up enabling. It needs to be enabled when entering retention or off state, otherwise waking up might not work in all situations. Signed-off-by: Kalle Jokiniemi <kalle.jokiniemi@digia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| | * OMAP3: PM: MPU and CORE should stay awake if there is CAM domain ACTIVETero Kristo2009-11-111-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MPU and CORE should stay awake if there is CAM domain ACTIVE. This is because that module doesn't have wake-up capability. This should replace the patch that is currently in the PM branch. Signed-off-by: Jouni Hogander <jouni.hogander@nokia.com> Signed-off-by: Tero Kristo <tero.kristo@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| | * OMAP3: PM: Prevent PER from going OFF when CORE is going INATero Kristo2009-11-111-5/+14
| | | | | | | | | | | | | | | | | | | | | OMAP3 can't generate wakeups in this state, thus it is not permitted. Signed-off-by: Tero Kristo <tero.kristo@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| | * OMAP3: PM: decouple PER and CORE context save and restoreKevin Hilman2009-11-111-22/+29
| | | | | | | | | | | | Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| | * PM debug: allow configurable wakeup from suspend on OMAP GPtimerKevin Hilman2009-11-114-0/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using debugfs, export a configurable wakeup timer to be used to wakeup system from suspend. If a non-zero value is written to /debug/pm_debug/wakeup_timer_seconds, A timer wakeup event will wake the system and resume after the configured number of seconds. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| | * OMAP3: PM debug: allow runtime toggle of PM featuresKevin Hilman2009-11-114-2/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow enable/disable of low-power states during idle. To enable low-power idle: echo 1 > /debug/pm_debug/sleep_while_idle to disable: echo 0 > /debug/pm_debug/sleep_while_idle Also allow enable/disable of OFF-mode. To enable: echo 1 > /debug/pm_debug/enable_off_mode to disable: echo 0 > /debug/pm_debug/enable_off_mode Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| | * OMAP3: PM: Wait for SDRC ready iso a blind delayPeter 'p2' De Schrijver2009-11-111-12/+36
| | | | | | | | | | | | | | | | | | | | | | | | This patch improves the wakeup SRAM code polling the SDRC to become ready instead of just waiting for a fixed amount of time. Signed-off-by: Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>