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* ARM: rockchip: Force CONFIG_PM on Rockchip systemsMarc Zyngier2018-08-241-0/+1
| | | | | | | | | | | | | A number of the Rockchip-specific drivers (IOMMU, display controllers) are now assuming that CONFIG_PM is set, and may completely misbehave if that's not the case. Since there is hardly any reason for this configuration option not to be selected anyway, let's require it (in the same way Tegra already does). Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* arch: define the ARCH_DMA_ADDR_T_64BIT config symbol in lib/KconfigChristoph Hellwig2018-05-091-1/+0
| | | | | | | | | | | Define this symbol if the architecture either uses 64-bit pointers or the PHYS_ADDR_T_64BIT is set. This covers 95% of the old arch magic. We only need an additional select for Xen on ARM (why anyway?), and we now always set ARCH_DMA_ADDR_T_64BIT on mips boards with 64-bit physical addressing instead of only doing it when highmem is set. Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: James Hogan <jhogan@kernel.org>
* ARM: rockchip: Set name of pmu regmap_config in smp codeJeffy Chen2018-03-121-0/+1
| | | | | | | | We are now allowing to register debugfs without a valid device, and not having a valid name will end up using "dummy*" to create debugfs dir. Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* Merge branch 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-armLinus Torvalds2017-09-121-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM updates from Russell King: "Low priority fixes and updates for ARM: - add some missing includes - efficiency improvements in system call entry code when tracing is enabled - ensure ARMv6+ is always built as EABI - export save_stack_trace_tsk() - fix fatal signal handling during mm fault - build translation table base address register from scratch - appropriately align the .data section to a word boundary where we rely on that data being word aligned" * 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm: ARM: 8691/1: Export save_stack_trace_tsk() ARM: 8692/1: mm: abort uaccess retries upon fatal signal ARM: 8690/1: lpae: build TTB control register value from scratch in v7_ttb_setup ARM: align .data section ARM: always enable AEABI for ARMv6+ ARM: avoid saving and restoring registers unnecessarily ARM: move PC value into r9 ARM: obtain thread info structure later ARM: use aliases for registers in entry-common ARM: 8689/1: scu: add missing errno include ARM: 8688/1: pm: add missing types include
| * Merge branches 'fixes' and 'misc' into for-linusRussell King2017-09-091-1/+2
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| * | ARM: align .data sectionRussell King2017-08-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Robert Jarzmik reports that his PXA25x system fails to boot with 4.12, failing at __flush_whole_cache in arch/arm/mm/proc-xscale.S:215: 0xc0019e20 <+0>: ldr r1, [pc, #788] 0xc0019e24 <+4>: ldr r0, [r1] <== here with r1 containing 0xc06f82cd, which is the address of "clean_addr". Examination of the System.map shows: c06f22c8 D user_pmd_table c06f22cc d __warned.19178 c06f22cd d clean_addr indicating that a .data.unlikely section has appeared just before the .data section from proc-xscale.S. According to objdump -h, it appears that our assembly files default their .data alignment to 2**0, which is bad news if the preceding .data section size is not power-of-2 aligned at link time. Add the appropriate .align directives to all assembly files in arch/arm that are missing them where we require an appropriate alignment. Reported-by: Robert Jarzmik <robert.jarzmik@free.fr> Tested-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
* | | Merge branch 'next/cleanup' into next/socOlof Johansson2017-09-061-2/+2
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * next/cleanup: soc: versatile: remove unnecessary static in realview_soc_probe() ARM: Convert to using %pOF instead of full_name ARM: hisi: Fix typo in comment ARM: OMAP4+: PRM: fix of_irq_get() result checks ARM: OMAP3+: PRM: fix of_irq_get() result check ARM: dts: dra72-evm-revc: workaround incorrect DP83867 RX_CTRL pin strap ARM: dts: dra71-evm: workaround incorrect DP83867 RX_CTRL pin strap ARM: OMAP2+: omap_device: drop broken RPM status update from suspend_noirq bus: omap-ocp2scp: Fix error handling in omap_ocp2scp_probe
| * | | ARM: Convert to using %pOF instead of full_nameRob Herring2017-08-161-2/+2
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that we have a custom printf format specifier, convert users of full_name to use %pOF instead. This is preparation to remove storing of the full path string for each node. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Acked-by: Simon Horman <horms+renesas@verge.net.au> Cc: Russell King <linux@armlinux.org.uk> Cc: Kukjin Kim <kgene@kernel.org> Cc: Javier Martinez Canillas <javier@osg.samsung.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Cc: Tony Lindgren <tony@atomide.com> Cc: "Benoît Cousson" <bcousson@baylibre.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Magnus Damm <magnus.damm@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* | | ARM: rockchip: select ARCH_DMA_ADDR_T_64BIT for LPAETao Huang2017-08-061-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Rockchip RK3288 has some 64-bit capable DMA and therefore needs dma_addr_t to be a 64-bit size. One user is the Mali GPU. Signed-off-by: Tao Huang <huangtao@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* | | ARM: rockchip: enable ZONE_DMA for non 64-bit capable peripheralsTao Huang2017-08-011-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Most IP cores on ARM Rockchip platforms can only address 32 bits of physical memory for DMA. Thus ZONE_DMA should be enabled when LPAE is activated. Signed-off-by: Tao Huang <huangtao@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* | | ARM: rockchip: explicitly request exclusive reset control in smp codePhilipp Zabel2017-07-201-1/+1
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit a53e35db70d1 ("reset: Ensure drivers are explicit when requesting reset lines") started to transition the reset control request API calls to explicitly state whether the driver needs exclusive or shared reset control behavior. Convert all drivers requesting exclusive resets to the explicit API call so the temporary transition helpers can be removed. No functional changes. Cc: Heiko Stuebner <heiko@sntech.de> Cc: linux-rockchip@lists.infradead.org Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* | Merge tag 'armsoc-soc' of ↵Linus Torvalds2017-07-041-0/+1
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform updates from Arnd Bergmann: "SoC platform changes (arch/arm/mach-*). This merge window, the bulk is for a few platforms: - Andres Färber adds initial support for the Actions Semi S500 (aka 'owl') platform, a close relative of the S900 platform he adds for arm64. - in mach-omap2, we remove more legacy code - Rockchips gains support for the RV1108 SoC designed for camera applications. - For Atmel, we gain support for MMU-less SoCs (SAME70/V71/S70/V70) - Minor updates for other platforms, including davinci, s3c64xx, prima2, stm32, broadcom nsp, amlogic, pxa, imx and renesas" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (74 commits) ARM: owl: smp: Drop bogus holding pen ARM: owl: Drop custom machine ARM: owl: smp: Implement SPS power-gating for CPU2 and CPU3 soc: actions: owl-sps: Factor out owl_sps_set_pg() for power-gating soc: actions: Add Owl SPS dt-bindings: power: Add Owl SPS power domains MAINTAINERS: Update Actions Semi section with SPS ARM: owl: Implement CPU enable-method for S500 MAINTAINERS: Add Actions Semi Owl section ARM: Prepare Actions Semi S500 ARM: socfpga: Increase max number of GPIOs ARM: stm32: Introduce MACH_STM32F469 flag ARM: prima2: remove redundant select CPU_V7 ARM: davinci: fix const warnings ARM: shmobile: pm-rmobile: Use GENPD_FLAG_ALWAYS_ON ARM: OMAP4: hwmod_data: add SHAM crypto accelerator ARM: OMAP4: hwmod data: add des ARM: OMAP4: hwmod data: add aes2 ARM: OMAP4: hwmod data: add aes1 ARM: pxa: Delete an error message for a failed memory allocation in pxa3xx_u2d_probe() ...
| * | ARM: rockchip: enable support for RV1108 SoCAndy Yan2017-05-141-0/+1
| |/ | | | | | | | | | | | | | | Add a rockchip,rv1108 compatible. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> [rk1108->rv1108 rename] Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* / clocksource/drivers: Rename clocksource_probe to timer_probeDaniel Lezcano2017-06-141-1/+1
|/ | | | | | | | | | The function name is now renamed to 'timer_probe' for consistency with the CLOCKSOURCE_OF_DECLARE => TIMER_OF_DECLARE change. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
* Merge branch 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-armLinus Torvalds2017-02-282-3/+3
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM updates from Russell King: - nommu updates from Afzal Mohammed cleaning up the vectors support - allow DMA memory "mapping" for nommu Benjamin Gaignard - fixing a correctness issue with R_ARM_PREL31 relocations in the module linker - add strlen() prototype for the decompressor - support for DEBUG_VIRTUAL from Florian Fainelli - adjusting memory bounds after memory reservations have been registered - unipher cache handling updates from Masahiro Yamada - initrd and Thumb Kconfig cleanups * 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm: (23 commits) ARM: mm: round the initrd reservation to page boundaries ARM: mm: clean up initrd initialisation ARM: mm: move initrd init code out of arm_memblock_init() ARM: 8655/1: improve NOMMU definition of pgprot_*() ARM: 8654/1: decompressor: add strlen prototype ARM: 8652/1: cache-uniphier: clean up active way setup code ARM: 8651/1: cache-uniphier: include <linux/errno.h> instead of <linux/types.h> ARM: 8650/1: module: handle negative R_ARM_PREL31 addends correctly ARM: 8649/2: nommu: remove Hivecs configuration is asm ARM: 8648/2: nommu: display vectors base ARM: 8647/2: nommu: dynamic exception base address setting ARM: 8646/1: mmu: decouple VECTORS_BASE from Kconfig ARM: 8644/1: Reduce "CPU: shutdown" message to debug level ARM: 8641/1: treewide: Replace uses of virt_to_phys with __pa_symbol ARM: 8640/1: Add support for CONFIG_DEBUG_VIRTUAL ARM: 8639/1: Define KERNEL_START and KERNEL_END ARM: 8638/1: mtd: lart: Rename partition defines to be prefixed with PART_ ARM: 8637/1: Adjust memory boundaries after reservations ARM: 8636/1: Cleanup sanity_check_meminfo ARM: add CPU_THUMB_CAPABLE to indicate possible Thumb support ...
| * ARM: 8641/1: treewide: Replace uses of virt_to_phys with __pa_symbolFlorian Fainelli2017-02-282-3/+3
| | | | | | | | | | | | | | | | | | | | | | All low-level PM/SMP code using virt_to_phys() should actually use __pa_symbol() against kernel symbols. Update code where relevant to move away from virt_to_phys(). Acked-by: Russell King <rmk+kernel@armlinux.org.uk> Reviewed-by: Laura Abbott <labbott@redhat.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: rockchip: drop rk3288 jtag/mmc switch handlingHeiko Stuebner2017-01-061-12/+0
|/ | | | | | | | | We moved that functionality to a more generic place where it can also be used for other socs, so drop it from architecture code. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
* Merge tag 'armsoc-cleanup' of ↵Linus Torvalds2016-08-021-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC cleanups from Olof Johansson: "The cleanup branch keeps going down in size as we've completed a lot of the major legacy platform removals and conversions. A handful of changes this time around, some of the themes or larger sets are: - A bunch of i.MX cleanups around platform detection, init call cleanups - Misc fixes of missing/implicit includes - Removal of ARCH_[WANT_OPTIONAL|REQUIRE]_GPIOLIB" * tag 'armsoc-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (40 commits) ARM: mps2: fix typo ARM: s3c64xx: avoid warning about 'struct device_node' bus: mvebu-mbus: make mvebu_mbus_syscore_ops static bus: mvebu-mbus: fix __iomem on register pointers ARM: tegra: Remove board_init_funcs array ARM: iop: Fix indentation ARM: imx: remove cpu_is_mx*() ARM: imx: remove last call to cpu_is_mx5* ARM: imx: rework mx27_pm_init() call ARM: imx: deconstruct mx3_idle ARM: imx: deconstruct mxc_rnga initialization ARM: imx: remove cpu_is_mx1 check ARM: i.MX: Do not explicitly call l2x0_of_init() ARM: i.MX: system.c: Tweak prefetch settings for performance ARM: i.MX: system.c: Replace magic numbers ARM: i.MX: system.c: Remove redundant errata 752271 code ARM: i.MX: system.c: Convert goto to if statement ARM: Kirkwood: fix kirkwood_pm_init() declaration/type ARM: Kirkwood: make kirkwood_disable_mbus_error_propagation() static ARM: orion5x: make orion5x_legacy_handle_irq static ...
| * ARM: do away with ARCH_[WANT_OPTIONAL|REQUIRE]_GPIOLIBLinus Walleij2016-06-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This replaces: - "select ARCH_REQUIRE_GPIOLIB" with "select GPIOLIB" as this can now be selected directly. - "select ARCH_WANT_OPTIONAL_GPIOLIB" with no dependency: GPIOLIB is now selectable by everyone, so we need not declare our intent to select it. When ordering the symbols the following rationale was used: if the selects were in alphabetical order, I moved select GPIOLIB to be in alphabetical order, but if the selects were not maintained in alphabetical order, I just replaced "select ARCH_REQUIRE_GPIOLIB" with "select GPIOLIB". Cc: Michael Büsch <m@bues.ch> Cc: arm@kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
* | arm: Remove unnecessary of_platform_populate with default match tableKefeng Wang2016-06-231-1/+0
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | After patch "of/platform: Add common method to populate default bus", it is possible for arch code to remove unnecessary callers of of_platform_populate with default match table. Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Ray Jui <rjui@broadcom.com> Cc: Lee Jones <lee@kernel.org> Cc: Krzysztof Halasa <khalasa@piap.pl> Cc: Kukjin Kim <kgene@kernel.org> Cc: Rob Herring <robh@kernel.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Santosh Shilimkar <ssantosh@kernel.org> Cc: Roland Stigge <stigge@antcom.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Haojian Zhuang <haojian.zhuang@gmail.com> Cc: Heiko Stuebner <heiko@sntech.de> Cc: Viresh Kumar <vireshk@kernel.org> Cc: Shiraz Hashim <shiraz.linux.kernel@gmail.com> Cc: Tony Prisk <linux@prisktech.co.nz> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Rob Herring <robh@kernel.org>
* Merge tag 'armsoc-cleanups-fixes' of ↵Linus Torvalds2016-05-181-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC cleanups and fixes from Arnd Bergmann: "Traditionally we've had two separate branches for cleanups and non-critical bug fixes, but both of these got smaller with each release and the differences are rather unclear now, so it seems more appropriate to have a combined branch. The most notable change is for OMAP, which gets a small rework to simplify handling of the AUXDATA mechanism used on machines that are not completely DT based yet, along with other work that is used as preparation for dropping the legacy board files" * tag 'armsoc-cleanups-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: dts: exynos: Add interrupt line to MAX8997 PMIC on exynos4210-trats ARM: dts: exynos: Fix regulator name to avoid forbidden character on exynos4210-trats ARM: dts: exynos: Add MFC memory banks for Peach boards ARM: OMAP2+: n900 needs MMC slot names for legacy user space ARM: OMAP2+: Add more functions to pwm pdata for ir-rx51 ARM: debug: remove extraneous DEBUG_HI3716_UART option ARM: OMAP2+: Simplify auxdata by using the generic match of/platform: Allow secondary compatible match in of_dev_lookup ARM: davinci: use IRQCHIP_DECLARE for cp_intc ARM: davinci: remove unused DA8XX_NUM_UARTS ARM: davinci: simplify call to of populate ARM: DaVinci USB: removed deprecated properties from MUSB config ARM: rockchip: Fix use of plain integer as NULL pointer ARM: realview: hide unused 'pmu_device' object soc: versatile: dynamically detect RealView HBI numbers
| * ARM: rockchip: Fix use of plain integer as NULL pointerPeter Griffin2016-04-121-1/+1
| | | | | | | | | | | | | | | | | | | | This fixes the following sparse build warning: mach-rockchip/platsmp.c:68:43: Using plain integer as NULL pointer Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* | cpufreq: rockchip: Use generic platdev driverFinley Xiao2016-04-251-1/+0
|/ | | | | | | | | | | | This patch add rockchip's compatible string to the compat list and remove similar code from platform code for supporting generic platdev driver. Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* Merge branch 'treewide/cleanup' into next/socOlof Johansson2015-12-222-2/+3
|\ | | | | | | | | | | | | | | | | | | | | | | Merge in cleanup to avoid internal conflicts with newly added code. * treewide/cleanup: ARM: use "depends on" for SoC configs instead of "if" after prompt ARM/clocksource: use automatic DT probing for ux500 PRCMU ARM: use const and __initconst for smp_operations ARM: hisi: do not export smp_operations structures Signed-off-by: Olof Johansson <olof@lixom.net>
| * ARM: use "depends on" for SoC configs instead of "if" after promptMasahiro Yamada2015-12-011-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Many ARM sub-architectures use prompts followed by "if" conditional, but it is wrong. Please notice the difference between config ARCH_FOO bool "Foo SoCs" if ARCH_MULTI_V7 and config ARCH_FOO bool "Foo SoCs" depends on ARCH_MULTI_V7 These two are *not* equivalent! In the former statement, it is not ARCH_FOO, but its prompt that depends on ARCH_MULTI_V7. So, it is completely valid that ARCH_FOO is selected by another, but ARCH_MULTI_V7 is still disabled. As it is not unmet dependency, Kconfig never warns. This is probably not what you want. The former should be used only when you need to do so, and you really understand what you are doing. (In most cases, it should be wrong!) For enabling/disabling sub-architectures, the latter is always correct. As a good side effect, this commit fixes some entries over 80 columns (mach-imx, mach-integrator, mach-mbevu). [Arnd: I note that there is not really a bug here, according to the discussion that followed, but I can see value in being consistent and in making the lines shorter] Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Patrice Chotard <patrice.chotard@st.com> Acked-by: Liviu Dudau <Liviu.Dudau@arm.com> Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Acked-by: Jun Nie <jun.nie@linaro.org> Acked-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Krzysztof Halasa <khc@piap.pl> Acked-by: Maxime Coquelin <maxime.coquelin@st.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * ARM: use const and __initconst for smp_operationsMasahiro Yamada2015-12-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These smp_operations structures are not over-written, so add "const" qualifier and replace __initdata with __initconst. Also, add "static" where it is possible. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Moritz Fischer <moritz.fischer@ettus.com> Acked-by: Stephen Boyd <sboyd@codeaurora.org> # qcom part Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Patrice Chotard <patrice.chotard@st.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Wei Xu <xuwei5@hisilicon.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Acked-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Nicolas Pitre <nico@linaro.org> Acked-by: Liviu Dudau <Liviu.Dudau@arm.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* | ARM: rockchip: enable support for RK3228 SoCsJeffy Chen2015-12-161-0/+1
| | | | | | | | | | | | | | Add a rockchip,rk3228 compatible. Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* | ARM: rockchip: use const and __initconst for rk3036 smp_operationsHeiko Stuebner2015-12-161-1/+1
| | | | | | | | | | | | | | | | The newly added rk3036 smp operations missed the wholesale fixup from Masahiro Yamada. So fix that now. Reported-by: Mark Brown <broonie@kernel.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* | ARM: rockchip: add support smp for rk3036Heiko Stuebner2015-11-191-12/+33
|/ | | | | | | | | | | | | | The dual-core Cortex A7 rk3036 is a bit special in that it does not allow to control the actual powerdomain of the cpu cores, while the rest of the smp-bringup like reset control and entry address handling stays the same. Its bigger sibling, the quad-core rk3128 again allows powerdomain control. So allow that case by introducing a separate smp-enable-method, that simply disables powerdomain handling in the common code. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Xing Zheng <zhengxing@rock-chips.com> Acked-by: Rob Herring <robh@kernel.org>
* clocksource: cosmetic: Drop OF 'dependency' from symbolsMarc Zyngier2015-10-011-1/+1
| | | | | | | | | | | | | Seeing the 'of' characters in a symbol that is being called from ACPI seems to freak out people. So let's do a bit of pointless renaming so that these folks do feel at home. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Reviewed-by: Hanjun Guo <hanjun.guo@linaro.org> Acked-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Hanjun Guo <hanjun.guo@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* ARM: rockchip: pm: Fix PTR_ERR() argumentFabio Estevam2015-08-241-2/+2
| | | | | | | | | | | PTR_ERR should access the value just tested by IS_ERR. The semantic patch that makes this change is available in scripts/coccinelle/tests/odd_ptr_err.cocci. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* ARM: rockchip: enable PMU_GPIOINT_WAKEUP_EN when entering shallow suspendHeiko Stuebner2015-08-062-3/+7
| | | | | | | | | | | | | | PMU_GPIOINT_WAKEUP_EN seems needed when entering the shallow suspend (with logic staying on) but does not seem to be needed for the deep suspend for unknown reasons. Testing revealed that this setting really is necessary to reliably resume the veyron devices from suspend. Reported-by: Chris Zhong <zyw@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Chris Zhong <zyw@rock-chips.com> Tested-by: Chris Zhong <zyw@rock-chips.com> Reviewed-by: Douglas Anderson <dianders@chromium.org>
* ARM: rockchip: set correct stabilization thresholds in suspendHeiko Stuebner2015-08-062-7/+19
| | | | | | | | | | | | | | | | | | Currently the stabilization thresholds for the oscillator and external pmu are statically set to 30ms based on a 32kHz clock rate. This leaves out the case when we don't switch to the 32kHz clock when only entering the shallow suspend mode where the logic keeps running. So, set the correct threshold after we have determined if we switch to the 32kHz clock or stay with the 24MHz one. Also set the oscillator- stabilization to 0 if it is kept running during suspend, as it of course does not need to stabilize then. Reported-by: Chris Zhong <zyw@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Chris Zhong <zyw@rock-chips.com> Tested-by: Chris Zhong <zyw@rock-chips.com> Reviewed-by: Douglas Anderson <dianders@chromium.org>
* ARM: rockchip: rename osc_switch_to_32k variableHeiko Stuebner2015-08-061-2/+2
| | | | | | | | | | | | | The variable name is misleading, as the deep suspend mode always switches the main supplying clock to the 32kHz source. Additionally the main oscillator remains running in some cases, which this var indicates. So rename it to osc_disable to clarity. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Chris Zhong <zyw@rock-chips.com> Tested-by: Chris Zhong <zyw@rock-chips.com> Reviewed-by: Douglas Anderson <dianders@chromium.org>
* ARM: rockchip: fix broken buildCaesar Wang2015-07-061-2/+1
| | | | | | | | | | | | | | | | | | | | | | The following was seen in branch[0] build. arch/arm/mach-rockchip/platsmp.c:154:23: error: 'rockchip_secondary_startup' undeclared (first use in this function) branch[0]: git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git v4.3-armsoc/soc The broken build is caused by the commit fe4407c0dc58 ("ARM: rockchip: fix the CPU soft reset"). Signed-off-by: Caesar Wang <wxt@rock-chips.com> The breakage was a result of it being wrongly merged in my branch with the cache invalidation rework from Russell 02b4e2756e01c ("ARM: v7 setup function should invalidate L1 cache"). Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* ARM: rockchip: remove some useless macro in pm.hChris Zhong2015-07-061-7/+0
| | | | | | | | | These are actually not used in the pm code, as we moved suspend handling to the clock driver, remove them here. Signed-off-by: Chris Zhong <zyw@rock-chips.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* ARM: rockchip: add support holding 24Mhz osc during suspendChris Zhong2015-07-061-2/+38
| | | | | | | | | | | If we want to wake up system via usb, the 24Mhz osc could not be disabled during suspend, read the usb phy SIDDQ bit to decide whether to switch to 32khz clock-in. Signed-off-by: Chris Zhong <zyw@rock-chips.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Tested-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* ARM: rockchip: fix the SMP code styleCaesar Wang2015-07-061-6/+8
| | | | | | | | | | Use the below scripts to check: scripts/checkpatch.pl -f --subject arch/arm/mach-rockchip/platsmp.c Signed-off-by: Caesar Wang <wxt@rock-chips.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* ARM: rockchip: ensure CPU to enter WFI/WFE stateCaesar Wang2015-07-061-0/+7
| | | | | | | | | | | | | | The patch can ensure that v7_exit_coherency_flush() in rockchip_cpu_die() executed in time. The mdelay(1) has enough time to fix the problem of CPU offlining. That's a workaround way in rockchip hotplug code, At least, we haven't a better way to solve it. Who know, that maybe fixed by chip (hardware) in the future. Signed-off-by: Caesar Wang <wxt@rock-chips.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* ARM: rockchip: fix the CPU soft resetCaesar Wang2015-07-061-18/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We need different orderings when turning a core on and turning a core off. In one case we need to assert reset before turning power off. In ther other case we need to turn power on and the deassert reset. In general, the correct flow is: CPU off: reset_control_assert regmap_update_bits(pmu, PMU_PWRDN_CON, BIT(pd), BIT(pd)) wait_for_power_domain_to_turn_off CPU on: regmap_update_bits(pmu, PMU_PWRDN_CON, BIT(pd), 0) wait_for_power_domain_to_turn_on reset_control_deassert This is needed for stressing CPU up/down, as per: cd /sys/devices/system/cpu/ for i in $(seq 10000); do echo "================= $i ============" for j in $(seq 100); do while [[ "$(cat cpu1/online)$(cat cpu2/online)$(cat cpu3/online)" != "000"" ]] echo 0 > cpu1/online echo 0 > cpu2/online echo 0 > cpu3/online done while [[ "$(cat cpu1/online)$(cat cpu2/online)$(cat cpu3/online)" != "111" ]]; do echo 1 > cpu1/online echo 1 > cpu2/online echo 1 > cpu3/online done done done The following is reproducable log: [34466.186812] PM: noirq suspend of devices complete after 0.669 msecs [34466.186824] Disabling non-boot CPUs ... [34466.187509] CPU1: shutdown [34466.188672] CPU2: shutdown [34473.736627] Kernel panic - not syncing:Watchdog detected hard LOCKUP on cpu 0 ....... or others similar log: ....... [ 4072.454453] CPU1: shutdown [ 4072.504436] CPU2: shutdown [ 4072.554426] CPU3: shutdown [ 4072.577827] CPU1: Booted secondary processor [ 4072.582611] CPU2: Booted secondary processor <hang> Tested by cpu up/down scripts, the results told us need delay more time before write the sram. The wait time is affected by many aspects (e.g: cpu frequency, bootrom frequency, sram frequency, bus speed, ...). Although the cpus other than cpu0 will write the sram, the speedy is no the same as cpu0, if the cpu0 early wake up, perhaps the other cpus can't startup. As we know, the cpu0 can wake up when the cpu1/2/3 write the 'sram+4/8' and send the sev. Anyway..... At the moment, 1ms delay will be happy work for cpu up/down scripts test. Signed-off-by: Caesar Wang <wxt@rock-chips.com> Reviewed-by: Doug Anderson <dianders@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Fixes: 3ee851e212d0 ("ARM: rockchip: add basic smp support for rk3288") Cc: stable@vger.kernel.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* ARM: rockchip: restore dapswjdp after suspendDoug Anderson2015-07-061-0/+5
| | | | | | | | | | | | | | | In the commit (0ea001d ARM: rockchip: disable dapswjdp during suspend) we made the assumption that we didn't need to restore dapswjdp after suspend because "the MASKROM will enable it back". It turns out that's not a safe assumption. In some cases (pending interrupts) it's possible that the WFI might act as a no-op and the MaskROM will never run. Since we're changing the bit, we should restore it ourselves. Signed-off-by: Doug Anderson <dianders@chromium.org> Reviewed-by: Chris Zhong <zyw@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* Merge tag 'cpuinit-v4.1-rc8' of ↵Linus Torvalds2015-07-021-2/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/paulg/linux Pull __cpuinit removal from Paul Gortmaker: "Remove __cpuinit macros and users. We removed the __cpuinit stuff in 3.11-rc1 with commit 22f0a2736774 ("init.h: remove __cpuinit sections from the kernel") but we left some no-op stubs as a courtesy to unmerged code. Here we get rid of the stubs as well, since (as can be seen in these changes) they are enabling use cases to sneak back in, primarily from older BSP code that has been living out of tree for some time prior to getting mainlined. So we get rid of these "new" users 1st and then get rid of the stubs. Obviously, getting rid of the stubs can't happen until all the users are gone, so I had to keep this together as a series, even though some of these commits since got picked up into maintainers trees as well. The nature of this change is such that it should have zero impact on the generated runtime. This is one of several independent cleanup branches aimed at enabling better organization in the init.h and module.h code. They have been getting coverage in the linux-next tree for the last month, in addition to my local testing, which also covers approximately a half dozen or more architectures" * tag 'cpuinit-v4.1-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/paulg/linux: init: delete the __cpuinit related stubs kernel/cpu.c: remove new instance of __cpuinit that crept back in sched/core: remove __cpuinit section tag that crept back in. mips/mm/tlbex: remove new instance of __cpuinit that crept back in mips/c-r4k: remove legacy __cpuinit section that crept in mips/bcm77xx: remove legacy __cpuinit sections that crept in mips/ath25: remove legacy __cpuinit section that crept in arm/mach-hisi: remove legacy __CPUINIT section that crept in arm/mach-rockchip: remove legacy __cpuinit section that crept in arm/mach-mvebu: remove legacy __cpuinit sections that crept in arm/mach-keystone: remove legacy __cpuinit sections that crept in
| * arm/mach-rockchip: remove legacy __cpuinit section that crept inPaul Gortmaker2015-06-161-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | We removed __cpuinit support (leaving no-op stubs) quite some time ago. However this one crept back in as of commit a7a2b3118b410fb3cd3a8363b1 ("ARM: rockchip: add smp bringup code"). Since we want to clobber the stubs soon, get this removed now. Cc: Heiko Stuebner <heiko@sntech.de> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
* | Merge tag 'armsoc-cleanup' of ↵Linus Torvalds2015-06-263-12/+2
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC cleanups from Kevin Hilman: "A relatively small setup of cleanups this time around, and similar to last time the bulk of it is removal of legacy board support: - OMAP: removal of legacy (non-DT) booting for several platforms - i.MX: remove some legacy board files" * tag 'armsoc-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (36 commits) ARM: fix EFM32 build breakage caused by cpu_resume_arm ARM: 8389/1: Add cpu_resume_arm() for firmwares that resume in ARM state ARM: v7 setup function should invalidate L1 cache mach-omap2: Remove use of deprecated marco, PTR_RET in devices.c ARM: OMAP2+: Remove calls to deprecacted marco,PTR_RET in the files,fb.c and pmu.c ARM: OMAP2+: Constify irq_domain_ops ARM: OMAP2+: use symbolic defines for console loglevels instead of numbers ARM: at91: remove useless Makefile.boot ARM: at91: remove at91rm9200_sdramc.h ARM: at91: remove mach/at91_ramc.h and mach/at91rm9200_mc.h ARM: at91/pm: use the atmel-mc syscon defines pcmcia: at91_cf: Use syscon to configure the MC/smc ARM: at91: declare the at91rm9200 memory controller as a syscon mfd: syscon: Add Atmel MC (Memory Controller) registers definition ARM: at91: drop sam9_smc.c ata: at91: use syscon to configure the smc ARM: ux500: delete static resource defines ARM: ux500: rename ux500_map_io ARM: ux500: look up PRCMU resource from DT ARM: ux500: kill off L2CC static map ...
| * Merge branch 'for-arm-soc' of ↵Kevin Hilman2015-06-123-12/+2
| |\ | | | | | | | | | | | | | | | | | | | | | | | | http://ftp.arm.linux.org.uk/pub/armlinux/kernel/git-cur/linux-2.6-arm into next/cleanup * 'for-arm-soc' of http://ftp.arm.linux.org.uk/pub/armlinux/kernel/git-cur/linux-2.6-arm: ARM: fix EFM32 build breakage caused by cpu_resume_arm ARM: 8389/1: Add cpu_resume_arm() for firmwares that resume in ARM state ARM: v7 setup function should invalidate L1 cache
| | * ARM: v7 setup function should invalidate L1 cacheRussell King2015-06-013-12/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All ARMv5 and older CPUs invalidate their caches in the early assembly setup function, prior to enabling the MMU. This is because the L1 cache should not contain any data relevant to the execution of the kernel at this point; all data should have been flushed out to memory. This requirement should also be true for ARMv6 and ARMv7 CPUs - indeed, these typically do not search their caches when caching is disabled (as it needs to be when the MMU is disabled) so this change should be safe. ARMv7 allows there to be CPUs which search their caches while caching is disabled, and it's permitted that the cache is uninitialised at boot; for these, the architecture reference manual requires that an implementation specific code sequence is used immediately after reset to ensure that the cache is placed into a sane state. Such functionality is definitely outside the remit of the Linux kernel, and must be done by the SoC's firmware before _any_ CPU gets to the Linux kernel. Changing the data cache clean+invalidate to a mere invalidate allows us to get rid of a lot of platform specific hacks around this issue for their secondary CPU bringup paths - some of which were buggy. Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Tested-by: Florian Fainelli <f.fainelli@gmail.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Michal Simek <michal.simek@xilinx.com> Tested-by: Wei Xu <xuwei5@hisilicon.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | Revert "ARM: rockchip: fix undefined instruction of reset_ctrl_regs"Heiko Stuebner2015-05-132-30/+0
|/ / | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit b403125d3bbf8046c1186e1a49cb17bb5551db14. As reported by Chris, both commits b403125 "ARM: rockchip: fix undefined instruction of reset_ctrl_regs" 0ea001d "ARM: rockchip: disable dapswjdp during suspend" actually fix the same issue and b403125 is the older one, which got superseded by 0ea001d. Therefore revert the obsolete one again. Reported-by: Chris Zhong <zyw@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* | rockchip: make sure timer7 is enabled on rk3288 platformsHeiko Stuebner2015-04-161-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | timer7 supplies the architected timer and thus as has to run when the system clocksource and clockevents drivers are registered. While it should be the responsibility of the bootloader to do this, and there exists a fix in a community u-boot, all u-boot based systems that actually shipped have the mentioned issue. Therefore to not require every developer to update their u-boot, add a snippet for this, enabling the timer early in the kernel. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* | ARM: rockchip: fix undefined instruction of reset_ctrl_regsChris Zhong2015-04-162-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sometimes the debug module may not work well after resume, since it has not been correctly reset when wakeup from suspend. That cause system crash during reusme, and a 'undefined instruction' is displayed on the console. Set the GRF_FORCE_JTAG bit of RK3288_GRF_SOC_CON0 can ensure that debug modul is reset. And we can change the value of RK3288_GRF_SOC_CON0 back when system resume. Signed-off-by: Chris Zhong <zyw@rock-chips.com> Tested-by: Caesar Wang <wxt@rock-chips.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> According to discussions, there does not seem a better solution available. Please also see the potential security implication described in the comment inline in the code. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* | ARM: rockchip: disable dapswjdp during suspendChris Zhong2015-04-162-0/+11
|/ | | | | | | | | | | | | | | Reset dapswjdp is controlled by JTAG_TRSTN, if the iomux of this pin is not "jtag_trstn". the AP would think this pin is always high, so it can not reset before resume. When system resume, but the dapswjdp is not in a default state, it may Access some illegal address, it cause system crash during resume. Let's disable this jtag function by clear the dapdeviceen bit, it prohibit the dapswjdp to access memory and registers. This bit would be enable in MASKROM, so we need clear it in suspend everytime. Signed-off-by: Chris Zhong <zyw@rock-chips.com> Reviewed-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-13 05:02:10 +0100