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* ARM: shmobile: Replace <linux/clk-provider.h> by <linux/of_clk.h>Geert Uytterhoeven2020-02-171-1/+1
| | | | | | | | | | | The R-Car Gen2 platform code is not a clock provider, and just needs to call of_clk_init(). Hence it can include <linux/of_clk.h> instead of <linux/clk-provider.h>. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Link: https://lore.kernel.org/r/20200212100830.446-6-geert+renesas@glider.be
* ARM: shmobile: Enable ARM_GLOBAL_TIMER on Cortex-A9 MPCore SoCsGeert Uytterhoeven2020-02-102-2/+0
| | | | | | | | | | | | | | | | | | SH-Mobile AG5 and R-Car H1 SoCs are based on the Cortex-A9 MPCore, which includes a global timer. Enable the ARM global timer on these SoCs, which will be used for: - the scheduler clock, improving scheduler accuracy from 10 ms to 3 or 4 ns, - delay loops, allowing removal of calls to shmobile_init_delay() from the corresponding machine vectors. Note that when using an old DTB lacking the global timer, the kernel will still work. However, loops-per-jiffies will no longer be preset, and the delay loop will need to be calibrated during boot. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20191211135222.26770-5-geert+renesas@glider.be
* remove ioremap_nocache and devm_ioremap_nocacheChristoph Hellwig2020-01-064-7/+7
| | | | | | | | ioremap has provided non-cached semantics by default since the Linux 2.6 days, so remove the additional ioremap_nocache interface. Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: Arnd Bergmann <arnd@arndb.de>
* ARM: shmobile: rcar-gen2: Drop legacy DT clock supportGeert Uytterhoeven2019-10-251-1/+0
| | | | | | | | | | | | | | As of commit 362b334b17943d84 ("ARM: dts: r8a7791: Convert to new CPG/MSSR bindings"), all upstream R-Car Gen2 device tree source files use the unified "Renesas Clock Pulse Generator / Module Standby and Software Reset" DT bindings. Hence remove backward compatibility with old R-Car Gen2 device trees describing a hierarchical representation of the various CPG and MSTP clocks. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20191016150939.30620-1-geert+renesas@glider.be
* ARM: mach-shmobile: Don't init CNTVOFF/counter if PSCI is availableOleksandr Tyshchenko2019-05-311-0/+17
| | | | | | | | | | | | | | | | | | | | If PSCI is available then most likely we are running on PSCI-enabled U-Boot which, we assume, has already taken care of resetting CNTVOFF and updating counter module before switching to non-secure mode and we don't need to. As the psci_smp_available() helper always returns false if CONFIG_SMP is disabled, it can't be used safely as an indicator of PSCI usage. For that reason, we check for the mandatory PSCI operation to be available. Please note, an extra check to prevent secure_cntvoff_init() from being called for secondary CPUs in headsmp-apmu.S is not needed, as SMP code for APMU based system is not executed if PSCI is in use. Signed-off-by: Oleksandr Tyshchenko <oleksandr_tyshchenko@epam.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: fix a leaked reference by adding missing of_node_putWen Yang2019-03-181-0/+1
| | | | | | | | | | | | | | | | The call to of_get_next_child returns a node pointer with refcount incremented thus it must be explicitly decremented after the last usage. Detected by coccinelle with the following warnings: ./arch/arm/mach-shmobile/pm-rcar-gen2.c:77:2-8: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 66, but without a corresponding object release within this function. ./arch/arm/mach-shmobile/pm-rcar-gen2.c:85:2-8: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 66, but without a corresponding object release within this function. ./arch/arm/mach-shmobile/pm-rcar-gen2.c:90:2-8: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 66, but without a corresponding object release within this function. Signed-off-by: Wen Yang <wen.yang99@zte.com.cn> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: porter: enable R-Car Gen2 regulator quirkMarek Vasut2019-03-181-2/+4
| | | | | | | | | | | | Porter needs the regulator quirk, just like the other boards. But unlike the other boards, the Porter uses DA9063L, which is at 0x5a. Otherwise, DA9063L and DA9210 IRQ line is still connected to CPU IRQ2 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: Fix R-Car Gen2 regulator quirkMarek Vasut2019-01-071-0/+5
| | | | | | | | | | | | | | | | | The quirk code currently detects all compatible I2C chips with a shared IRQ line on all I2C busses, adds them into a list, and registers a bus notifier. For every chip for which the bus notifier triggers, the quirk code performs I2C transfer on that I2C bus for all addresses in the list. The problem is that this may generate transfers to non-existing chips on systems with multiple I2C busses. This patch adds a check to verify that the I2C bus to which the chip with shared IRQ is attached to matches the I2C bus of the chip which triggered the bus notifier and only starts the I2C transfer if they match. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Tested-by: Nguyen Viet Dung <dung.nguyen.aj@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: R-Mobile: Move pm-rmobile to drivers/soc/renesas/Geert Uytterhoeven2018-11-303-358/+0
| | | | | | | | | | | | | | The pm-rmobile driver is really a driver for the System Controller (SYSC) found in R-Mobile SoCs. An equivalent driver for R-Car SoCs is already located under drivers/soc/renesas/. Hence move the pm-rmobile driver from arch/arm/mach-shmobile/ to drivers/soc/renesas/, and rename it to rmobile-sysc. Enable compile-testing on non-ARM and non-R-Mobile SoCs. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: R-Mobile: Clean up struct rmobile_pm_domainGeert Uytterhoeven2018-11-302-41/+18
| | | | | | | | | | | | | | | | Commit 59b89af1d5551c12 ("ARM: shmobile: sh7372: Remove Legacy C SoC code") removed the last user of the rmobile_pm_domain.resume() callback. Commit 44d88c754e57a6d9 ("ARM: shmobile: Remove legacy SoC code for R-Mobile A1") removed the last user of the rmobile_pm_domain.no_debug flag and of the "pm-rmobile.h" header file (outside the actual driver). Hence remove no longer used rmobile_pm_domain members, and absorb the header file into the driver. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: Move SoC Kconfig symbols to drivers/soc/renesas/Geert Uytterhoeven2018-11-161-126/+0
| | | | | | | | For consistency with arm64, where vendors have a single Kconfig symbol in arch/arm64/Kconfig.platforms. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: Hide ARCH_RZN1 to improve consistencyGeert Uytterhoeven2018-11-161-5/+4
| | | | | | | | | | | | | | Unlike all other family-specific Kconfig symbols for Renesas ARM SoCs, ARCH_RZN1 is user-visible. As this symbol is already selected by the SoC-specific ARCH_R9A06G032 symbol, there is no need for that. Hide ARCH_RZN1 from the user, and move it up, where all other family-specific Kconfig symbols live. Drop the select of CPU_V7, as this is already implied by the dependency of ARCH_RENESAS on ARCH_MULTI_V7. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: sh73a0: Remove obsolete inclusion of <asm/smp_twd.h>Geert Uytterhoeven2018-11-161-1/+0
| | | | | | | | As of commit 9a9863987bf7307f ("ARM: shmobile: Remove legacy SoC code for SH-Mobile AG5"), this header file is no longer used. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: Restrict TWD support to SoCs that have itGeert Uytterhoeven2018-11-161-1/+2
| | | | | | | | | | | Currently support for the ARM Timer and Watchdog Unit is included unconditionally, while only some Renesas multicore Cortex-A9 SoCs have a TWD. This decreases kernel image size by ca. 2 KiB on SoCs without a TWD. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: Restrict SCU support to SoCs that have itGeert Uytterhoeven2018-11-161-1/+3
| | | | | | | | | | | | Currently support for the ARM Cortex-A9 Snoop Control Unit is included unconditionally, while only Renesas multicore Cortex-A9 SoCs have this kind of SCU. This decreases kernel image size by ca. 300 bytes on SoCs without such an SCU. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* Merge tag 'armsoc-soc' of ↵Linus Torvalds2018-10-2914-95/+132
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform updates from Arnd Bergmann: "A couple of platforms change hands in the MAINTAINERS file: - Linus Walleij lists himself for the ARM Reference platforms: versatile, vexpress, integrator and realview. He has been the main contributor for these for a while, and makes it official now. - Vladimir Zapolskiy takes over the LPC18xx platform from Joachim Eastwood - Manivannan Sadhasivam becomes a secondary maintainer for the Actions Semi machines - Nicolas Ferre lists updates the MAINTAINER listing for the AT91 platform: Ludovic Desroches is now a co-maintainer for the platform, and several other people (Claudiu Beznea, Cristian Birsan, Eugen Hristev, Codrin Ciubotariu) take over individual device drivers. Thanks everyone for working on this, and welcome to the new maintainers! The "virt" platform on qemy or kvm can now be used in big-endian mode without additional tricks, thanks to Jason Donenfeld. Once again, we gain support for another NXP i.MX6 variant, this time it's the i.MX 6ULZ 32-bit single-core version. On arm64, we add support for two SoCs from Renesas: RZ/G2E (r8a774c0) and RZ/G2M (r8a774a1). These are described as microcontrollers on the manufacturer website, but appear to be rather powerful. The RZ/G2M is used on the reference board for the CIP Super Long Term Support (SLTS) Linux Kernels" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (54 commits) MAINTAINERS: Assign myself as a maintainer of ARM/LPC18XX architecture arm64: exynos: Enable generic power domain support MAINTAINERS: remove non-exsiting email address of Baoyou MAINTAINERS: fix pattern in ARM/Synaptics berlin SoC section MAINTAINERS: Drop dt-bindings/genpd/k2g.h ARM: samsung: Limit SAMSUNG_PM_CHECK config option to non-Exynos platforms arm64: actions: Enable PINCTRL in platforms Kconfig MAINTAINERS: Add entry for Actions Semi Owl SoCs DMA driver MAINTAINERS: Add entry for Actions Semiconductor Owl I2C driver MAINTAINERS: Update clock binding entry for Actions Semi Owl SoCs ARM: imx: add i.mx6ulz msl support ARM: Assume maintainership of ARM reference designs ARM: support big-endian for the virt architecture MAINTAINERS: sdhci: move the Microchip entry to proper location MAINTAINERS: move former ATMEL entries to proper MICROCHIP location MAINTAINERS: remove the / ATMEL string from MICROCHIP entries MAINTAINERS: iio: add co-maintainer to SAMA5D2-compatible ADC driver MAINTAINERS: pwm: add entry for Microchip pwm driver MAINTAINERS: dmaengine: add files to Microchip dma entry MAINTAINERS: USB: change maintainer for Microchip USBA gadget driver ...
| * ARM: shmobile: Rework the PMIC IRQ line quirkMarek Vasut2018-09-191-29/+110
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Rather than hard-coding the quirk topology, which stopped scaling, parse the information from DT. The code looks for all compatible PMICs -- da9063 and da9210 -- and checks if their IRQ line is tied to the same pin. If so, the code sends a matching sequence to the PMIC to deassert the IRQ. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> (on Koelsch) Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * ARM: shmobile: r8a7744: Basic SoC supportBiju Das2018-09-172-0/+7
| | | | | | | | | | | | | | | | | | Add minimal support for the RZ/G1N (R8A7744) SoC. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * ARM: shmobile: convert to SPDX identifiersKuninori Morimoto2018-09-1111-59/+14
| | | | | | | | | | | | | | | | | | This patch updates license to use SPDX-License-Identifier instead of verbose license text. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * ARM: shmobile: Convert to using %pOFn instead of device_node.nameRob Herring2018-08-301-1/+1
| | | | | | | | | | | | | | | | | | In preparation to remove the node name pointer from struct device_node, convert printf users to use the %pOFn format specifier. Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * ARM: shmobile: Remove the ARCH_SHMOBILE Kconfig symbolGeert Uytterhoeven2018-08-301-4/+0
| | | | | | | | | | | | | | | | | | | | | | All drivers for Renesas ARM SoCs have gained proper ARCH_RENESAS platform dependencies. Hence finish the conversion from ARCH_SHMOBILE to ARCH_RENESAS for Renesas 32-bit ARM SoCs, as started by commit 9b5ba0df4ea4f940 ("ARM: shmobile: Introduce ARCH_RENESAS"). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * ARM: shmobile: r8a7779: Remove unused includesGeert Uytterhoeven2018-08-271-2/+0
| | | | | | | | | | | | | | | | Presumable unused since commit c99cd90d98a98aa1 ("ARM: shmobile: r8a7779: Remove legacy SoC code"). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | Merge tag 'armsoc-drivers' of ↵Linus Torvalds2018-10-293-0/+34
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver updates from Arnd Bergmann: "The most noteworthy SoC driver changes this time include: - The TEE subsystem gains an in-kernel interface to access the TEE from device drivers. - The reset controller subsystem gains a driver for the Qualcomm Snapdragon 845 Power Domain Controller. - The Xilinx Zynq platform now has a firmware interface for its platform management unit. This contains a firmware "ioctl" interface that was a little controversial at first, but the version we merged solved that by not exposing arbitrary firmware calls to user space. - The Amlogic Meson platform gains a "canvas" driver that is used for video processing and shared between different high-level drivers. The rest is more of the usual, mostly related to SoC specific power management support and core drivers in drivers/soc: - Several Renesas SoCs (RZ/G1N, RZ/G2M, R-Car V3M, RZ/A2M) gain new features related to power and reset control. - The Mediatek mt8183 and mt6765 SoC platforms gain support for their respective power management chips. - A new driver for NXP i.MX8, which need a firmware interface for power management. - The SCPI firmware interface now contains support estimating power usage of performance states - The NVIDIA Tegra "pmc" driver gains a few new features, in particular a pinctrl interface for configuring the pads. - Lots of small changes for Qualcomm, in particular the "smem" device driver. - Some cleanups for the TI OMAP series related to their sysc controller. Additional cleanups and bugfixes in SoC specific drivers include the Meson, Keystone, NXP, AT91, Sunxi, Actions, and Tegra platforms" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (129 commits) firmware: tegra: bpmp: Implement suspend/resume support drivers: clk: Add ZynqMP clock driver dt-bindings: clock: Add bindings for ZynqMP clock driver firmware: xilinx: Add zynqmp IOCTL API for device control Documentation: xilinx: Add documentation for eemi APIs MAINTAINERS: imx: include drivers/firmware/imx path firmware: imx: add misc svc support firmware: imx: add SCU firmware driver support reset: Fix potential use-after-free in __of_reset_control_get() dt-bindings: arm: fsl: add scu binding doc soc: fsl: qbman: add interrupt coalesce changing APIs soc: fsl: bman_portals: defer probe after bman's probe soc: fsl: qbman: Use last response to determine valid bit soc: fsl: qbman: Add 64 bit DMA addressing requirement to QBMan soc: fsl: qbman: replace CPU 0 with any online CPU in hotplug handlers soc: fsl: qbman: Check if CPU is offline when initializing portals reset: qcom: PDC Global (Power Domain Controller) reset controller dt-bindings: reset: Add PDC Global binding for SDM845 SoCs reset: Grammar s/more then once/more than once/ bus: ti-sysc: Just use SET_NOIRQ_SYSTEM_SLEEP_PM_OPS ...
| * | ARM: shmobile: Add basic RZ/A2 SoC supportChris Brandt2018-08-273-0/+34
| |/ | | | | | | | | | | | | | | Add the RZ/A2 SoC to the Renesas SoC collection. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* / ARM: shmobile: use for_each_of_cpu_node iteratorRob Herring2018-09-283-15/+5
|/ | | | | | | | | | | | | | Use the for_each_of_cpu_node iterator to iterate over cpu nodes. This has the side effect of defaulting to iterating using "cpu" node names in preference to the deprecated (for FDT) device_type == "cpu". Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Russell King <linux@armlinux.org.uk> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-renesas-soc@vger.kernel.org Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Rob Herring <robh@kernel.org>
* ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15Geert Uytterhoeven2018-07-204-13/+2
| | | | | | | | | | | | | | | R-Mobile APE6, R-Car Gen2, and RZ/G1 SoCs have Cortex-A7 and/or Cortex-A15 CPU cores, all of which have ARM architectured timers. Force use of the ARM architectured timer on these SoCs. This allows to: - Remove the calls to shmobile_init_delay() from the corresponding machine vectors, - Remove a check in timer setup specific to R-Car Gen2, - Remove a check in shmobile_init_delay(). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a7779: hide unused r8a7779_platform_cpu_killArnd Bergmann2018-07-201-11/+11
| | | | | | | | | | | | | | | After the cleanup in r8a7779_smp_prepare_cpus(), the only remaining caller of r8a7779_platform_cpu_kill() is in an ifdef, which leads to a build warning without CONFIG_HOTPLUG_CPU: arch/arm/mach-shmobile/smp-r8a7779.c:26:12: error: 'r8a7779_platform_cpu_kill' defined but not used [-Werror=unused-function] This moves the function inside of that #ifdef to avoid the warning. Fixes: 62f55ce683e3 ("ARM: shmobile: r8a7779: Stop powering down secondary CPUs during early boot") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: rcar-gen2: Stop compiling headsmp-apmu on !SMPGeert Uytterhoeven2018-06-272-3/+1
| | | | | | | | | | | As of commit cad160ed0a94927e ("ARM: shmobile: Convert file to use cntvoff"), there's no non-SMP code left in headsmp-apmu.S. Hence build the file for SMP only, and drop the no longer needed check for CONFIG_SMP inside the file. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: convert to SPDX identifierWolfram Sang2018-06-1813-107/+13
| | | | | | | Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a7779: Remove explicit SYSC config and initGeert Uytterhoeven2018-06-184-46/+1
| | | | | | | | | | | | | | | | | | | | | If the R-Car H1 system controller is described in DT, the rcar-sysc driver configures SYSCIER and SYSCIMR based on the SoC-specific power area definitions in r8a7779-sysc. The platform code still passed this information to the rcar-sysc driver, for compatibility with old DTBs predating commit b2df3aa487395a1b ("ARM: dts: r8a7779: Add SYSC PM Domains") in v4.7. The time has come to drop backwards compatibility, and delegate everything to the DT enabled rcar-sysc driver. After stopping powering down secondary CPUs during early boot, there is no longer a need to force an early initialization of the rcar-sysc driver. It will be initialized in time for secondary CPU bringup by its early_initcall(). Hence all explicit SYSC configuration and initialization can be removed from the R-Car H1 platform code. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a7779: Use rcar_sysc_power_{down,up}_cpu()Geert Uytterhoeven2018-06-181-41/+6
| | | | | | | | | | | | | The r8a7779 SMP code calls rcar_sysc_power_{down,up}() to control power to the SYSC power areas containing CPUs. This requires passing full CPU power area parameter blocks. Migrate the code to call the new rcar_sysc_power_{down,up}_cpu() helpers, which just take a CPU index, and use the SYSC power area definitions from the r8a7779-sysc driver. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a7779: Stop powering down secondary CPUs during early bootGeert Uytterhoeven2018-06-181-5/+0
| | | | | | | | | | | | At .smp_prepare_cpus() time, CPUs 1-3 are still powered down: - The bootloader doesn't enable CPUs 1-3, - Non-boot CPUs are disabled by kexec before starting the new kernel. Hence there is no need to try to power them down again, as it will fail silently with -EIO anyway. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: rcar-gen2: Remove explicit SYSC config and initGeert Uytterhoeven2018-06-181-25/+0
| | | | | | | | | | | | | | | | | | | | | | If the R-Car system controller is described in DT, the rcar-sysc driver configures SYSCIER and SYSCIMR based on the SoC-specific power area definitions in r8a779*-sysc. The platform code still passed this information to the rcar-sysc driver, for compatibility with old R-Car H2 and M2-W DTBs predating commit 8574de861978d518 ("ARM: dts: r8a7791: Add SYSC PM Domains") in v4.7. The time has come to drop backwards compatibility, and delegate everything to the DT enabled rcar-sysc driver. After the removal of the legacy SMP fallbacks, which powered up the SCUs explicitly, there is no longer a need to force an early initialization of the rcar-sysc driver. It will be initialized in time for secondary CPU bringup by its early_initcall(). Hence all explicit SYSC configuration and initialization can be removed from the R-Car Gen2 platform code. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: apmu: Remove platsmp-apmu.hGeert Uytterhoeven2018-06-182-124/+100
| | | | | | | | | | | | After the removal of the legacy SMP fallbacks, platsmp-apmu.h is no longer needed outside platsmp-apmu.c. Hence remove platsmp-apmu.h, and make the functions exported previously static. As the header file also provided forward declarations, the code in platsmp-apmu.c must be reshuffled. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: apmu: Remove obsolete shmobile_smp_apmu_prepare_cpus()Geert Uytterhoeven2018-06-182-48/+0
| | | | | | | | | | After the removal of the legacy SMP fallbacks, there are no more users left of shmobile_smp_apmu_prepare_cpus(). Remove it, together with the legacy SMP config parser. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: apmu: Move cpu_leave_lowpower() to SUSPEND sectionGeert Uytterhoeven2018-06-181-15/+15
| | | | | | | | | cpu_leave_lowpower() is used for suspend only, not for CPU hotplug. Hence move it from the HOTPLUG_CPU || SUSPEND section to the SUSPEND section. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: Remove unused shmobile_smp_init_fallback_ops()Geert Uytterhoeven2018-06-182-10/+0
| | | | | | | | | shmobile_smp_init_fallback_ops() became unused after removing SoC-specific machine definitions that provided legacy SMP initialization fallbacks. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a7791: Use common R-Car Gen2 machine definitionGeert Uytterhoeven2018-06-183-42/+1
| | | | | | | | | Now r8a7791 no longer needs the SMP initialization fallback, it can use the common R-Car Gen2 machine definition, and the r8a7791-specific one can be removed. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a7791: Remove legacy SMP fallback codeGeert Uytterhoeven2018-06-184-63/+0
| | | | | | | | | | | | As of commit f89a51700d7ae0ef ("ARM: shmobile: r8a7791: Prioritize DT APMU support") in v4.8, non-DT enablement of SMP was left as a fallback for backwards compatibility with old DTBs. The time has come to drop backwards compatibility, hence remove the fallback code. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a7790: Use common R-Car Gen2 machine definitionGeert Uytterhoeven2018-06-183-38/+2
| | | | | | | | | Now r8a7790 no longer needs the SMP initialization fallback, it can use the common R-Car Gen2 machine definition, and the r8a7790-specific one can be removed. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a7790: Remove legacy SMP fallback codeGeert Uytterhoeven2018-06-184-81/+0
| | | | | | | | | | | | As of commit f5d70b9cee2282ec ("ARM: shmobile: r8a7790: Prioritize DT APMU support") in v4.8, non-DT enablement of SMP was left as a fallback for backwards compatibility with old DTBs. The time has come to drop backwards compatibility, hence remove the fallback code. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* Merge tag 'armsoc-soc' of ↵Linus Torvalds2018-06-124-23/+18
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform updates from Olof Johansson: "Here are the main updates for SoC support (besides DT additions) for ARM 32- and 64-bit platforms. The branch also contains defconfig updates to turn on drivers and options as needed on the various platforms. The largest parts of the delta are from cleanups moving platform data and board file setup of TI platforms to ti-sysc bus drivers. There are also some sweeping changes of eeprom and nand setup on Davinci, i.MX and other platforms. Samsung is removing support for Exynos5440, which was an oddball SoC that hasn't been seen much use in designs. Renesas is adding support for new SoCs (R-Car E3, RZ/G1C and RZ/N1D). Linus Walleij is also removing support for ux500 (Sony Ericsson) U8540/9540 SoCs that never made it to significant mass production and products" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (133 commits) MAINTAINERS: add NXP linux team maillist as i.MX reviewer ARM: stm32: Don't select DMA unconditionally on STM32MP157C arm64: defconfig: Enable PCIe on msm8996 and db820c ARM: pxa3xx: enable external wakeup pins ARM: pxa: stargate2: use device properties for at24 eeprom arm64: defconfig: Enable HISILICON_LPC arm64: defconfig: enable drivers for Poplar support arm64: defconfig: Enable UFS on msm8996 ARM: berlin: switch to SPDX license identifier arm: berlin: remove non-necessary flush_cache_all() ARM: berlin: extend BG2CD Kconfig entry OMAP: CLK: CLKSRC: Add suspend resume hooks ARM: AM43XX: Add functions to save/restore am43xx control registers ASoC: ams_delta: use GPIO lookup table ARM: OMAP1: ams-delta: add GPIO lookup tables bus: ti-sysc: Fix optional clocks array access ARM: OMAP2+: Make sure LOGICRETSTATE bits are not cleared ARM: OMAP2+: prm44xx: Inroduce cpu_pm notifiers for context save/restore ARM: OMAP2+: prm44xx: Introduce context save/restore for am43 PRCM IO ARM: OMAP2+: powerdomain: Introduce cpu_pm notifiers for context save/restore ...
| * Merge tag 'renesas-soc-for-v4.18' of ↵Olof Johansson2018-05-262-0/+15
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc Renesas ARM Based SoC Updates for v4.18 * SoC - Change platform dependency to ARCH_RENESAS This will allow to drop ARCH_SHMOBILE on ARM and ARM64 in the near future. - Add the to Kconfig RZ/N1D (r9a06g032) SoC - Identify R-Car E3 (r8a77990) SoC - Identify and add minimal support for RZ/G1C (r8a77470) SoC * R-Car SYSC - Add support for R-Car E3 (r8a77990) SoC - Remove unused inclusion of <linux/sys_soc.h>, - Make r8a77995_areas[] const. * R-Car Reset - Add support for R-Car E3 (r8a77990) SoC * Debug-LL - Add support for RZ/G1C (r8a77470) SoC * tag 'renesas-soc-for-v4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: soc: renesas: r8a77990-sysc: Add workaround for 3DG-{A,B} soc: renesas: rcar-sysc: Add support for R-Car E3 power areas arm: shmobile: Add the RZ/N1D (R9A06G032) to the shmobile Kconfig arm: shmobile: Change platform dependency to ARCH_RENESAS soc: renesas: r8a77995-sysc: Cleanups soc: renesas: rcar-rst: Add support for R-Car E3 soc: renesas: Add r8a77990 SYSC PM Domain Binding Definitions soc: renesas: identify R-Car E3 ARM: debug-ll: Add support for r8a77470 ARM: shmobile: Add the RZ/N1 arch to the shmobile Kconfig ARM: shmobile: r8a77470: basic SoC support soc: renesas: rcar-sysc: Add r8a77470 support soc: renesas: rcar-rst: Add support for RZ/G1C soc: renesas: Identify RZ/G1C Signed-off-by: Olof Johansson <olof@lixom.net>
| | * arm: shmobile: Add the RZ/N1D (R9A06G032) to the shmobile KconfigMichel Pollet2018-04-231-0/+4
| | | | | | | | | | | | | | | | | | | | | Add the RZ/N1D SoC to the reset of the Renesas SoC Collection. Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * ARM: shmobile: Add the RZ/N1 arch to the shmobile KconfigMichel Pollet2018-04-161-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add the RZ/N1 Family (Part #R9A06G0xx) ARCH config to the rest of the Renesas SoC collection. Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * ARM: shmobile: r8a77470: basic SoC supportBiju Das2018-04-162-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add minimal support for the RZ/G1C (R8A77470) SoC. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | ARM: shmobile: Convert file to use cntvoffMylène Josserand2018-05-083-23/+3
| |/ | | | | | | | | | | | | | | | | | | | | | | Now that a common function is available for CNTVOFF's initialization, let's convert shmobile-apmu code to use this function. Signed-off-by: Mylène Josserand <mylene.josserand@bootlin.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
* / arch: define the ARCH_DMA_ADDR_T_64BIT config symbol in lib/KconfigChristoph Hellwig2018-05-091-1/+0
|/ | | | | | | | | | | Define this symbol if the architecture either uses 64-bit pointers or the PHYS_ADDR_T_64BIT is set. This covers 95% of the old arch magic. We only need an additional select for Xen on ARM (why anyway?), and we now always set ARCH_DMA_ADDR_T_64BIT on mips boards with 64-bit physical addressing instead of only doing it when highmem is set. Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: James Hogan <jhogan@kernel.org>
* ARM: shmobile: rcar-gen2: Add watchdog supportFabrizio Castro2018-03-132-3/+13
| | | | | | | | | | This patch adds watchdog support by installing shmobile_boot_vector_gen2 to ICRAM1 when enough memory is available, in which case we also keep a copy of MPIDR to complete the reset vector logic. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: Add watchdog supportFabrizio Castro2018-03-132-0/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On R-Car Gen2 and RZ/G1 platforms, we use the SBAR registers to make non boot CPUs run a routine designed to bring up SMP and deal with hot plug. The value contained in the SBAR registers is not initialized by a WDT triggered reset, which means that after a WDT triggered reset we jump to the SMP bring up routine, preventing the system from executing the bootrom code. The purpose of this patch is to jump to the bootrom code in case of a WDT triggered reset, and keep the SMP functionality untouched. In order to tell if the code had been called due to the WDT overflowing we are testing WOVF from register RWTCSRA. The new function shmobile_boot_vector_gen2 isn't replacing shmobile_boot_vector for backward compatibility reasons. The kernel will install the best option (either shmobile_boot_vector or shmobile_boot_vector_gen2) to ICRAM1 after parsing the device tree, according to the amount of memory available. Since shmobile_boot_vector has become bigger, "reg" property of nodes compatible with "renesas,smp-sram" now need to be set to a value greater or equal to "<0 0x60>". Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> [simon: dropped #ifdef from common.h] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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