summaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-socfpga (follow)
Commit message (Collapse)AuthorAgeFilesLines
* arm: socfpga: fix fetching cpu1start_addr for SMPDinh Nguyen2014-10-214-15/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | When CPU1 is brought out of reset, it's MMU is not turned on yet, so it will only be able to use physical addresses. For systems with that have the MMU page configured for 0xC0000000, 0x80000000, or 0x40000000 "BIC 0x40000000" will work just fine, as it was just converting the virtual address of &cpu1start_addr into a physical address, ie. 0xC0000000 became 0x80000000. So for systems where the SDRAM controller was able to do a wrap-around access, this was working fine, as it was just dropping the MSB, but for systems where out of bounds memory access is not allowed, this would not allow CPU1 to correctly fetch &cpu1start_addr. This patch fixes the secondary_trampoline code to correctly fetch the physical address of cpu1start_addr directly. The patch will subtract the correct PAGE_OFFSET from &cpu1start_addr. And since on this platform, the physical memory will always start at 0x0, subtracting PAGE_OFFSET from &cpu1start_addr will allow CPU1 to correctly fetch the value of cpu1start_addr. While at it, change the name of cpu1start_addr to socfpga_cpu1start_addr to avoid any future naming collisions for multiplatform image. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> --- v4: Updated commit log to correctly lay out the usage of PAGE_OFFSET and add comments to the same effect. v3: Used PAGE_OFFSET to get the physical address v2: Correctly get the physical address instead of just a BIC hack.
* ARM: l2c: socfpga: convert to generic l2c OF initialisationRussell King2014-05-301-7/+2
| | | | | | | Remove the explicit call to l2x0_of_init(), converting to the generic infrastructure instead. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: l2c: remove unnecessary UL-suffix to mask valuesRussell King2014-05-221-1/+1
| | | | | | | | They're u32, they're not unsigned long. The UL suffix is not required here. Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge tag 'clk-for-linus-3.15' of ↵Linus Torvalds2014-04-061-5/+0
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.linaro.org/people/mike.turquette/linux Pull clock framework changes from Mike Turquette: "The clock framework changes for 3.15 look similar to past pull requests. Mostly clock driver updates, more Device Tree support in the form of common functions useful across platforms and a handful of features and fixes to the framework core" * tag 'clk-for-linus-3.15' of git://git.linaro.org/people/mike.turquette/linux: (86 commits) clk: shmobile: fix setting paretn clock rate clk: shmobile: rcar-gen2: fix lb/sd0/sd1/sdh clock parent to pll1 clk: Fix minor errors in of_clk_init() function comments clk: reverse default clk provider initialization order in of_clk_init() clk: sirf: update copyright years to 2014 clk: mmp: try to use closer one when do round rate clk: mmp: fix the wrong calculation formula clk: mmp: fix wrong mask when calculate denominator clk: st: Adds quadfs clock binding clk: st: Adds clockgen-vcc and clockgen-mux clock binding clk: st: Adds clockgen clock binding clk: st: Adds divmux and prediv clock binding clk: st: Support for A9 MUX clocks clk: st: Support for ClockGenA9/DDR/GPU clk: st: Support for QUADFS inside ClockGenB/C/D/E/F clk: st: Support for VCC-mux and MUX clocks clk: st: Support for PLLs inside ClockGenA(s) clk: st: Support for DIVMUX and PreDiv Clocks clk: support hardware-specific debugfs entries clk: s2mps11: Use of_get_child_by_name ...
| * clk: socfpga: Remove socfpga_init_clocksDinh Nguyen2014-02-181-1/+0
| | | | | | | | | | | | | | | | | | The only thing that socfpga_init_clocks was doing is setting up the smp_twd clk. Now that twd-timer's clock phandle is populated in the DTS, we can remove this function. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
| * clk: socfpga: Map the clk manager base address in the clock driverDinh Nguyen2014-02-181-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The clk manager's base address was being mapped in SOCFPGA's arch code and being extern'ed out to the clock driver. This method is not correct, and the arch code was not really doing anything with that clk manager anyways. This patch moves the mapping of the clk manager's base address in the clock driver itself. Cleans up CLK_OF_DECLARE() into a single registration of all the clocks. Suggested-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Acked-by: Arnd Bergmann <arnd@arndb.de> --- v2: Use a static declaration for the clk_mgr_base_addr. Clean up the CLK_OF_DECLARE() as suggested by Arnd.
* | ARM: select HAVE_SMP for V7 multi-platformRob Herring2014-02-191-1/+0
| | | | | | | | | | | | | | | | | | All V7 platforms can run SMP kernels, so make CONFIG_SMP visible for V7 multi-platform builds. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
* | ARM: centralize common multi-platform kconfig optionsRob Herring2014-02-191-6/+0
|/ | | | | | | | | | | | Multi-platform requires various kconfig options to be selected, so platforms don't need to select them individually. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Cc: Russell King <linux@arm.linux.org.uk> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Arnd Bergmann <arnd@arndb.de>
* arm: socfpga: Enable ARM_TWD for socfpgaDinh Nguyen2013-12-031-0/+1
| | | | | | | | Update Kconfig to enable TWD. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Reviewed-by: Pavel Machek <pavel@denx.de> Signed-off-by: Olof Johansson <olof@lixom.net>
* ARM: drop explicit selection of HAVE_CLK and CLKDEV_LOOKUPUwe Kleine-König2013-10-071-1/+0
| | | | | | | | | | | | | | | | | CLKDEV_LOOKUP selects HAVE_CLK and COMMON_CLK selects CLKDEV_LOOKUP. So all symbols that select at least two of these symbols can be simplified. For imx, omap2 and ux500 some rearrangements were necessary before the simplification. Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Dinh Nguyen <dinguyen@altera.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Pawel Moll <pawel.moll@arm.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Olof Johansson <olof@lixom.net>
* ARM: socfpga: remove custom .init_time hookSebastian Hesselbarth2013-09-291-9/+0
| | | | | | | | With arch/arm calling of_clk_init(NULL) from time_init(), we can now remove custom .init_time hooks. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Dinh Nguyen <dinguyen@altera.com>
* ARM: socfgpa: prepare for arch-wide .init_time callbackSebastian Hesselbarth2013-09-291-1/+8
| | | | | | | | | | Current socfpga board init calls of_clk_init() from .machine_init. To allow consolidation of DT driven .time_init, move of_clock_init() to a temporary .time_init that will be removed when arch-wide callback is available. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Dinh Nguyen <dinguyen@altera.com>
* arm: delete __cpuinit/__CPUINIT usage from all ARM usersPaul Gortmaker2013-07-152-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The __cpuinit type of throwaway sections might have made sense some time ago when RAM was more constrained, but now the savings do not offset the cost and complications. For example, the fix in commit 5e427ec2d0 ("x86: Fix bit corruption at CPU resume time") is a good example of the nasty type of bugs that can be created with improper use of the various __init prefixes. After a discussion on LKML[1] it was decided that cpuinit should go the way of devinit and be phased out. Once all the users are gone, we can then finally remove the macros themselves from linux/init.h. Note that some harmless section mismatch warnings may result, since notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c) and are flagged as __cpuinit -- so if we remove the __cpuinit from the arch specific callers, we will also get section mismatch warnings. As an intermediate step, we intend to turn the linux/init.h cpuinit related content into no-ops as early as possible, since that will get rid of these warnings. In any case, they are temporary and harmless. This removes all the ARM uses of the __cpuinit macros from C code, and all __CPUINIT from assembly code. It also had two ".previous" section statements that were paired off against __CPUINIT (aka .section ".cpuinit.text") that also get removed here. [1] https://lkml.org/lkml/2013/5/20/589 Cc: Russell King <linux@arm.linux.org.uk> Cc: Will Deacon <will.deacon@arm.com> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
* reboot: arm: change reboot_mode to use enum reboot_modeRobin Holt2013-07-091-2/+3
| | | | | | | | | | | | | | | | Preparing to move the parsing of reboot= to generic kernel code forces the change in reboot_mode handling to use the enum. [akpm@linux-foundation.org: fix arch/arm/mach-socfpga/socfpga.c] Signed-off-by: Robin Holt <holt@sgi.com> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Russ Anderson <rja@sgi.com> Cc: Robin Holt <holt@sgi.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Guan Xuetao <gxt@mprc.pku.edu.cn> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge tag 'v3.11-rockchip-basics' of ↵Arnd Bergmann2013-06-212-3/+0
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/soc From Heiko Stuebner: Adds basic support for Rockchip Cortex-A9 SoCs. * tag 'v3.11-rockchip-basics' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: arm: add basic support for Rockchip RK3066a boards arm: add debug uarts for rockchip rk29xx and rk3xxx series arm: Add basic clocks for Rockchip rk3066a SoCs clocksource: dw_apb_timer_of: use clocksource_of_init clocksource: dw_apb_timer_of: select DW_APB_TIMER clocksource: dw_apb_timer_of: add clock-handling clocksource: dw_apb_timer_of: enable the use the clocksource as sched clock Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * clocksource: dw_apb_timer_of: use clocksource_of_initHeiko Stuebner2013-06-121-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dw_apb_timer_init used to search the devicetree for matching timer devices, making calls to it from board files necessary. Change the dw_apb_timer_init to work with CLOCKSOURCE_OF_DECLARE. With this change the function gets called once for each timer node and tracks these number of calls to attach clockevent and clocksource devices to the nodes. Also remove the calls to dw_apb_timer_init from all previous users, as clocksource_of_init is the default for init_time now. Tested on the upcoming rk3066 code. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Jamie Iles <jamie@jamieiles.com> Acked-by: Dinh Nguyen <dinguyen@altera.com>
| * clocksource: dw_apb_timer_of: select DW_APB_TIMERHeiko Stuebner2013-06-121-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dw_apb_timer_of is the driver part facing devicetree platforms and calls into dw_apb_timer with the data gathered from the dt. Currently the two platforms using the dw_apb_timer_of select both the options for the core timer and the dt addon. As dw_apb_timer_of always depends on dw_apb_timer let it select DW_APB_TIMER itself without the need for every platform to do it. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Jamie Iles <jamie@jamieiles.com> Acked-by: Dinh Nguyen <dinguyen@altera.com>
* | ARM: socfpga: Add syscon to be part of socfpgaDinh Nguyen2013-06-121-0/+1
|/ | | | | | | | | | | | SOCFPGA has a system manager register block can be accessed by using the syscon driver. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Cc: Pavel Machek <pavel@denx.de> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Olof Johansson <olof@lixom.net> Cc: <linux@arm.linux.org.uk> Signed-off-by: Olof Johansson <olof@lixom.net>
* Merge branch 'gic/cleanup' into next/socOlof Johansson2013-04-291-12/+0
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge in the gic cleanup since it has a handful of annoying internal conflicts with soc development branches. All of them are delete/delete conflicts. * gic/cleanup: irqchip: vic: add include of linux/irq.h irqchip: gic: Perform the gic_secondary_init() call via CPU notifier irqchip: gic: Call handle_bad_irq() directly arm: Move chained_irq_(enter|exit) to a generic file arm: Move the set_handle_irq and handle_arch_irq declarations to asm/irq.h Signed-off-by: Olof Johansson <olof@lixom.net> Conflicts: arch/arm/mach-shmobile/smp-emev2.c arch/arm/mach-shmobile/smp-r8a7779.c arch/arm/mach-shmobile/smp-sh73a0.c arch/arm/mach-socfpga/platsmp.c
| * irqchip: gic: Perform the gic_secondary_init() call via CPU notifierCatalin Marinas2013-03-261-12/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All the calls to gic_secondary_init() pass 0 as the first argument. Since this function is called on each CPU when starting, it can be done in a platform-independent way via a CPU notifier registered by the GIC code. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Simon Horman <horms+renesas@verge.net.au> Tested-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Tested-by: Dinh Nguyen <dinguyen@altera.com> Acked-by: Nicolas Pitre <nico@linaro.org> Tested-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: David Brown <davidb@codeaurora.org> Cc: Bryan Huntsman <bryanh@codeaurora.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Shiraz Hashim <shiraz.hashim@st.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Will Deacon <will.deacon@arm.com> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Barry Song <baohua.song@csr.com>
* | ARM: socfpga: Upgrade clk driver for socfpga to make use of dts clock entriesDinh Nguyen2013-04-151-0/+6
| | | | | | | | | | | | | | | | | | With this patch, the socfpga clk driver is able to query the clock and clock rates appropriately. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Reviewed-by: Pavel Machek <pavel@denx.de> Signed-off-by: Olof Johansson <olof@lixom.net>
* | ARM: socfpga: Enable soft resetDinh Nguyen2013-04-153-4/+20
|/ | | | | | | | | | | | | Enable a cold or warm reset to the HW from userspace. Also fix a few sparse errors: warning: symbol 'sys_manager_base_addr' was not declared. Should it be static? warning: symbol 'rst_manager_base_addr' was not declared. Should it be static? Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Reviewed-by: Pavel Machek <pavel@denx.de> Signed-off-by: Olof Johansson <olof@lixom.net>
* Merge branch 'socfpga/hw' into next/socOlof Johansson2013-02-124-13/+31
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From Dinh Nguyen, this is a series of patches introducing support for socfpga hardware (Altera Cyclone5). It also includes a cleanup that moves some of the ARMv7 cache maintenance functions to a common location, since three other platforms aready implemented it separately. * socfpga/hw: arm: socfpga: Add SMP support for actual socfpga harware arm: Add v7_invalidate_l1 to cache-v7.S arm: socfpga: Add entries to enable make dtbs socfpga arm: socfpga: Add new device tree source for actual socfpga HW Trivial conflict in arch/arm/mach-tegra/headsmp.S. Signed-off-by: Olof Johansson <olof@lixom.net>
| * arm: socfpga: Add SMP support for actual socfpga harwareDinh Nguyen2013-02-124-12/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Because the CPU1 start address is different for socfpga-vt and socfpga-cyclone5, we add code to use the correct CPU1 start addr. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Signed-off-by: Pavel Machek <pavel@denx.de> Cc: Russell King <linux@arm.linux.org.uk> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Olof Johansson <olof@lixom.net> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Olof Johansson <olof@lixom.net>
| * arm: socfpga: Add new device tree source for actual socfpga HWDinh Nguyen2013-02-121-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Up to this point, support for socfpga has only been on a virtual platform. Now that actual hardware is available, we add the appropriate device tree source files. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Tested-by: Pavel Machek <pavel@denx.de> Reviewed-by: Pavel Machek <pavel@denx.de> Cc: Russell King <linux@arm.linux.org.uk> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Olof Johansson <olof@lixom.net> Signed-off-by: Olof Johansson <olof@lixom.net>
* | Merge tag 'gic-vic-to-irqchip' of git://sources.calxeda.com/kernel/linux ↵Olof Johansson2013-01-152-13/+5
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into next/cleanup From Rob Herring: Initial irqchip init infrastructure and GIC and VIC clean-ups This creates irqchip initialization infrastructure from Thomas Petazzoni. The VIC and GIC irqchip code is moved to drivers/irqchips and adapted to use the new infrastructure. All DT enabled platforms using GIC and VIC are converted over to use the new irqchip_init. * tag 'gic-vic-to-irqchip' of git://sources.calxeda.com/kernel/linux: irqchip: Move ARM vic.h to include/linux/irqchip/arm-vic.h ARM: picoxcell: use common irqchip_init function ARM: spear: use common irqchip_init function irqchip: Move ARM VIC to drivers/irqchip ARM: samsung: remove unused tick.h ARM: remove unneeded vic.h includes ARM: remove mach .handle_irq for VIC users ARM: VIC: set handle_arch_irq in VIC initialization ARM: VIC: shrink down vic.h irqchip: Move ARM gic.h to include/linux/irqchip/arm-gic.h ARM: use common irqchip_init for GIC init irqchip: Move ARM GIC to drivers/irqchip ARM: remove mach .handle_irq for GIC users ARM: GIC: set handle_arch_irq in GIC initialization ARM: GIC: remove direct use of gic_raise_softirq ARM: GIC: remove assembly ifdefs from gic.h ARM: mach-ux500: use SGI0 to wake up the other core arm: add set_handle_irq() to register the parent IRQ controller handler function irqchip: add basic infrastructure irqchip: add to the directories part of the IRQ subsystem in MAINTAINERS Fixed up massive merge conflicts with the timer cleanup due to adjacent changes: Signed-off-by: Olof Johansson <olof@lixom.net> Conflicts: arch/arm/mach-bcm/board_bcm.c arch/arm/mach-cns3xxx/cns3420vb.c arch/arm/mach-ep93xx/adssphere.c arch/arm/mach-ep93xx/edb93xx.c arch/arm/mach-ep93xx/gesbc9312.c arch/arm/mach-ep93xx/micro9.c arch/arm/mach-ep93xx/simone.c arch/arm/mach-ep93xx/snappercl15.c arch/arm/mach-ep93xx/ts72xx.c arch/arm/mach-ep93xx/vision_ep9307.c arch/arm/mach-highbank/highbank.c arch/arm/mach-imx/mach-imx6q.c arch/arm/mach-msm/board-dt-8960.c arch/arm/mach-netx/nxdb500.c arch/arm/mach-netx/nxdkn.c arch/arm/mach-netx/nxeb500hmi.c arch/arm/mach-nomadik/board-nhk8815.c arch/arm/mach-picoxcell/common.c arch/arm/mach-realview/realview_eb.c arch/arm/mach-realview/realview_pb1176.c arch/arm/mach-realview/realview_pb11mp.c arch/arm/mach-realview/realview_pba8.c arch/arm/mach-realview/realview_pbx.c arch/arm/mach-socfpga/socfpga.c arch/arm/mach-spear13xx/spear1310.c arch/arm/mach-spear13xx/spear1340.c arch/arm/mach-spear13xx/spear13xx.c arch/arm/mach-spear3xx/spear300.c arch/arm/mach-spear3xx/spear310.c arch/arm/mach-spear3xx/spear320.c arch/arm/mach-spear3xx/spear3xx.c arch/arm/mach-spear6xx/spear6xx.c arch/arm/mach-tegra/board-dt-tegra20.c arch/arm/mach-tegra/board-dt-tegra30.c arch/arm/mach-u300/core.c arch/arm/mach-ux500/board-mop500.c arch/arm/mach-ux500/cpu-db8500.c arch/arm/mach-versatile/versatile_ab.c arch/arm/mach-versatile/versatile_dt.c arch/arm/mach-versatile/versatile_pb.c arch/arm/mach-vexpress/v2m.c include/asm-generic/vmlinux.lds.h
| * | irqchip: Move ARM gic.h to include/linux/irqchip/arm-gic.hRob Herring2013-01-121-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that we have GIC moved to drivers/irqchip and all GIC DT init for platforms using irqchip_init, move gic.h and update the remaining includes. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Russell King <linux@arm.linux.org.uk> Cc: Anton Vorontsov <avorontsov@mvista.com> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: David Brown <davidb@codeaurora.org> Cc: Daniel Walker <dwalker@fifo99.com> Cc: Bryan Huntsman <bryanh@codeaurora.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Viresh Kumar <viresh.linux@gmail.com> Cc: Shiraz Hashim <shiraz.hashim@st.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Samuel Ortiz <sameo@linux.intel.com>
| * | ARM: use common irqchip_init for GIC initRob Herring2013-01-121-9/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert all GIC DT initialization over to use common irqchip_init function. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Kukjin Kim <kgene.kim@samsung.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: David Brown <davidb@codeaurora.org> Cc: Daniel Walker <dwalker@fifo99.com> Cc: Bryan Huntsman <bryanh@codeaurora.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Viresh Kumar <viresh.linux@gmail.com> Cc: Shiraz Hashim <shiraz.hashim@st.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Linus Walleij <linus.walleij@linaro.org>
| * | ARM: remove mach .handle_irq for GIC usersRob Herring2013-01-121-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that the GIC initialization sets up the handle_arch_irq pointer, we can remove it for all machines and make it static. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Anton Vorontsov <avorontsov@mvista.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: David Brown <davidb@codeaurora.org> Cc: Daniel Walker <dwalker@fifo99.com> Cc: Bryan Huntsman <bryanh@codeaurora.org> Acked-by: Tony Lindgren <tony@atomide.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Shiraz Hashim <shiraz.hashim@st.com> Acked-by: Stephen Warren <swarren@nvidia.com> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Linus Walleij <linus.walleij@linaro.org> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Olof Johansson <olof@lixom.net> Acked-by: Arnd Bergmann <arnd@arndb.de>
| * | ARM: GIC: remove direct use of gic_raise_softirqRob Herring2013-01-101-2/+0
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In preparation of moving gic code to drivers/irqchip, remove the direct platform dependencies on gic_raise_softirq. Move the setup of smp_cross_call into the gic code and use arch_send_wakeup_ipi_mask function to trigger wake-up IPIs. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: David Brown <davidb@codeaurora.org> Cc: Daniel Walker <dwalker@fifo99.com> Cc: Bryan Huntsman <bryanh@codeaurora.org> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Cc: Shiraz Hashim <shiraz.hashim@st.com> Acked-by: Stephen Warren <swarren@nvidia.com> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Linus Walleij <linus.walleij@linaro.org> Acked-by: Olof Johansson <olof@lixom.net>
* / ARM: delete struct sys_timerStephen Warren2012-12-241-1/+1
|/ | | | | | | | | | | | | | | | | | Now that the only field in struct sys_timer is .init, delete the struct, and replace the machine descriptor .timer field with the initialization function itself. This will enable moving timer drivers into drivers/clocksource without having to place a public prototype of each struct sys_timer object into include/linux; the intent is to create a single of_clocksource_init() function that determines which timer driver to initialize by scanning the device dtree, much like the proposed irqchip_init() at: http://www.spinics.net/lists/arm-kernel/msg203686.html Includes mach-omap2 fixes from Igor Grinberg. Tested-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: socfpga: mark secondary_trampoline as cpuinitArnd Bergmann2012-11-061-1/+1
| | | | | | | | | | | | | | | | The socfpga_boot_secondary is correctly marked as __cpuinit but references secondary_trampoline, which was introduced into the init section, causing this build warning: WARNING: vmlinux.o(.cpuinit.text+0xf90): Section mismatch in reference from the function socfpga_boot_secondary() to the variable .init.text:secondary_trampoline The function __cpuinit socfpga_boot_secondary() references a variable __init secondary_trampoline. If secondary_trampoline is only used by socfpga_boot_secondary then annotate secondary_trampoline with a matching annotation. The solution is to mark secondary_trampoline as cpuinit as well. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* socfpga: map uart into virtual address space so that early_printk() worksPavel Machek2012-11-051-0/+9
| | | | | | | | | | | Early printk code needs UART to be mapped early during boot. early_printk() is left there during the start-up; it is useful as our emulators are fairly slow. Signed-off-by: Pavel Machek <pavel@denx.de> Acked-by: Dinh Nguyen <dinguyen@altera.com> [olof: removed redundant newlines] Signed-off-by: Olof Johansson <olof@lixom.net>
* ARM: socfpga: fix build break for allyesconfigPavel Machek2012-10-271-0/+1
| | | | | | | | | | | | | Building a multiplatform kernel with combined armv7 and armv6 kernel does not work with the socfpga smp code, which contains v7-only instructions. Since this code never runs on armv6, we can annotate the assmebly with .arch armv7-a, as suggested by Russell King. [arnd: reword commit message] Signed-off-by: Pavel Machek <pavel@denx.de> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* ARM: socfpga: Enable SMP for socfpgaDinh Nguyen2012-10-266-1/+220
| | | | | | | | | Enable SMP for the SOCFPGA platform. Signed-off-by: Pavel Machek <pavel@denx.de> Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Reviewed-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* ARM: initial multiplatform supportRob Herring2012-09-144-29/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This lets us build a multiplatform kernel for experimental purposes. However, it will not be useful for any real work, because it relies on a number of useful things to be disabled for now: * SMP support must be turned off because of conflicting symbols. Marc Zyngier has proposed a solution by adding a new SOC operations structure to hold indirect function pointers for these, but that work is currently stalled * We turn on SPARSE_IRQ unconditionally, which is not supported on most platforms. Each of them is currently in a different state, but most are being worked on. * A common clock framework is in place since v3.4 but not yet being used. Work on this is on its way. * DEBUG_LL for early debugging is currently disabled. * THUMB2_KERNEL does not work with allyesconfig because the kernel gets too big [Rob Herring]: Rebased to not be dependent on the mass mach header rename. As a result, omap2plus, imx, mxs and ux500 are not converted. Highbank, picoxcell, mvebu, and socfpga are converted. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Acked-by: Jamie Iles <jamie@jamieiles.com> Cc: Dinh Nguyen <dinguyen@altera.com>
* ARM: socfpga: move debug macros to include/debugRob Herring2012-09-141-16/+0
| | | | | | | Move socfpga debug-macro.S over to common debug macro directory. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Dinh Nguyen <dinguyen@altera.com>
* ARM: socfpga: initial support for Altera's SOCFPGA platformDinh Nguyen2012-07-196-0/+112
Adding core definitions for Altera's SOCFPGA ARM platform. Mininum support for Altera's SOCFPGA Cyclone 5 hardware. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Reviewed-by: Pavel Machek <pavel@denx.de> Reviewed-by: Rob Herring <rob.herring@calxeda.com> Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>