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* ARM: sunxi: Add a missing SPDX license headerJason Wang2021-09-131-3/+1
| | | | | | | | Add the missing SPDX license header to arch/arm/mach-sunxi/sunxi.c. Signed-off-by: Jason Wang <wangborong@cdjrlc.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20210810132954.107518-1-wangborong@cdjrlc.com
* ARM: sunxi: Add machine match for the Allwinner V3 SoCPaul Kocialkowski2020-11-021-0/+1
| | | | | | | | | | The Allwinner V3 SoC shares the same base as the V3s but comes with extra pins and features available. As a result, it has its dedicated compatible string (already used in device trees), which is added here. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20201031182137.1879521-2-contact@paulk.fr
* ARM: sunxi: Replace <linux/clk-provider.h> by <linux/of_clk.h>Geert Uytterhoeven2020-02-121-1/+1
| | | | | | | | | | | The Allwinner platform code is not a clock provider, and just needs to call of_clk_init(). Hence it can include <linux/of_clk.h> instead of <linux/clk-provider.h>. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
* reset: sunxi: declare sun6i_reset_init in a header filePhilipp Zabel2019-01-281-1/+1
| | | | | | | | | Avoid declaring extern functions in c files. To make sure function definition and usage don't get out of sync, declare sun6i_reset_init in a common header. Suggested-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* ARM: sunxi: add Allwinner ARMv5 SoCsMesih Kilinc2018-12-031-0/+9
| | | | | | | | | | Add option for Allwinner ARMv5 SoCs and SoC F1C100s (which has a die used for many new F-series products, including F1C100A, F1C100s, F1C200s, F1C500, F1C600). Signed-off-by: Mesih Kilinc <mesihkilinc@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
* ARM: sunxi: Add initialization of CNTVOFFMylène Josserand2018-05-081-1/+19
| | | | | | | | | | | | | | | | | | Add the initialization of CNTVOFF for sun8i-a83t. For boot CPU, create a new machine that handles this function's call in an "init_early" callback. We need to initialize CNTVOFF before the arch timer's initialization otherwise, it will not be taken into account and fails to boot correctly. Because of that, this function can't be called in SMP's early_initcall function which is called after timer's init. For secondary CPUs, add this function into secondary_startup assembly entry. Signed-off-by: Mylène Josserand <mylene.josserand@bootlin.com> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
* ARM: sunxi: add support for R40 SoCIcenowy Zheng2017-09-221-0/+1
| | | | | | | | | | Allwinner R40 is a new SoC, with Quad Core Cortex-A7 and peripherals like A20. Add support for it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* clocksource/drivers: Rename clocksource_probe to timer_probeDaniel Lezcano2017-06-141-1/+1
| | | | | | | | | | The function name is now renamed to 'timer_probe' for consistency with the CLOCKSOURCE_OF_DECLARE => TIMER_OF_DECLARE change. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
* arm: sunxi: add support for V3s SoCIcenowy Zheng2017-01-201-0/+1
| | | | | | | | Allwinner V3s is a low-end single-core Cortex-A7 SoC, with 64MB integrated DRAM, and several peripherals. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: sunxi: add support for H2+ SoCIcenowy Zheng2017-01-021-0/+1
| | | | | | | | | | Allwinner H2+ is a quad-core Cortex-A7 SoC. It is very like H3, that they share the same SoC ID (0x1680), and H3 memory maps as well as drivers works well on the SoC. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: sunxi: Support the Nextthing GR8Maxime Ripard2016-09-081-0/+1
| | | | | | | | | | | The GR8 is an SoC made by Nextthing Co, loosely based on the sun5i family. It has a number of new controllers compared to the A10s and A13 (SPDIF, I2S), but some controllers missing too (Ethernet, less I2C, less UARTs). Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* cpufreq: sunxi: Use generic platdev driverViresh Kumar2016-04-251-9/+0
| | | | | | | | | The cpufreq-dt-platdev driver supports creation of cpufreq-dt platform device now, reuse that and remove similar code from platform code. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* ARM: sunxi: Introduce Allwinner for A83T supportVishnu Patekar2016-02-051-0/+1
| | | | | | | | | | | | | | Allwinner A83T is octa-core cortex-a7 based SoC. It's clock control unit and prcm, pinmux are different from previous sun8i series. Its processor cores are arragned in two clusters 4 cores each, similar to A80. Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Chen-Yu Tsai <wens@csie.org> [maxime: Removed the clock protection code] Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* Merge tag 'armsoc-soc' of ↵Linus Torvalds2015-11-101-1/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform updates from Olof Johansson: "New and/or improved SoC support for this release: Marvell Berlin: - Enable standard DT-based cpufreq - Add CPU hotplug support Freescale: - Ethernet init for i.MX7D - Suspend/resume support for i.MX6UL Allwinner: - Support for R8 chipset (used on NTC's $9 C.H.I.P board) Mediatek: - SMP support for some platforms Uniphier: - L2 support - Cleaned up SMP support, etc. plus a handful of other patches around above functionality, and a few other smaller changes" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (42 commits) ARM: uniphier: rework SMP operations to use trampoline code ARM: uniphier: add outer cache support Documentation: EXYNOS: Update bootloader interface on exynos542x ARM: mvebu: add broken-idle option ARM: orion5x: use mac_pton() helper ARM: at91: pm: at91_pm_suspend_in_sram() must be 8-byte aligned ARM: sunxi: Add R8 support ARM: digicolor: select pinctrl/gpio driver arm: berlin: add CPU hotplug support arm: berlin: use non-self-cleared reset register to reset cpu ARM: mediatek: add smp bringup code ARM: mediatek: enable gpt6 on boot up to make arch timer working soc: mediatek: Fix random hang up issue while kernel init soc: ti: qmss: make acc queue support optional in the driver soc: ti: add firmware file name as part of the driver Documentation: dt: soc: Add description for knav qmss driver ARM: S3C64XX: Use PWM lookup table for mach-smartq ARM: S3C64XX: Use PWM lookup table for mach-hmt ARM: S3C64XX: Use PWM lookup table for mach-crag6410 ARM: S3C64XX: Use PWM lookup table for smdk6410 ...
| * ARM: sunxi: Add R8 supportMaxime Ripard2015-10-171-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The R8 is a new Allwinner SoC based on the A13. While both are very similar, there's still a few differences. Introduce a new compatible to deal with them. In order to have a consistent naming, instead of mentioning the Allwinner A series as the machine name, switch to sun4i/sun5i like what is done for the other families. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Stephen Boyd <sboyd@codeaurora.org>
* | clocksource: cosmetic: Drop OF 'dependency' from symbolsMarc Zyngier2015-10-011-1/+1
|/ | | | | | | | | | | | | Seeing the 'of' characters in a symbol that is being called from ACPI seems to freak out people. So let's do a bit of pointless renaming so that these folks do feel at home. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Reviewed-by: Hanjun Guo <hanjun.guo@linaro.org> Acked-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Hanjun Guo <hanjun.guo@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* ARM: sunxi: Add Machine support for A33Vishnu Patekar2015-07-051-0/+1
| | | | | | | | | | Add machine support for the Allwinner A33 quad core cortex-a7 based SoC, which is similar to the A23 SoC. Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Tested-by: Chen-Yu Tsai <wens@csie.org>
* ARM: sunxi: Introduce Allwinner H3 supportJens Kuske2015-07-051-1/+3
| | | | | | | | The Allwinner H3 is a quad-core Cortex-A7-based SoC. It is very similar to other sun8i family SoCs like the A23. Signed-off-by: Jens Kuske <jenskuske@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: sunxi: Register cpufreq-dt for sun[45678]iChen-Yu Tsai2015-01-071-0/+10
| | | | | | | | | On sun[45678]i, we have one cluster of identical cores sharing a clock, which is ideal for using cpufreq-dt. Register a platform device for cpufreq-dt. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: sunxi: Add "allwinner,sun6i-a31s" to mach-sunxiHans de Goede2015-01-051-0/+1
| | | | | | | | | | So far the A31s is 100% compatible with the A31, still lets do the same as what we've done for the A13 / A10s and give it its own compatible string, in case we need to differentiate later. Signed-off-by: Hans de Goede <hdegoede@redhat.com> [Maxime: Removed unusude CPU_OF_DECLARE_METHOD] Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: sunxi: Introduce Allwinner A80 supportChen-Yu Tsai2014-10-201-0/+9
| | | | | | | | | | The Allwinner A80 is a new Cortex octo-core A7/A15 big.LITTLE SoC. While it's processor cores and interconnecting bus are new, it re-uses many peripherals found in earlier Allwinner SoCs. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Tested-by: Andreas Färber <afaerber@suse.de>
* ARM: sunxi: Remove sun4i reboot code from mach directoryMaxime Ripard2014-09-111-76/+0
| | | | | | | | | | Now that the restart code has been merged in the watchdog driver, we don't need the restart code in the mach-sunxi directory anymore. Remove it entirely. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Merge tag 'exynos-cpuidle' of ↵Olof Johansson2014-07-201-0/+77
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc Merge "Samsung exynos cpuidle update for v3.17" from Kukjin Kim: - add callbacks exynos_suspend() and exynos_powered_up() for support cpuidle through mcpm - skip exynos_cpuidle for exynos5420 because is uses cpuidle-big-liggle generic cpuidle driver - add generic functions to calculate cpu number is used for pmu and this is required for exynos5420 multi-cluster - add of_device_id structure for big.LITTLE cpuidle and add "samsung,exynos5420" compatible string for exynos5420 * tag 'exynos-cpuidle' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: EXYNOS: populate suspend and powered_up callbacks for mcpm ARM: EXYNOS: do not allow cpuidle registration for exynos5420 cpuidle: big.LITTLE: init driver for exynos5420 cpuidle: big.LITTLE: Add ARCH_EXYNOS entry in config ARM: EXYNOS: add generic function to calculate cpu number cpuidle: big.LITTLE: add of_device_id structure + Linux 3.16-rc5 Signed-off-by: Olof Johansson <olof@lixom.net>
| * ARM: sunxi: Reintroduce the restart code for A10/A20 SoCsMaxime Ripard2014-07-051-0/+77
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This partly reverts commits 553600502b84 (ARM: sunxi: Remove reset code from the platform) and 5e669ec583e2 (ARM: sunxi: Remove init_machine callback) for the sun4i, sun5i and sun7i families. This is needed because the watchdog counterpart of these commits was dropped, and didn't make it into 3.16. In order to still be able to reboot the board, we need to reintroduce that code. Of course, the long term view is still to get rid of that code in mach-sunxi. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* | ARM: sunxi: Introduce Allwinner A23 supportChen-Yu Tsai2014-06-231-0/+9
|/ | | | | | | | The Allwinner A23 is a dual-core Cortex-A7-based SoC. It re-uses most of the IPs found in previous SoCs, notably the A31. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: sunxi: allow building without reset controllerArnd Bergmann2014-05-261-1/+2
| | | | | | | | | | The sunxi reset controller code is only used with sun6i (a31). After the platform has been split up into per-soc options, it's now possible to build it without the reset controller code, so the base platform init must not call into the reset driver if that is turned off at compile time. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* ARM: sunxi: Remove init_machine callbackMaxime Ripard2014-05-231-9/+0
| | | | | | | | | | The init_machine hook is now at its default value. We can remove it. Even though the sun4i and sun7i machines are nothing more than generic machines now, leave them in so that we won't have to add them back if needed, and so that the machine is still displayed in /proc/cpuinfo. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: sunxi: Remove reset code from the platformMaxime Ripard2014-05-231-98/+0
| | | | | | | | | Now that reset is handled either by the watchdog driver for the sun4i, sun5i and sun7i, and by a driver of its own for sun6i, we can remove it from the platform code. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
* ARM: sun6i: Retire the smp field in A31 machineMaxime Ripard2014-05-171-3/+0
| | | | | | | Now that we can rely on the enable-method, remove the smp field declaration from A31 machine. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: sunxi: Add the new watchog compatibles to the reboot codeMaxime Ripard2014-03-131-2/+2
| | | | | | | Now that the watchdog driver has new compatibles, we need to support them in the machine reboot code. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: sun6i: Add SMP support for the Allwinner A31Maxime Ripard2013-12-161-0/+3
| | | | | | | | The A31 is a quad Cortex-A7. Add the logic to use the IPs used to control the CPU configuration and the CPU power so that we can bring up secondary CPUs at boot. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: sunxi: Register the A31 reset IP in init_timeMaxime Ripard2013-11-221-0/+11
| | | | | | | | | | The A31 has a reset IP that maintains a few other IPs in reset by default. Among these IPs are the UARTs, and most notably the timers. We thus need to register the reset driver before initializing the timers so that the reset timer can use the reset framework. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
* ARM: sunxi: remove .init_time hooksOlof Johansson2013-10-281-2/+0
| | | | | | | | | The machine entries were split up, but the cleanup to remove .init_time removed the function that the new/split entries refer to. Remove them since they are no longer needed. Cc: Maxime Ripard <mripard@free-electrons.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* Merge tag 'sunxi-core-for-3.13' of https://github.com/mripard/linux into ↵Olof Johansson2013-10-281-10/+27
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | next/soc From Maxime Ripard: Allwinner sunXi SoCs machine additions for 3.13 Nothing outstanding here, mostly some documentation cleanup, and the split of the previous generic machine declaration into three different machines to handle the sun4i/sun5i, sun6i and sun7i separately. * tag 'sunxi-core-for-3.13' of https://github.com/mripard/linux: Documentation: dt: Remove clock gates IDs list for Allwinner SoCs Documentation: dt: Remove interrupt sources list for Allwinner SoCs Documentation: sunxi: Update Allwinner SoC documentation Documentation: sunxi: Update A13 user manual dead link ARM: sunxi: Order Kconfig options alphabetically ARM: sunxi: Simplify restart setup code ARM: sunxi: Split out the DT machines for sun6i and sun7i Signed-off-by: Olof Johansson <olof@lixom.net>
| * ARM: sunxi: Simplify restart setup codeMaxime Ripard2013-09-271-8/+5
| | | | | | | | | | | | | | | | Now that we have different machine definitions for different SoCs, we can remove the DT lookup to get the restart hook we should be using, and hardcode it in the machine definition instead. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| * ARM: sunxi: Split out the DT machines for sun6i and sun7iMaxime Ripard2013-09-271-2/+22
| | | | | | | | | | | | | | | | The A20 and A31 SMP code have a different way of bringing up a new core. This will prevent us from using the same set of smp_operations for the two SoCs family. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* | ARM: sunxi: remove custom .init_time hookSebastian Hesselbarth2013-09-291-8/+0
| | | | | | | | | | | | | | | | With arch/arm calling of_clk_init(NULL) from time_init(), we can now remove custom .init_time hooks. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* | clk: sunxi: declare OF clock providerSebastian Hesselbarth2013-09-291-3/+1
|/ | | | | | | | | | | | Common clock framework allows to register clock providers to get called on of_clk_init() by using CLK_OF_DECLARE. This converts sunxi clock providers to make use of it and get rid of the mach specific clk init call. As sunxi has a bunch of independent clk provider nodes, we hook current clock init to board compatible to make it called once. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Mike Turquette <mturquette@linaro.org>
* ARM: sunxi: Introduce Allwinner A20 supportMaxime Ripard2013-08-161-0/+1
| | | | | | | | The Allwinner A20 is a dual-core Cortex-A7-based SoC. It is pin-compatible with the A10, and re-uses most of the IPs found in it, plus some additional ones like a Gigabit Ethernet controller. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: sun6i: Add restart code for the A31Maxime Ripard2013-08-161-3/+40
| | | | | | | The Allwinner A31 has a different watchdog, with a slightly different register layout, that requires a different restart code. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: sunxi: Add the Allwinner A31 compatible to the machine definitionMaxime Ripard2013-08-161-0/+1
| | | | | | | | | | The Allwinner A31 is a quad-Cortex-A7 based SoC, which shares a lot of IPs with the previous SoCs from Allwinner, like the PIO, I2C, UARTs, timers, watchdog IPs, but also differs by dropping the WEMAC ethernet controller and most notably dropping the in-house IRQ controller in favor of a ARM GIC one. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* reboot: arm: change reboot_mode to use enum reboot_modeRobin Holt2013-07-091-1/+2
| | | | | | | | | | | | | | | | Preparing to move the parsing of reboot= to generic kernel code forces the change in reboot_mode handling to use the enum. [akpm@linux-foundation.org: fix arch/arm/mach-socfpga/socfpga.c] Signed-off-by: Robin Holt <holt@sgi.com> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Russ Anderson <rja@sgi.com> Cc: Robin Holt <holt@sgi.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Guan Xuetao <gxt@mprc.pku.edu.cn> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge tag 'soc-for-linus' of ↵Linus Torvalds2013-07-021-0/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC specific changes from Arnd Bergmann: "These changes are all to SoC-specific code, a total of 33 branches on 17 platforms were pulled into this. Like last time, Renesas sh-mobile is now the platform with the most changes, followed by OMAP and EXYNOS. Two new platforms, TI Keystone and Rockchips RK3xxx are added in this branch, both containing almost no platform specific code at all, since they are using generic subsystem interfaces for clocks, pinctrl, interrupts etc. The device drivers are getting merged through the respective subsystem maintainer trees. One more SoC (u300) is now multiplatform capable and several others (shmobile, exynos, msm, integrator, kirkwood, clps711x) are moving towards that goal with this series but need more work. Also noteworthy is the work on PCI here, which is traditionally part of the SoC specific code. With the changes done by Thomas Petazzoni, we can now more easily have PCI host controller drivers as loadable modules and keep them separate from the platform code in drivers/pci/host. This has already led to the discovery that three platforms (exynos, spear and imx) are actually using an identical PCIe host controller and will be able to share a driver once support for spear and imx is added." * tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (480 commits) ARM: integrator: let pciv3 use mem/premem from device tree ARM: integrator: set local side PCI addresses right ARM: dts: Add pcie controller node for exynos5440-ssdk5440 ARM: dts: Add pcie controller node for Samsung EXYNOS5440 SoC ARM: EXYNOS: Enable PCIe support for Exynos5440 pci: Add PCIe driver for Samsung Exynos ARM: OMAP5: voltagedomain data: remove temporary OMAP4 voltage data ARM: keystone: Move CPU bringup code to dedicated asm file ARM: multiplatform: always pick one CPU type ARM: imx: select syscon for IMX6SL ARM: keystone: select ARM_ERRATA_798181 only for SMP ARM: imx: Synertronixx scb9328 needs to select SOC_IMX1 ARM: OMAP2+: AM43x: resolve SMP related build error dmaengine: edma: enable build for AM33XX ARM: edma: Add EDMA crossbar event mux support ARM: edma: Add DT and runtime PM support to the private EDMA API dmaengine: edma: Add TI EDMA device tree binding arm: add basic support for Rockchip RK3066a boards arm: add debug uarts for rockchip rk29xx and rk3xxx series arm: Add basic clocks for Rockchip rk3066a SoCs ...
| * ARM: sunxi: Add Allwinner A10s machine compatibleMaxime Ripard2013-06-161-0/+1
| | | | | | | | | | | | | | The A10s is a SoC member of the Allwinner sun5i family. It is basically an A13 with an EMAC and an HDMI controller. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* | Merge tag 'sunxi-core-for-3.11' of git://github.com/mripard/linux into ↵Olof Johansson2013-06-151-2/+0
|\| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | next/cleanup From Maxime Ripard: Allwinner SoCs platform additions for 3.11 - Various cleanups and documentation updates * tag 'sunxi-core-for-3.11' of git://github.com/mripard/linux: ARM: sunxi: irqchip: Update the documentation ARM: sunxi: Update datasheet documentation ARM: sunxi: Remove init_irq declaration in machine description Signed-off-by: Olof Johansson <olof@lixom.net> #
| * ARM: sunxi: Remove init_irq declaration in machine descriptionMaxime Ripard2013-05-151-2/+0
| | | | | | | | | | | | | | | | | | Commit ebafed7a ("ARM: irq: Call irqchip_init if no init_irq function is specified") removed the need to explictly setup the init_irq field in the machine description when using only irqchip_init. Remove that declaration for sunxi as well. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* | ARM: sunxi: Remove the .map_io function declarationMaxime Ripard2013-05-241-17/+0
|/ | | | | | | | | debug_ll_io_init should be enough to map the needed addresses at boot, so remove the trivial map_io code, and let the core call debug_ll_io_init. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
* ARM: sunxi: Rework the restart codeMaxime Ripard2013-04-081-23/+35
| | | | | | | | | | | | | | | | The Allwinner sun6i (A31) has a slightly different watchdog, that doesn't allow to use the already existing restart code. Rework a bit the restart code to allow to plug in more easily different restart handlers depending on the device tree. In the past, we were also meaning sunxi as a generic name covering all Allwinner SoCs. This won't be true anymore with the A31 (sun6i) that differs pretty much from sun4i and sun5i, and we will end up having sunxi, for sun4i and sun5i, and sun6i, which is neither consistent nor convenient. So, while we're at it, also change sunxi to sun4i. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* irqchip: sunxi: Make use of the IRQCHIP_DECLARE macroMaxime Ripard2013-04-081-3/+2
| | | | | | | | This allows to remove some boilerplate code. At the same time, call the set_handle_irq function in the initialization function of the irqchip, so that we can remove it from the machine declaration. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* clocksource: sunxi: make use of CLKSRC_OFMaxime Ripard2013-04-081-2/+9
| | | | | | | | Using CLKSRC_OF allows to remove the SoC specific sunxi_timer.h header, and instead of using a custom init function in the machine definition use the standard clocksource_of_init function. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
generated by cgit v1.2.3 (git 2.39.1) at 2025-01-09 21:12:59 +0100