summaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-zynq/slcr.c (follow)
Commit message (Expand)AuthorAgeFilesLines
* ARM: zynq: address L2 cache data corruptionJosh Cartwright2016-02-091-0/+4
* ARM: zynq: Drop use of slcr_unlock in zynq_slcr_system_restartJosh Cartwright2015-05-181-7/+0
* ARM: zynq: Use restart_handler mechanism for slcr resetJosh Cartwright2015-05-181-2/+19
* ARM: zynq: Simplify SLCR initializationMichal Simek2015-01-291-28/+7
* ARM: zynq: Synchronise zynq_cpu_die/killSoren Brinkmann2014-09-161-1/+42
* ARM: zynq: Add support for SOC_BUSMichal Simek2014-05-201-0/+19
* ARM: zynq: Introduce zynq_slcr_unlock()Michal Simek2014-02-101-2/+14
* ARM: zynq: Add and use zynq_slcr_read/write() helper functionsMichal Simek2014-02-101-8/+48
* ARM: zynq: Make zynq_slcr_base staticSteffen Trumtrar2014-02-101-1/+1
* ARM: zynq: Hang iomapped slcr address on device_nodeSteffen Trumtrar2014-02-101-0/+2
* ARM: zynq: Split slcr in two partsMichal Simek2014-02-101-2/+24
* ARM: zynq: Move clock_init from slcr to commonSteffen Trumtrar2014-02-051-2/+0
* arm: zynq: slcr: Use read-modify-write for register writesSoren Brinkmann2013-07-261-8/+8
* arm: zynq: slcr: Clean up #definesSoren Brinkmann2013-07-261-13/+12
* arm: zynq: slcr: Remove redundant header #includesSoren Brinkmann2013-07-261-10/+0
* arm: zynq: Migrate platform to clock controllerSoren Brinkmann2013-05-271-1/+1
* arm: zynq: Add smp supportMichal Simek2013-04-041-0/+29
* arm: zynq: Add support for system resetMichal Simek2013-04-041-0/+27
* arm: zynq: Move slcr initialization to separate fileMichal Simek2013-04-041-0/+69